JPH05291565A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a manufacturing method of a semiconductor device which enables manufacturing of a semiconductor device having improved withstand voltage properties of a gate insulating film in a short time. CONSTITUTION:An amorphous silicon film 3 is formed on a gate insulating film 2 formed on a semiconductor substrate 1 and a polycrystalline silicon film 4 is formed thereon. Then, impurities are introduced to the amorphous silicon film 3 and the polycrystalline silicon film 4 to form a gate electrode part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a semiconductor device having a gate insulating film with improved withstand voltage characteristics is manufactured in a short time.

[0002]

2. Description of the Related Art Conventionally, a gate electrode of a semiconductor device has been
Generally, after forming a polycrystalline silicon film through a gate insulating film formed on a semiconductor substrate, the polycrystalline silicon film is formed by introducing impurities such as phosphorus for the purpose of improving conductivity of the polycrystalline silicon film. There is. However, when the gate electrode is formed by the above method, the phosphorus introduced into the polycrystalline silicon film is segregated at the grain boundaries of the polycrystalline silicon film by the heat treatment performed in a later step, and the segregated phosphorus is the gate. There is a problem that the insulating film enters the insulating film and protrudes toward the gate insulating film side to reduce the flatness at the interface between the gate insulating film and the polycrystalline silicon film. Then, there is a problem that electric field concentration occurs in a portion of the gate insulating film where the phosphorus is projected, and the insulating characteristics of the gate insulating film are deteriorated. Further, the segregated phosphorus locally forms a portion having a high phosphorus concentration at the interface between the gate insulating film and the polycrystalline silicon film, and this phosphorus enters the gate insulating film to cause the inside of the gate insulating film. There was a problem that it diffused and penetrated, causing dielectric breakdown at this part.

Here, the impurities such as phosphorus segregate at the crystal grain boundaries of the polycrystalline silicon film by a heat treatment performed in a later step. The polycrystalline silicon film is an amorphous silicon film in a solid phase. Since the crystal grain size is smaller than that of the polycrystalline silicon film formed by crystallization in (3), the number of crystal grain boundaries is relatively large. Therefore, in the polycrystalline silicon film, the segregation number of phosphorus increases, and the amount of phosphorus entering the gate insulating film increases accordingly.

Therefore, instead of the polycrystalline silicon film,
A method of forming an amorphous silicon film, subjecting the amorphous silicon film to heat treatment to crystallize the amorphous silicon film, and then introducing impurities such as phosphorus, or forming an amorphous silicon film into which phosphorus is introduced After that, a polycrystalline silicon film having a large crystal grain size is formed by, for example, a method of crystallizing the amorphous silicon film into which the phosphorus is introduced by subjecting it to a heat treatment and reducing the crystal grain boundaries, There is a method of suppressing the concentration of the electric field by reducing the number of segregation of.

[0005]

However, while the polycrystalline silicon film formed by crystallizing the amorphous silicon film has a large crystal grain size, the amorphous silicon film is formed at a low temperature. Therefore, the film formation speed is very slow,
There has been a problem that the productivity of semiconductor devices is significantly reduced.

An object of the present invention is to solve such a problem, and it is an object of the present invention to provide a semiconductor device manufacturing method for manufacturing a semiconductor device in which a gate insulating film has improved withstand voltage characteristics in a short time. To aim.

[0007]

In order to achieve this object, the present invention provides a method for manufacturing a semiconductor device in which a gate electrode is formed on a semiconductor substrate via a gate insulating film,
A first step of forming an amorphous silicon film on the gate insulating film formed on the semiconductor substrate; a second step of forming a polycrystalline silicon film on the amorphous silicon film; A third aspect of the present invention provides a method for manufacturing a semiconductor device, including a third step of introducing impurities into a crystalline silicon film and a polycrystalline silicon film.

Then, in a method of manufacturing a semiconductor device in which a gate electrode is formed on a semiconductor substrate via a gate insulating film, an amorphous substance is introduced while introducing impurities onto the gate insulating film formed on the semiconductor substrate. Deposit a silicon film,
A first step of forming an amorphous silicon film in which impurities are introduced, and a step of forming an amorphous silicon film in which the impurities are introduced,
A second step of depositing a polycrystalline silicon film while introducing impurities to form a polycrystalline silicon film having impurities introduced therein, the present invention provides a method for manufacturing a semiconductor device.

[0009]

According to the first aspect of the present invention, after the amorphous silicon film and the polycrystalline silicon film are sequentially formed on the gate insulating film, impurities for improving conductivity are formed on the both silicon films. By introducing the above, it is possible to manufacture a semiconductor device in which the breakdown voltage characteristic of the gate insulating film is improved in a short time.

That is, the amorphous silicon film is crystallized by a heat treatment performed in a later step to form a polycrystalline silicon film. The polycrystalline silicon film obtained by crystallizing the amorphous silicon film is The crystal grain size is larger than that of a normal polycrystalline silicon film. Therefore, a polycrystalline silicon film having improved conductivity and a large crystal grain size can be formed on the gate insulating film. Since the polycrystalline silicon film having a large crystal grain size has a small proportion of crystal grain boundaries, it is possible to reduce the proportion of the impurities segregated at the crystal grain boundaries. Therefore, it is possible to suppress the adverse effect of the impurities on the gate insulating film. Since the adverse effect of the impurities mainly occurs at the interface between the gate insulating film and the polycrystalline silicon film, the amorphous silicon film may be formed to have a film thickness capable of protecting the gate insulating film. Therefore, the film thickness of the amorphous silicon film, which has a low film formation rate, can be made thinner than in the past, so that the time for forming the gate electrode can be significantly shortened.

According to the second aspect of the present invention, an amorphous silicon film is deposited on the gate insulating film while introducing impurities to form an impurity-doped amorphous silicon film. By depositing a polycrystalline silicon film while introducing impurities and forming a polycrystalline silicon film into which impurities are introduced, a semiconductor device with improved withstand voltage characteristics of a gate insulating film can be manufactured in a short time. it can.

That is, the amorphous silicon film is crystallized by a heat treatment performed in a later step to become a polycrystalline silicon film into which impurities are introduced. The crystal grain size of this polycrystalline silicon film is the usual one. It becomes larger than the crystal grain size of the polycrystalline silicon film. Therefore, a polycrystalline silicon film having improved conductivity and a large crystal grain size can be formed on the gate insulating film. Since the polycrystalline silicon film having a large crystal grain size has a small proportion of crystal grain boundaries, the proportion of the impurities segregated in the crystal grain boundaries can be reduced, and the impurities can be contained in the gate insulating film. It is possible to suppress adverse effects. Since the adverse effect of the impurities mainly occurs at the interface between the gate insulating film and the polycrystalline silicon film, the amorphous silicon film may be formed to have a film thickness capable of protecting the gate insulating film. Therefore, the film thickness of the amorphous silicon film, which has a low film formation rate, can be made thinner than in the past, so that the time for forming the gate electrode can be significantly shortened.

[0013]

Embodiments of the present invention will now be described with reference to the drawings. 1 to 4 are sectional views showing a part of a manufacturing process of a semiconductor device according to an embodiment of the present invention. In the step shown in FIG. 1, O ₂ is used as a film forming gas on the semiconductor substrate 1, the film forming temperature is about 950 ° C., and the film thickness =
The gate insulating film 2 of about 150 Å is formed.

Next, in the step shown in FIG. 2, Si _{2 is used} as a film forming gas on the gate insulating film 2 obtained in the step shown in FIG.
Using H ₆ (disilane gas), low pressure CVD under the conditions of film forming temperature = 480 ° C. and furnace pressure = 0.03 Torr.
(Chemical Vapor Deposition
n), and the amorphous silicon film 3 with a film thickness of about 500 Å
To form.

Next, in the step shown in FIG. 3, Si is used as a film forming gas on the amorphous silicon film 3 obtained in the step shown in FIG.
₂ H ₆ (disilane gas) is used and the low pressure CVD is performed under the conditions of film formation temperature = 620 ° C. and furnace pressure = 0.03 Torr.
(Chemical Vapor Deposition
n) is performed to form a polycrystalline silicon film 4 having a film thickness of about 3500Å. Then, the polycrystalline silicon film 4 and the amorphous silicon film 3 are filled with POCl 3 as an impurity introducing gas.
₃ , and phosphorus (P) is introduced at a temperature of about 850 ° C.

Next, in the step shown in FIG. 4, the polycrystalline silicon film 4 and the amorphous silicon film 3 into which P obtained in the step shown in FIG. 3 is introduced, and the gate insulating film 2 are patterned to form a semiconductor. The gate electrode 5 was formed on the substrate 1 via the gate insulating film 2. Then perform the desired steps,
Although the semiconductor device is completed, the amorphous silicon film into which P is introduced is crystallized by the heat treatment performed in the desired step, and becomes a polycrystalline silicon film into which P is introduced. Here, the crystal grain size of the polycrystalline silicon film obtained by crystallizing the amorphous silicon film 3 is larger than that of a normal polycrystalline silicon film. Therefore, the ratio of the existence of crystal grain boundaries is reduced as compared with the usual polycrystalline silicon film.

Next, regarding the formation time when the entire gate electrode is formed of an amorphous silicon film (conventional product 1) and the formation time of the gate electrode (invention product) obtained in this embodiment,
A comparison was made. The result is shown in FIG. From FIG. 5, it can be seen that the invention product can form a gate electrode having a film thickness of 4000 Å in 150 minutes, whereas the conventional product 1 takes 800 minutes to form a gate electrode having the same film thickness. From this, it was proved that the invention product can significantly reduce the manufacturing time as compared with the conventional product.

Next, a conventional semiconductor device (conventional product 2) having a gate electrode formed by introducing impurities into a polycrystalline silicon film formed by a usual method was manufactured. The conventional semiconductor device was manufactured according to the above-described example except that the method of forming the gate electrode was different. Next, the breakdown voltage distribution (breakdown voltage characteristic) of the gate insulating film 2 of the invention product and the conventional product 2
Comparison was made with the withstand voltage characteristics of the gate insulating film. The breakdown voltage distribution of the invention product is shown in FIG. 6, and the breakdown voltage distribution of the conventional product 2 is shown in FIG.

From FIG. 6 and FIG. 7, it is proved that the invention product has improved withstand voltage characteristics as compared with the conventional product 2. In this embodiment, the amorphous silicon film 3 and the polycrystalline silicon film 4 are used.
Impurities were introduced into both the silicon films 3 and 4 after the formation of, but not limited to this, when forming the amorphous silicon film 3, for example, an impurity introduction gas such as PH ₃ is mixed, The amorphous silicon film 3 may be deposited while introducing impurities to form an amorphous silicon film into which impurities are introduced. Then, similarly, a polycrystalline silicon film having impurities introduced therein may be formed on the amorphous silicon film having impurities introduced therein.

Further, in this embodiment, the amorphous silicon film 3 is used.
Further, Si ₂ H ₆ was used for forming the polycrystalline silicon film 4, but the present invention is not limited to this, and another film forming gas may be used as long as the both silicon films 3 and 4 can be formed. ..
Then, in the present embodiment, P was introduced as an impurity for improving the conductivity of the amorphous silicon film 3 and the polycrystalline silicon film 4, but the present invention is not limited to this.
Other impurities may be introduced as long as they are impurities that can improve the conductivity of Nos. 4 and 4.

The method of introducing impurities into the amorphous silicon film 3 and the polycrystalline silicon film 4 may be determined by a diffusion method, an ion implantation method, or the like as desired.

[0022]

As described above, according to the first aspect of the invention, after the amorphous silicon film and the polycrystalline silicon film are sequentially formed on the gate insulating film, the two silicon films are electrically conductive. By introducing impurities to improve the
By the heat treatment performed in a later step, the amorphous silicon film is crystallized, and a polycrystalline silicon film having improved conductivity and a large crystal grain size can be formed on the contact surface with the gate insulating film. Since the polycrystalline silicon film having a large crystal grain size has a small proportion of crystal grain boundaries, the proportion of segregation of the impurities is small. Therefore, the adverse effect of the impurities on the gate insulating film can be suppressed. Since the adverse effect of the impurities mainly occurs at the interface between the gate insulating film and the polycrystalline silicon film, the amorphous silicon film may be formed to have a film thickness capable of protecting the gate insulating film. Therefore, the film thickness of the amorphous silicon film, which has a low film formation rate, can be made thinner than in the conventional case, and thus the time for forming the gate electrode can be significantly shortened. As a result, a semiconductor device in which the gate insulating film has improved breakdown voltage characteristics can be manufactured in a short time.

According to the second aspect of the invention, an amorphous silicon film is deposited on the gate insulating film while introducing impurities to form an impurity-doped amorphous silicon film. By depositing a polycrystalline silicon film while introducing impurities, and forming a polycrystalline silicon film into which impurities are introduced, the amorphous silicon film into which the impurities are introduced by heat treatment performed in a later step. Can be crystallized, and a polycrystalline silicon film having improved conductivity and a large crystal grain size can be formed on the contact surface with the gate insulating film. Therefore, it is possible to suppress the adverse effect of the impurities on the gate insulating film. Since the adverse effect of the impurities mainly occurs at the interface between the gate insulating film and the polycrystalline silicon film, the amorphous silicon film may be formed to have a film thickness capable of protecting the gate insulating film. Therefore, the film thickness of the amorphous silicon film, which has a low film formation rate, can be made thinner than in the conventional case, and thus the time for forming the gate electrode can be significantly shortened. As a result, a semiconductor device in which the gate insulating film has improved breakdown voltage characteristics can be manufactured in a short time.

[Brief description of drawings]

FIG. 1 is a sectional view showing a part of a manufacturing process of a semiconductor device according to an embodiment of the invention.

FIG. 2 is a sectional view showing a part of the manufacturing process of the semiconductor device according to the embodiment of the invention.

FIG. 3 is a sectional view showing a part of the manufacturing process of the semiconductor device according to the example of the invention.

FIG. 4 is a sectional view showing a part of the manufacturing process of the semiconductor device according to the embodiment of the invention.

FIG. 5 is a diagram showing a gate electrode forming time of a semiconductor device according to an example of the present invention and a gate electrode forming time of a conventional product 1.

FIG. 6 is a diagram showing a breakdown voltage distribution of a gate insulating film in a semiconductor device according to an example of the present invention.

FIG. 7 is a diagram showing a breakdown voltage distribution of a gate insulating film of Conventional product 1.

[Explanation of symbols]

 1 semiconductor substrate 2 gate insulating film 3 amorphous silicon film 4 polycrystalline silicon film 5 gate electrode

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a gate electrode is formed on a semiconductor substrate via a gate insulating film, wherein an amorphous silicon film is formed on the gate insulating film formed on the semiconductor substrate. The method includes a first step, a second step of forming a polycrystalline silicon film on the amorphous silicon film, and a third step of introducing impurities into the amorphous silicon film and the polycrystalline silicon film. A method of manufacturing a semiconductor device, comprising: 2. A method of manufacturing a semiconductor device, wherein a gate electrode is formed on a semiconductor substrate via a gate insulating film, wherein the gate insulating film formed on the semiconductor substrate is amorphous while introducing impurities. A first step of depositing a silicon film to form an amorphous silicon film doped with impurities, and a polycrystalline silicon film is deposited on the amorphous silicon film doped with impurities while introducing impurities. And a second step of forming a polycrystalline silicon film into which impurities are introduced.