JPH05289101A - Thin-film transistor substrate - Google Patents

Thin-film transistor substrate

Info

Publication number
JPH05289101A
JPH05289101A JP8681792A JP8681792A JPH05289101A JP H05289101 A JPH05289101 A JP H05289101A JP 8681792 A JP8681792 A JP 8681792A JP 8681792 A JP8681792 A JP 8681792A JP H05289101 A JPH05289101 A JP H05289101A
Authority
JP
Japan
Prior art keywords
thin film
slit
pixel electrode
electrode
film transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8681792A
Other languages
Japanese (ja)
Inventor
Yoshihiko Sato
恵彦 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Electric Kagoshima Ltd
NEC Kagoshima Ltd
Original Assignee
Nippon Electric Kagoshima Ltd
NEC Kagoshima Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=13897364&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH05289101(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Nippon Electric Kagoshima Ltd, NEC Kagoshima Ltd filed Critical Nippon Electric Kagoshima Ltd
Priority to JP8681792A priority Critical patent/JPH05289101A/en
Publication of JPH05289101A publication Critical patent/JPH05289101A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To minimize the degradation in image quality by a defect and to prevent the degradation in the display quality providing a slit in the pixel electrode part near a lower electrode and shielding the slit with an opaque thin film. CONSTITUTION:The slit 9 is provided in the pixel electrode part 7 near the lower electrode 8 for a storage capacity and the opaque thin film 10th shape of which is formed making the slit part 9 as its hollow part, is provided in one layer of interlayer insulating films. Then, the easy cutting of the desired pixel electrode 7 with a min. area is made possible without unnecessary damage of the transparent electrode which is hardly visibly recognizable. In addition the opaque hollow thin film can minimize the quantity of the light leakage from the slit part 9 generated by driving of a liquid crystal. White dot defects are, therefore, drastically decreased on the entire black display screen and the high image quality is obtd.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、蓄積容量を具備し、し
かも平面的にアレイ状に多数配置された薄膜トランジス
タ基板に関し、特に蓄積容量部の層間短絡不良を低減さ
せて高品質を具備する液晶パネルを高製造歩留りで提供
することのできる薄膜トランジスタ基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate having a storage capacitor and having a large number of two-dimensionally arranged in an array, and particularly, a liquid crystal having a high quality by reducing an interlayer short circuit defect of the storage capacitor portion. The present invention relates to a thin film transistor substrate capable of providing a panel with a high manufacturing yield.

【0002】[0002]

【従来の技術】従来、この種の薄膜トランジスタ基板は
図3に模式的平面図及び図4に模式的断面図を示すよう
に、ガラス基板1上にITOやクロム等の膜を所望の形
状に付着形成させてゲート電極2を形成すると共に蓄積
容量のための下部電極8をも形成する。次にゲート絶縁
膜及び蓄積容量のための絶縁膜として二酸化シリコンや
窒化シリコン等の層間絶縁膜3を所望の厚みに付着形成
させ、しかる後に能動素子として機能する非晶質シリコ
ン4あるいは多結晶シリコン、更には次工程で形成され
るドレイン5やソース6等の電極とオーミックコンタク
トを得るための高濃度のリンやボロン等を含むシリコン
薄膜(図示省略)を所望の形状に付着させて薄膜トラン
ジスタ部を形成する。
2. Description of the Related Art Conventionally, as shown in a schematic plan view of FIG. 3 and a schematic sectional view of FIG. 4, a thin film transistor substrate of this type has a film of ITO, chromium or the like adhered to a desired shape on a glass substrate 1. Then, the gate electrode 2 is formed and the lower electrode 8 for the storage capacitor is also formed. Next, an interlayer insulating film 3 of silicon dioxide, silicon nitride or the like is deposited and formed to a desired thickness as a gate insulating film and an insulating film for a storage capacitor, and thereafter, amorphous silicon 4 or polycrystalline silicon which functions as an active element is formed. Further, a thin film of silicon (not shown) containing high concentration phosphorus or boron for obtaining ohmic contact with the electrodes of the drain 5 and the source 6 formed in the next step is attached in a desired shape to form the thin film transistor part. Form.

【0003】薄膜トランジスタ部のドレイン電極やソー
ス電極のための金属材料は一般に良導電体で不透明クロ
ムやアルミニウム等のスパッタ膜で構成され、液晶を表
示するためのピクセル電極7は、例えばソース電極6に
電気的に接続されたスパッタITO膜,酸化スズ等の透
明電極で構成される。このピクセル電極7と蓄積容量下
部電極8との積層領域に狭まれた層間絶縁膜3の領域が
蓄積容量として機能し、薄膜トランジスタの動作によっ
てドレイン電極からソース電極へ移送された電荷を長時
間ピクセル電極に保存する機能を荷う。
The metal material for the drain electrode and the source electrode of the thin film transistor section is generally a good conductor and is composed of a sputtered film such as opaque chromium or aluminum, and the pixel electrode 7 for displaying liquid crystal is, for example, the source electrode 6. It is composed of an electrically connected sputtered ITO film and a transparent electrode such as tin oxide. The region of the interlayer insulating film 3 narrowed in the laminated region of the pixel electrode 7 and the storage capacitor lower electrode 8 functions as a storage capacitor, and charges transferred from the drain electrode to the source electrode by the operation of the thin film transistor are stored in the pixel electrode for a long time. Load function to save to.

【0004】[0004]

【発明が解決しようとする課題】上述した従来の薄膜ト
ランジスタ基板は、例えば蓄積容量形成領域の層間絶縁
膜に欠陥があった場合には、容易に下部電極8とピクセ
ル電極7とが電気的に短絡し、ドレイン電極からソース
電極を介してピクセル電極へ書き込まれた電荷が、容易
にピクセル電極部から失なわれるものであった。従っ
て、これらの欠陥を具備する薄膜トランジスタ基板を用
いて液晶を駆動した際に、例えば所謂ノーマルホワイト
モードで“黒”の画面をパネル全体に表示させた場合に
は、上記の欠陥蓄積容量部を具備する薄膜トランジスタ
相当部は“白”の画面を表示することになり、液晶パネ
ルの画像品質は著るしく低下するものであった。これら
の画像品質低下は、人間の視覚に直接的に訴える液晶パ
ネルの場合には是非とも避けなければならない課題であ
った。
In the conventional thin film transistor substrate described above, the lower electrode 8 and the pixel electrode 7 are easily electrically short-circuited when, for example, there is a defect in the interlayer insulating film in the storage capacitor forming region. However, the charge written from the drain electrode to the pixel electrode via the source electrode is easily lost from the pixel electrode portion. Therefore, when a liquid crystal is driven using a thin film transistor substrate having these defects, for example, when a "black" screen is displayed on the entire panel in a so-called normal white mode, the defect storage capacitor section is provided. The portion corresponding to the thin film transistor displayed a "white" screen, and the image quality of the liquid crystal panel was significantly deteriorated. These deteriorations in image quality have been a problem that must be avoided in the case of liquid crystal panels that directly appeal to human vision.

【0005】しかも前記絶縁膜は一般に下部電極やピク
セル電極と共に透明な材料となっており、たとえ特定の
薄膜トランジスタの蓄積容量部に欠陥が存在することが
電気的に確認されたとしても、材質の透明性故に下層の
下部電極の欠陥部確認や絶縁膜欠損部の同定が困難とな
るものであった。
Moreover, the insulating film is generally made of a transparent material together with the lower electrode and the pixel electrode, and even if it is electrically confirmed that there is a defect in the storage capacitor portion of a particular thin film transistor, the transparent material is used. It is difficult to confirm the defective portion of the lower electrode of the lower layer and to identify the defective portion of the insulating film because of the property.

【0006】[0006]

【課題を解決するための手段】本発明の薄膜トランジス
タ基板は、蓄積容量用下部電極近傍のピクセル電極部に
スリットを設け、しかもそのスリット部を中空とする形
状に不透明な薄膜を層間絶縁膜の下層に設け、蓄積容量
を提供する下部とピクセル電極とが絶縁膜等の欠陥によ
って電気的に短絡した場合には、このスリット部によっ
て狭くなったピクセル電極を切断して短絡不良の影響を
低減させるものである。
A thin film transistor substrate according to the present invention is provided with a slit in a pixel electrode portion near a lower electrode for a storage capacitor, and further, an opaque thin film is formed as a lower layer of an interlayer insulating film in a shape in which the slit portion is hollow. In order to reduce the influence of short circuit failure, the pixel electrode narrowed by this slit is cut when the lower part that provides the storage capacitance and the pixel electrode are electrically short-circuited due to a defect such as an insulating film. Is.

【0007】[0007]

【作用】透明な下部電極上に積層された透明な絶縁膜と
透明なピクセル電極部とからなる蓄積容量部近傍におい
ては、最も上層に配置されたピクセル電極が最も視認性
が高くなる。従って、ピクセル電極のスリット部を下層
の視認性の低い下部電極に対応した位置近傍に配置する
ことによって、容易に下部電極の存在位置を推定するこ
とが可能になる。それ故ピクセル電極に設けられたスリ
ット部を切断することによって、下部電極を損傷させる
ことなくピクセル電極と下部電極とを電気的に分離する
ことができる。これは下部電極とピクセル電極との電気
的短絡を修復したことに外ならない。このように修復し
た薄膜トランジスタは蓄積容量を失なったために、ピク
セル電極上の電荷保持時間が正常部の半分程度に短かく
なるものの、液晶パネルの全黒表示面においては灰黒色
の表示を示すために、欠陥による画像品質の低下は最小
に抑えられる。しかもスリット部は一般に液晶が配向せ
ずに光が透過する領域であるが、この領域の大部分が中
空を具備する不透明薄膜で遮蔽されているために、漏れ
光が最小となり、表示品質の低下を防止することができ
る。
In the vicinity of the storage capacitor portion including the transparent insulating film laminated on the transparent lower electrode and the transparent pixel electrode portion, the pixel electrode arranged in the uppermost layer has the highest visibility. Therefore, by arranging the slit portion of the pixel electrode in the vicinity of the position corresponding to the lower electrode of the lower layer having low visibility, it becomes possible to easily estimate the existing position of the lower electrode. Therefore, by cutting the slit provided in the pixel electrode, the pixel electrode and the lower electrode can be electrically separated without damaging the lower electrode. This is nothing but repairing an electrical short between the lower electrode and the pixel electrode. Since the thin film transistor repaired in this way loses the storage capacity, the charge retention time on the pixel electrode is reduced to about half that of the normal part, but a gray-black display is displayed on the all-black display surface of the liquid crystal panel. In addition, the deterioration of the image quality due to the defect is suppressed to the minimum. Moreover, the slit is generally a region where light is transmitted without the liquid crystal being oriented, but since most of this region is shielded by an opaque thin film with a hollow, leakage light is minimized and display quality is degraded. Can be prevented.

【0008】[0008]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の第1の実施例の平面図である。蓄積
容量のための下部電極8及び下部電極バスライン8′と
して厚み1000オングストロームのクロムを所望の形
状に付着形成させ、次にゲート電極2及びゲート電極バ
スライン2′として厚み2000オングストロームのク
ロムを所望の形状に付着形成させる。この際同時に遮光
用としての中空部を具備する不透明領域10を形成させ
る。しかる後にゲート絶縁膜及び層間絶縁膜として厚み
2000オングストロームの二酸化シリコンと厚み50
00オングストロームの窒化シリコンを積層させて所望
の形状に付着形成させる(図示省略)。能動素子領域に
は厚み5000オングストロームの非晶質シリコン薄膜
4、並びに次工程で形成されるドレイン電極とソース電
極とのコンタクト用としてのリンを含有する厚み100
0オングストロームのシリコン薄膜(図示省略)を付着
させ所望の形状に形成する。次にドレイン電極5及びド
レイン電極バスライン5′,ソース電極6として厚み2
000オングストロームのクロム薄膜を所望の形状に付
着形成させ、更に幅10μmのスリット9を具備する厚
み1000オングストロームのITO膜をソース電極と
一部積層させて所望の形状に付着形成させてピクセル電
極7を構成する。
The present invention will be described below with reference to the drawings. FIG. 1 is a plan view of the first embodiment of the present invention. Chromium having a thickness of 1000 Å is deposited and formed in a desired shape as the lower electrode 8 and the lower electrode bus line 8 ′ for the storage capacitor, and then 2,000 Å of chromium is desired as the gate electrode 2 and the gate electrode bus line 2 ′. It adheres to the shape of. At this time, at the same time, the opaque region 10 having a hollow portion for shielding light is formed. Thereafter, a silicon dioxide film having a thickness of 2000 angstrom and a thickness of 50 is used as a gate insulating film and an interlayer insulating film.
00 angstrom of silicon nitride is laminated and deposited in a desired shape (not shown). In the active element region, an amorphous silicon thin film 4 having a thickness of 5000 angstrom, and a thickness of 100 containing phosphorus for contacting the drain electrode and the source electrode formed in the next step.
A silicon thin film (not shown) having a thickness of 0 angstrom is attached to form a desired shape. Next, the drain electrode 5, the drain electrode bus line 5 ', and the source electrode 6 have a thickness of 2
A chrome thin film having a thickness of 000 angstroms is deposited in a desired shape, and an ITO film having a thickness of 1000 angstrom having a slit 9 having a width of 10 μm is partially laminated with a source electrode to be deposited in a desired shape to form a pixel electrode 7. Constitute.

【0009】さて図1において蓄積容量部の下部電極8
とピクセル電極7とが層間短絡している場合には、スリ
ット部においてピクセル電極をレーザ光によって切断す
る。この操作によってピクセル電極7と下部電極8との
層間短絡不良は修復される。
Now, referring to FIG. 1, the lower electrode 8 of the storage capacitor portion is shown.
When the pixel electrode 7 and the pixel electrode 7 are short-circuited between layers, the pixel electrode is cut by the laser light in the slit portion. By this operation, the interlayer short circuit defect between the pixel electrode 7 and the lower electrode 8 is repaired.

【0010】図2は本発明の第2の実施例を示す平面図
である。本実施例においてはピクセル電極7に設けたス
リット9を1箇所とし、これに伴って不透明薄膜10の
形状を中空薄膜ではなく凹型としたものである。本実施
例の場合にも第1の実施例と同等の効果を呈するもので
ある。従って不透明薄膜の形状は特に限定されない。
FIG. 2 is a plan view showing a second embodiment of the present invention. In the present embodiment, the slit 9 provided in the pixel electrode 7 is provided at one location, and accordingly, the shape of the opaque thin film 10 is not hollow but thin. Also in the case of this embodiment, the same effect as that of the first embodiment is exhibited. Therefore, the shape of the opaque thin film is not particularly limited.

【0011】上記実施例においては逆スタガー型薄膜ト
ランジスタを例にとって説明したが、本発明は当然のこ
とながら順スタガー型薄膜トランジスタに対しても適用
することができる。更にはまた本発明のスリット部のピ
クセル電極切断を液晶が充填されたパネル内において実
施した場合には、切断によるピクセル電極材料の液晶中
への混合量が少なくて済み、液晶の物理的特性の劣化が
最小となる効果も現れる。
In the above embodiment, the reverse stagger type thin film transistor is described as an example, but the present invention can be naturally applied to the forward stagger type thin film transistor. Furthermore, when the pixel electrode cutting of the slit portion of the present invention is carried out in a panel filled with liquid crystal, the amount of the pixel electrode material mixed in the liquid crystal due to cutting is small, and the physical characteristics of the liquid crystal The effect of minimizing the deterioration also appears.

【0012】[0012]

【発明の効果】以上説明したように本発明は、透明な蓄
積容量用下部電極の存在する近傍の透明なピクセル電極
部分にスリットを設け、しかも後に切断されるべきこの
スリット部のピクセル電極を中空とする不透明な薄膜を
合わせて配置したために、視認性の困難な透明電極を不
要に損傷させることなく、容易に所望とするピクセル電
極を最小の面積で切断することができる。しかも不透明
な中空薄膜は、液晶の駆動によって生じるスリット部か
らの光漏れ量を最小とすることができる。従って本発明
の薄膜トランジスタ基板を用いた液晶パネルは、全黒表
示画面において白点欠陥が著しく少なくなり、高画像品
質を提供するという効果を有する。
As described above, according to the present invention, a slit is provided in the transparent pixel electrode portion in the vicinity of the transparent storage capacitor lower electrode, and the pixel electrode in this slit portion to be cut later is hollow. Since the opaque thin film is arranged together, the desired pixel electrode can be easily cut in the minimum area without unnecessarily damaging the transparent electrode which is difficult to see. Moreover, the opaque hollow thin film can minimize the amount of light leakage from the slit portion caused by driving the liquid crystal. Therefore, the liquid crystal panel using the thin film transistor substrate of the present invention has the effect of significantly reducing white spot defects in an all black display screen and providing high image quality.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す薄膜トランジスタ
基板の平面図である。
FIG. 1 is a plan view of a thin film transistor substrate showing a first embodiment of the present invention.

【図2】本発明の第2の実施例を示す薄膜トランジスタ
基板の平面図である。
FIG. 2 is a plan view of a thin film transistor substrate showing a second embodiment of the present invention.

【図3】従来の薄膜トランジスタ基板を示す平面図であ
る。
FIG. 3 is a plan view showing a conventional thin film transistor substrate.

【図4】図3のA−A′線断面図である。FIG. 4 is a cross-sectional view taken along the line AA ′ of FIG.

【符号の説明】[Explanation of symbols]

2 ゲート電極 2′ ゲート電極バスライン 3 絶縁膜 4 非晶質シリコン 5 ドレイン電極 5′ ドレイン電極バスライン 6 ソース電極 7 ピクセル電極 8 下部電極 8′ 下部電極バスライン 9 スリット 10 不透明薄膜 2 gate electrode 2'gate electrode bus line 3 insulating film 4 amorphous silicon 5 drain electrode 5'drain electrode bus line 6 source electrode 7 pixel electrode 8 lower electrode 8'lower electrode bus line 9 slit 10 opaque thin film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 蓄積容量用下部電極と、ゲート電極と、
層間絶縁膜と、非晶質シリコン層と、ソース及びドレイ
ン電極と、ソース電極に接続されたピクセル電極とを具
備する薄膜トランジスタ基板において、前記下部電極近
傍のピクセル電極部にスリットを具備し、しかもスリッ
トの少なくとも一部が不透明薄膜で光学的に遮蔽されて
いることを特徴とする薄膜トランジスタ基板。
1. A lower electrode for a storage capacitor, a gate electrode,
In a thin film transistor substrate having an interlayer insulating film, an amorphous silicon layer, source and drain electrodes, and a pixel electrode connected to the source electrode, a slit is provided in a pixel electrode portion near the lower electrode, and a slit is provided. A thin film transistor substrate, characterized in that at least a part thereof is optically shielded by an opaque thin film.
JP8681792A 1992-04-08 1992-04-08 Thin-film transistor substrate Withdrawn JPH05289101A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8681792A JPH05289101A (en) 1992-04-08 1992-04-08 Thin-film transistor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8681792A JPH05289101A (en) 1992-04-08 1992-04-08 Thin-film transistor substrate

Publications (1)

Publication Number Publication Date
JPH05289101A true JPH05289101A (en) 1993-11-05

Family

ID=13897364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8681792A Withdrawn JPH05289101A (en) 1992-04-08 1992-04-08 Thin-film transistor substrate

Country Status (1)

Country Link
JP (1) JPH05289101A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000002802A (en) * 1998-06-23 2000-01-15 김영환 Liquid crystal display device
US6057905A (en) * 1997-10-06 2000-05-02 Sharp Kabushiki Kaisha Liquid crystal display electrode with a slit formed around the periphery to shield the inner portion from external electric fields
KR100267995B1 (en) * 1997-10-30 2000-10-16 구자홍 Lcd and its fabrication method
KR100267993B1 (en) * 1997-11-26 2000-10-16 구자홍 liquid crystal display and method of the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6057905A (en) * 1997-10-06 2000-05-02 Sharp Kabushiki Kaisha Liquid crystal display electrode with a slit formed around the periphery to shield the inner portion from external electric fields
KR100267995B1 (en) * 1997-10-30 2000-10-16 구자홍 Lcd and its fabrication method
KR100267993B1 (en) * 1997-11-26 2000-10-16 구자홍 liquid crystal display and method of the same
KR20000002802A (en) * 1998-06-23 2000-01-15 김영환 Liquid crystal display device

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