JPH0527881A - Recovering input circuit - Google Patents

Abstract

PURPOSE:To obtain a recovering input circuit capable of reducing the current flowing in a pull-up transistor even when the recovered input at a recovering input terminal is a low level at the time of the standby mode of an microcomputer. CONSTITUTION:This circuit is constituted by inputting the output from a timer 5 using a clock signal phi outputted from a rewritable programmable resistor 4 and from an oscillation circuit oscillating even at the time of a standby mode as a count source in the gate of a pull-up transistor 2 via a NOR gate 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reset input circuit for a microcomputer, and more particularly to reduction of power supply current in a standby mode.

[0002]

2. Description of the Related Art FIG. 3 is a diagram showing a circuit of a conventional recovery input circuit. In FIG. 3, 1 is a recovery input terminal, 2 is a pull-up transistor, 6 is a rewritable programmable register, and 7 is a programmable register 6. An inverter having an output as an input, 8 an inverter having an output of a recovery input terminal as an input, 9 is connected between an output of the inverter 8 and a signal line of the wakeup signal c, and has a gate input as an output of the programmable register 6. Transmission gate, 10 is a recovery input terminal and wakeup signal c
Is a transmission gate that is connected between the signal lines and has the gate input as the output of the inverter 7, and 11 is an external switch.

The microcomputer input by the return input circuit returns from the standby mode to the normal operation mode when the wakeup signal c becomes high level. Further, the determination of whether the input of the return input terminal 1 is high level or low level is made by a circuit in the microcomputer (not shown).

Next, the operation will be described. First, the case where the microcomputer returns from the standby mode to the normal operation mode when the input of the return input terminal 1 changes from the low level to the high level will be described.

It is assumed that the external switch 11 is turned on, and the microcomputer enters the standby mode after the programmable register 6 is set to the low register in the state where the low level signal is input to the return input terminal 1. At this time, the transmission gate 9 receives the low level of the programmable register 6 and becomes non-conductive,
Further, since the transmission gate 10 becomes conductive upon receiving the inverted level of the programmable register 6, the low level of the return input terminal 1 passes through the transmission gate 10 and becomes the wakeup signal c.

Then, the switch 11 is turned off in this state.
Then, the return input terminal 1 becomes high level, the wakeup signal c becomes high level, and the microcomputer returns from the standby state to the normal operation mode.

In this case, since the return input is at the low level during the standby of the microcomputer, the current I always flows (FIG. 3).

Next, the case where the microcomputer returns from the standby mode to the normal operation mode when the input of the return input terminal 1 changes from the high level to the low level will be described.

It is assumed that the external switch 11 is turned off, the high-level signal is input to the return input terminal 1, and the programmable register 6 is set to the high register. At this time, the transmission gate 9 is rendered conductive by receiving the high level of the programmable register 6, and the transmission gate 10 is rendered non-conductive by receiving the inverted level of the programmable register 6, so that the inverted input of the return input terminal 1 The low level becomes the wakeup signal c.

Subsequently, when the switch 11 is turned on in this state, the return input terminal 1 becomes low level, the wakeup signal c becomes high level, and the microcomputer returns from the standby state to the normal operation mode.

[0011]

Since the conventional return input circuit is constructed as described above, when the return input terminal 1 is in the standby mode with the low level, the current I flows through the pull-up transistor 2. There was a problem that the current flowed and the power supply current increased.

The present invention has been made in order to solve the above problems, and when the microcomputer is in the standby mode, the power supply current flowing through the pull-up transistor 2 is supplied even if the return input terminal 1 is at the low level. The purpose is to obtain a return input circuit that can be kept small.

[0013]

According to another aspect of the present invention, there is provided a reset input circuit, wherein a gate of a pull-up or pull-down transistor for applying a potential to a restore input terminal is provided with a clock signal from a programmable register and an oscillator circuit which oscillates in a standby mode. The control is performed by connecting to the output of the timer circuit which is the count source.

[0014]

In the recovery input circuit according to the present invention, the pull-up or pull-down transistor that applies a potential to the recovery input terminal is periodically activated only for a certain short period of time, so that the current flowing through the pull-up or pull-down transistor becomes an average value. I tried to reduce it.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a circuit of a recovery input circuit according to an embodiment of the present invention. In FIG. 1, 1 is a recovery input terminal, 2 is a pull-up transistor, and φ is not shown. Clock signal from the oscillation circuit, 5 is a timer using the clock signal φ as a count source, 4 is a rewritable programmable register, 3 is a NOR gate that receives the outputs of the timer 5 and the register 4, and the output is pull-up. It is connected to the gate of the transistor 2. Reference numeral 8 is an inverter having a return input of 1 as an input, 6 is a programmable register, 7 is an inverter having an output of the programmable register 6 as an input, 9
Uses the output of programmable register 6 as the gate input,
A transmission gate 10 connected between the output of the inverter 8 and the signal line of the wake-up signal c has a gate input of the output of the inverter 7, and a transmission gate connected between the return input and the signal line of the wake-up signal c. Is.

FIG. 2 is a timing chart of the return input circuit according to the embodiment of the present invention.
b and I respectively show the waveforms of the portions corresponding to FIG.

Next, the operation will be described. As in the conventional example, when the wakeup signal c becomes high level, the microcomputer returns from the standby mode to the normal operating state. Further, the determination of whether the input of the return input terminal 1 is high level or low level is made by a circuit in the microcomputer (not shown).

First, the case where the standby mode is returned to the normal operation mode when the input of the return input terminal 1 changes from the low level to the high level will be described.

It is assumed that the external switch 11 is turned on, and the microcomputer enters the standby mode after setting both the programmable registers 4 and 6 to the low level in the state where the low level signal is input to the return input terminal 1. .

At this time, since the clock signal φ is output from the oscillation circuit that is oscillating even in the standby mode,
The overflow signal b of the timer 5 is always output periodically as shown in FIG. When the overflow signal b becomes high level, the signal a becomes low level,
The pull-up transistor 2 is active only during this period. Therefore, the current I flows only when the overflow signal b becomes high level as shown in FIG. 2, and the average value is suppressed to be smaller than that in the case where the current I constantly flows.

Next, when the external switch 11 is turned off at the timing of T ₁ in FIG. 2, the input potential of the return input terminal 1 becomes high level, and the pull-up transistor 2 is pulled up at the next high level timing of overflow of the timer 5. Are active, but no current I flows.

Here, since the programmable register 6 is at a low level, the transmission gate 9 is non-conductive, the transmission gate 10 is conductive, and when the input potential of the return input terminal 1 becomes high level, the wakeup signal c also becomes high level. Becomes Therefore, the microcomputer changes from the standby mode to the normal operation mode.

Next, the case where the standby mode is returned to the normal operation mode when the input of the return input terminal 1 changes from the high level to the low level will be described.

When a high level is input to the programmable register 4, the signal a is constantly at low level, so that the pull-up transistor 2 is always active.
At this time, when the external switch 11 is turned off, the input of the return input terminal 1 becomes high level. Further, it is assumed that the microcomputer is in the styby mode with the high level input to the programmable register 6.

After that, when the switch 11 is turned on and the input of 1 becomes low level, the wake-up signal c becomes high level through the transmission gate 9 which is conductive at this time, and the microcomputer changes from the standby mode to the normal operation mode. Becomes

As described above, when the pull-up transistor 2 which applies a potential to the return input terminal 1 is periodically made active only for a certain short period, the current I is only during that period.
Is flowing, and the current I can be reduced as an average value as compared with the case where it is flowing steadily.

Although the pull-up transistor 2 is used to apply the potential to the return input terminal 1 in the above embodiment, a similar effect can be obtained by using a pull-down transistor instead of the pull-up transistor 2.

[0028]

As described above, according to the restoration input circuit according to the present invention, the pull-up or pull-down transistor of the restoration input terminal is activated periodically in the standby mode, so that the power supply current can be reduced. The current consumption can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a reset input circuit according to an embodiment of the present invention.

FIG. 2 is a timing diagram of a return input circuit according to an embodiment of the present invention.

FIG. 3 is a circuit diagram of a conventional return input circuit.

[Explanation of symbols]

1 Return input terminal 2 pull-up transistor 3 NOR gate 4 programmable registers 5 timer 6 programmable registers 7 inverter 8 inverter 9 Transmission gate 10 Transmission gate 11 External switch φ clock signal

Claims (2)

[Claims] 1. A recovery input circuit for a microcomputer having a standby mode, a recovery input terminal for recovering the microcomputer from a standby mode to a normal operation mode, and a pull-up transistor for applying a potential to the recovery input terminal. A programmable register capable of setting this level according to the input level of the return input terminal only when entering a standby mode, and a timer using a clock signal from an oscillation circuit that operates even during standby of the microcomputer as a count source And a gate input of the pull-up transistor is controlled by an output of the timer and an output of the programmable register. 2. The return input circuit according to claim 1,
A return input circuit characterized in that a pull-down transistor is used instead of the pull-up transistor.