JPH05276130A - Clock phase control system for tdma communication - Google Patents

Abstract

PURPOSE:To provide the clock phase control system of a TDMA (time division multiaccess) communication by which a line setting can be attained by matching the phase of the clock of a slave station with the phase of the reference clock of a master station in a short time. CONSTITUTION:Phase matching data transmitted from a slave station by the arbitrary phase of the slave station clock from a slave station clock generation part 1, are receive by the master station, and a received signal waveform is converted into a peak detection waveform indicating the peak of a signal by a peak detecting part 9. Then, the peak detecting waveform and the signal waveform of a master station reference clock from a master station reference clock generating part 6 are inputted to a phase deviation detecting part 8 in order to search the phase deviation of the slave station clock, the feedback of the phase deviation data to the slave station clock generating part 1 is operated, and the phase of the slave station clock can be matched with the phase of the master station reference clock.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock phase control system for adjusting clock phases in QPSK (four-phase phase modulation) transmission of TDMA (time division multiple access) communication, and in particular, to significantly reduce the time for phase adjustment. The present invention relates to a clock phase control method for TDMA communication that can be shortened.

[0002]

2. Description of the Related Art Since TDMA communication is performed using a pair of time zones allocated in a TDMA frame, it is necessary to accurately match the phases of a slave station's transmission clock and a master station's reference clock when a line is set up. There is.

FIG. 3 is a block diagram showing a conventional clock phase control method. The conventional clock phase control method has a slave station clock generator 1, an error measurement data generator 2, and a slave station transmitter 3 on the slave station side, and a master station receiver 5 on the master station side. This is performed in the configuration including the master station reference clock generating unit 5 and the error measuring device 7.

In the conventional clock phase control system, first,
In the slave station, the slave station clock from the slave station clock generator 1 is set to a certain phase, error measurement data is output from the error measurement data generator 2 at that phase, and error measurement is performed from the slave station transmitter 4. Signal for use. In the master station, the master station receives this signal in the master station, and the error measuring device 7 measures the phase shift (error) from the master station reference clock from the master station reference clock generating section 5. Then, the operation of measuring the error by repeatedly changing the clock phase of the slave station is repeated, and the clock phase with the minimum error is determined as the clock phase of the slave station.

[0005]

However, in the above-mentioned conventional clock phase control method of TDMA communication, in order to optimize the clock phase of the slave station, the clock phase is changed from the slave station and the error measurement signal is repeatedly received. Since it is necessary to send the error message and repeat the error measurement, the processing method is complicated and there is a problem that it takes time to set up the line.

The present invention has been made in view of the above circumstances, and provides a clock phase control system for TDMA communication capable of setting a line by adjusting a clock phase of a slave station to a phase of a master station reference clock in a short time. The purpose is to provide.

[0007]

DISCLOSURE OF THE INVENTION The present invention for solving the above-mentioned problems of the prior art is, in a clock phase control system of TDMA communication, transmitting a sine wave signal from a slave station according to the phase of the slave station clock, The sine wave signal is received at the station, the waveform of the received sine wave signal is converted into a peak detection waveform indicating the peak of the waveform, and the signal waveform of the master station reference clock of the master station and the peak detection waveform are used. The phase shift data is detected and the phase shift data is fed back to the slave station to correct the phase shift of the slave station clock.

[0008]

According to the present invention, the sine wave signal is transmitted from the slave station in the phase of the slave station clock, and the peak is detected from the waveform of the sine wave signal received by the master station to obtain the peak detection waveform. A clock phase control method is used to correct the phase of the slave station clock by detecting the phase shift between the waveform and the waveform of the master station reference clock, and feeding back the phase shift data to the slave station. The phase shift can be accurately detected by only transmitting the wave signal once, and the time required for phase matching can be greatly reduced.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a TDMA according to an embodiment of the present invention.
It is a block diagram for implementing a clock phase control method for QPSK transmission in communication. It should be noted that parts having the same configuration as in FIG.

The clock phase control method of TDMA communication according to the present embodiment has a slave station clock generator 1, a slave station transmitter 3, and a slave station transmission data generator 4 on the slave station side. Then, the configuration is performed in a configuration including the master station reception unit 5, the output peak detection unit 9, the master station reference clock generation unit 6, and the phase shift detection unit 8.

In particular, the slave station transmission data generator 4 is
The data of the repetitive pattern "0, 1, 0, ..." Is output, and this data becomes the data for phase matching. Further, the peak detection unit 9 receives the I.V. signal from the master station reception unit 5. The peak of the valley of the signal waveform of the Q output is detected, and the peak is output as a short pulse signal. The phase shift detection unit 8 outputs the pulse signal from the peak detection unit 9 and the master station reference clock generation unit 6. The phase shift from the master station reference clock is detected.

The clock phase control method of this embodiment will be described with reference to FIG. When setting the line for TDMA communication,
In the slave station transmission data generator 4 of the slave station, "1, 0,
The phase matching data of the repeating pattern "1, 0, ..." Is transmitted to the slave station transmitter 3. Then, at an arbitrary phase of the slave station clock from the slave station clock generator 1, the slave station transmitter 3 wirelessly transmits the data as a transmission signal to the master station.

In the master station, the master station receiving section 5 receives this signal, and the I.V. The signal is output as a Q output to the peak detector 9, and the peak of the received signal waveform is detected by the peak detector 8 and converted into a pulse waveform. The obtained peak detection waveform and the waveform of the master station reference clock from the master station reference clock generation unit 6 are transferred to the phase shift detection unit 8, and in the phase shift detection unit 8, the peak detection waveform and the master station reference clock are transferred. The waveforms are compared to detect a phase shift, and the data of this phase shift is fed back to the slave station clock generator 1.

In the slave station, the phase of the slave station clock is corrected based on the phase shift data fed back from the master station, and the phase is adjusted to the master station reference clock from the master station reference clock generator 6.

Specifically, the phase shift data detected by the phase shift detector 8 is transmitted from the transmitter of the master station to the receiver of the corresponding slave station, and the controller for controlling the slave clock generator 1 is controlled. The phase shift data is given to control the phase of the slave station clock.

Next, the clock phase control method of this embodiment will be specifically described with reference to the signal waveform diagrams of FIGS. 2 (a) to 2 (d). FIG. 2A shows QPSK, I (or Q) when the master station receiving unit 5 receives the phase matching data “1, 0, 1, 0, ...” Sent from the slave station.
Is the waveform of. Then, as shown in FIG.
SK, I (or Q) has a sine waveform.

When this waveform is input to the peak detection section 9, as shown in FIG. 2B, the sine waveform is analyzed and a peak detection waveform which is a short pulse signal showing a peak is output. On the other hand, the signal waveform of the master station reference clock from the master station reference clock generator 6 is a rectangular pulse signal as shown in FIG.

The peak detection waveform of FIG. 2 (b) and FIG. 2 (c).
When the waveform of the reference clock of is input to the phase shift detection unit 8, the phase shift detection unit 8 compares the two waveforms, and FIG.
The phase shift indicated by is detected. Then, the phase shift data relating to this phase shift is used as the slave station clock generator 1 of the slave station.
To wirelessly feed back.

In the slave station, the phase of the slave station clock from the slave station clock generator 1 is corrected based on the fed back phase shift data to match the phase of the master station reference clock from the master station reference clock generator 6. .. In this way, the phase adjustment of the slave station clock is completed in a short time.

According to the clock phase control method of the present embodiment, the master station receives the phase matching data transmitted from the slave station clock generator 1 at an arbitrary phase of the slave station clock, and receives the received signal waveform. Is converted into a peak detection waveform indicating the peak of the signal in the peak detection unit 9, and the peak detection waveform and the waveform of the master station reference clock from the master station reference clock generation unit 6 are input to the phase shift detection unit 8 and the slave station clock is input. Of the slave station clock is generated and the phase shift data is fed back to the slave station clock generator 1 to match the phase of the slave station clock with the phase of the master station reference clock. The phase of the slave station clock from part 1 is not changed by measuring the phase shift by changing the phase of the slave station clock several times. Align can be performed, the time required for phase matching can be greatly reduced, there is an effect of the short line setting.

[0021]

According to the present invention, a sine wave signal is transmitted from a slave station in the phase of a slave station clock, and its peak is detected from the waveform of the sine wave signal received by the master station to obtain a peak detection waveform. Since the phase shift between the peak detection waveform and the master station reference clock waveform is detected and the phase shift data is fed back to the slave station, the clock phase control method is used to correct the phase of the slave station. The phase shift can be accurately detected by transmitting the sine wave signal of 1 time, and the time required for phase matching can be significantly shortened.

[Brief description of drawings]

FIG. 1 is a configuration block diagram showing a clock phase control method according to an embodiment of the present invention.

FIG. 2 is a signal waveform diagram relating to the clock phase control method of the present embodiment.

FIG. 3 is a configuration block diagram showing a conventional clock phase control method.

[Explanation of symbols]

1 ... Slave station clock generator, 2 ... Error measurement data generator, 3 ... Slave station transmitter, 4 ... Slave station transmission data generator, 5 ... Master station receiver, 6 ... Master station reference clock generator, 7 … Error measuring instrument, 8… Phase shift detector, 9
... Peak detector

Claims (1)

[Claims] 1. A peak detection waveform in which a sine wave signal is transmitted from a slave station according to the phase of a slave station, the sine wave signal is received in a master station, and the waveform of the received sine wave signal indicates a peak of the waveform. The phase shift data is detected from the signal waveform of the master station reference clock of the master station and the peak detection waveform, and the phase shift data is fed back to the slave station to correct the phase shift of the slave station clock. A clock phase control method for TDMA communication, characterized by: