JPH05275712A - Semiconductor nonvolatile memory device and its manufacture - Google Patents

Abstract

PURPOSE:To make the charge accumulation state of a floating gate sure and to enhance the reliability of a nonvolatile memory device by a method wherein a thin film which contains nitrogen atoms is formed between the floating gate and a metal interconnection. CONSTITUTION:A floating gate 13 and a selection gate 20 are patterned by using a photoetching method; immediately after that, a silicon nitride film 31 is deposited; an insulating film 15 is laminated and formed in such a way that at least the floating gate 13 is covered; an interconnection contact hole 26 is formed; an Al interconnection 16 is formed. Thansks to a shielding effect against heavy-metal ions by this constitution, the floating gate 13 is protected, it is possible to prevent a change in the characteristic of an element when the heavy-metal ions are mixed in a later process and it is possible to prevent the malfunction of the element. Since a silicon nitride film 31 is formed immediately after the floating gate 13 has been formed, the effect to prevent the heavy-metal ions becomes much greater, it is possible to prevent the change in the characteristic of the element and the malfunction of the element when the heavy-metal ions creep. Since a thin film which contains nitrogen functions as the trap of electrons, it is possible to enhance the charge holding characteristic of the title memory device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor nonvolatile memory device having a conductive film in an electrically floating state and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 7 shows a pattern plan view of a conventional example of a memory device of this type, FIG. 8 shows a sectional view taken along the line AA of FIG.
FIG. 9 shows a sectional view taken along the line BB of FIG. 7. This Figure 7-
FIG. 9 is obtained through a process of a conventional nonvolatile memory device, and here, an electrically rewritable nonvolatile memory device (abbreviated as EEPROM) having a one-layer polysilicon electrode structure is configured. There is.

That is, a polysilicon electrode 13 in an electrically floating state is laminated on a semiconductor substrate 11 via a silicon gate oxide film 12, and an oxide film 14, phosphorus, and Through the silicate glass layer 15 mixed with impurities such as boron, metal (A
l) The wiring layer 16 is provided. Here, 17 is a field oxide film, and 18a to 18d are diffusion layers of impurities of opposite conductivity type to the substrate 11. 18b and 18c are provided so as to sandwich the channel region 19, one of which is a source region of the data storage cell transistor 22 and the other of which is a drain region. One of 18a and 18b is a source region and the other is a drain region. These regions and the polysilicon gate electrode 2 are formed.
0 and the selection transistor 2 of the cell transistor 22
Make up 3. 18d is a word line. Reference numeral 24 is a tunnel oxide film, and 25 is a coupling oxide film.
It is for a capacitor that couples between d. 26 is Al wiring 1
6 contact hole.

In the structure described above, an oxide film 14 of about 300 angstroms and a silicate glass layer 15 containing impurities such as phosphorus and boron are provided between the polysilicon floating gate 13 and the Al wiring 16. Is intervening.

Here, the floating gate is an EEPROM "
It is a charge storage location that determines 1 "and" 0 ", and is more sensitive to electrical influences from the external environment than a conventional device in which the gate is biased. Therefore, the floating gate 13 functions as an EEPROM. However, in the above structure, many unwelcome impurities are mixed in from the formation of the floating gate 13 to the completion of the device. Especially heavy metal ions (Na ⁺ , Ka ⁺ Such)
Be careful of the behavior of.

This is because the heavy metal ions move depending on the charge accumulation state of the floating gate, and the amount of charges originally supposed to be in the floating gate may change apparently. If this fluctuation degree is large, erroneous reading may occur.

[0007]

SUMMARY OF THE INVENTION An object of the present invention is to ensure the charge storage state of the floating gate and improve the reliability of the nonvolatile memory device.

[0008]

The present invention provides a semiconductor substrate, an insulating film provided on the surface of the semiconductor substrate,
A conductive film provided in the insulating film in an electrically floating state, a metal wiring film provided on the insulating film, and the conductive film between the metal wiring film and the conductive film so as to cover the conductive film. And a thin film containing a nitrogen atom, the semiconductor non-volatile memory device.

That is, according to the present invention, in a nonvolatile memory device (electrically rewritable EPROM, EEPROM, etc.) in which the floating gate is an electrode above the gate electrode, a nitrogen atom is provided between the floating gate and the metal wiring. Forming a thin film containing silicon (such as a silicon nitride film). This nitrogen-containing thin film has a shielding effect on heavy metal ions, so that the charges accumulated in the floating gate are well retained.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view of this embodiment, but this is an example of a case corresponding to those of FIGS. 7 to 9 described above, and therefore, corresponding parts are designated by the same reference numerals. The feature of this embodiment is that
Immediately after patterning the floating gate 13 and the select gate 20 by using a normal photo-etching method, a silicon nitride film 31 is formed.
Is deposited, and at least the floating gate is covered with this nitride film 31. The silicon nitride film 31 can be formed by, for example, a CVD method, and the film thickness is
Considering the stress of the nitride film, it is set to 1000 angstroms or less. After that, the insulating film 15 is laminated and the wiring contact hole 26 is provided, and then the Al wiring 16 is formed.

With the configuration shown in FIG. 1, the floating gate 1
Since 3 is covered with the silicon nitride film 31, the floating gate 13 is protected by the shielding effect against the heavy metal ions, and therefore, the characteristic variation of the element due to the mixing of the heavy metal ions in the subsequent process and the malfunction (wrong data reading).
Can be prevented. Further, since the silicon nitride film 31 is provided immediately after the floating gate 13 is provided, the effect of preventing heavy metal ions is further enhanced.

FIG. 2 shows a second embodiment of the present invention. In this embodiment, the floating gate electrode 13 and the select gate 20 are patterned and formed by a usual photo-etching method, then a silicon oxide film 14 is formed, and then a silicon nitride film 31 is deposited and formed. Here, the silicon oxide film 14 is formed by a thermal oxidation method, and the silicon nitride film 31 is CV.
It is formed by the D method.

FIG. 3 shows a third embodiment of the present invention. In this embodiment, after forming the floating gate electrode 13 and the select gate 20 by patterning using a normal photo-etching method, a sidewall 41 for performing ion implantation of a source and a drain (high concentration portion) of a transistor is formed with silicon. The silicon nitride film 31 is deposited and formed immediately after the formation of the oxide film and the directional etching method. Here, the silicon oxide film 41 and the silicon nitride film 31 are both formed by the CVD method.

FIG. 4 shows a fourth embodiment of the present invention. In this embodiment, after forming the floating gate electrode 13 and the select gate 20 by patterning using a normal photo-etching method, a sidewall 41 for performing ion implantation of a source and a drain (high concentration portion) of a transistor is formed with silicon. Oxide film formation, directional etching method, etc., followed by silicon oxide film 1
Immediately after the formation of No. 4, the silicon nitride film 31 is deposited and formed. Here, the silicon oxide film 41 and the silicon nitride film 31 are both formed by the CVD method, and the silicon oxide film 14 is formed by the thermal oxidation method.

FIG. 5 shows a fifth embodiment of the present invention. In this embodiment, the floating gate electrode 13 and the select gate 20 are patterned by using a normal photo-etching method, and then a first phosphosilicate glass (PSG) or silicon oxide film is deposited, and then boron is continuously formed. -Insulating film 15 is formed by depositing phosphorus silicate glass (BPSG) and second phosphorus silicate glass and then applying heat treatment. After that, a silicon nitride film 31 is deposited and formed. The first and second PSGs, BPSGs, silicon oxide films, and silicon nitride films are formed by the CVD method.

FIG. 6 shows a sixth embodiment of the present invention. This embodiment is a combination of the above embodiments. That is,
After forming the floating gate 13 and the select gate 20 by patterning, the silicon oxide film 14 and then the silicon nitride film 31a are formed thereon. Furthermore, after depositing the first phosphorus silicate glass (PSG) or silicon oxide film, boron / phosphorus silicate glass (BPS) is continuously formed.
G) After depositing the second phosphorus silicate glass, heat treatment is applied to form the insulating film 15. After that, a silicon nitride film 31b is deposited and formed.

With the structure as shown in FIG. 6, even if heavy metal ions intrude in the process after the formation of the silicon nitride film 31a, the heavy metal ions can be made to act on the floating gate 13 by the action of the silicon nitride film 31a. Never move to. Further, since the upper layer is also guarded by the silicon nitride film 31b, when the heavy metal ions (contamination source) are between the silicon nitride films 31a and 31b, the heavy metal ions can be confined in that region. There is no spread of pollution to. When the source of heavy metal contamination is above the silicon nitride film 31b, the floating gate 13 is shielded by the double silicon nitride film, and the shielding effect against heavy metal ions is further improved.

The present invention is not limited to the above embodiment, but various applications are possible. For example, in the example,
Although the silicon nitride film is used as the film containing nitrogen atoms, it is not limited to this and various materials such as Si _x O _y N _z (silicon oxynitride film) can be selected. Also, SiO ₂ deposited by the plasma CVD method contains N as a reaction gas.
_{Since 2} is used, nitrogen atoms are present in the film. In the present invention, the film thus formed can be used as a thin film containing the nitrogen atom.

[0019]

As described above, according to the present invention, it is possible to prevent the characteristic change and malfunction of the element due to the invasion of heavy metal ions with respect to the conductive film in the floating state. In addition, since the thin film containing nitrogen acts as a trap for electrons leaked from the floating gate, it is possible to improve the charge retention characteristic.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first embodiment of the present invention.

FIG. 2 is a sectional view showing a second embodiment of the present invention.

FIG. 3 is a sectional view showing a third embodiment of the present invention.

FIG. 4 is a sectional view showing a fourth embodiment of the present invention.

FIG. 5 is a sectional view showing a fifth embodiment of the present invention.

FIG. 6 is a sectional view showing a sixth embodiment of the present invention.

FIG. 7 is a pattern plan view of a conventional element.

8 is a sectional view taken along the line AA of FIG.

9 is a cross-sectional view taken along the line BB of FIG.

[Explanation of symbols]

11 ... Semiconductor substrate, 12 ... Gate insulating film, 13 ... Floating conductive film, 14, 15, 25 ... Insulating film, 16 ... Al wiring, 18a-18d ... Layer of opposite conductivity type to semiconductor substrate, 2
2 ... Memory cell transistor, 23 ... Select transistor, 24 ... Tunnel oxide film, 26 ... Contact hole, 3
1, 31a, 31b ... Silicon nitride film.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location G11C 16/04

Claims (5)

[Claims] 1. A semiconductor substrate, an insulating film provided on the surface of the semiconductor substrate, a conductive film in the insulating film in an electrically floating state, and a metal provided on the insulating film. A semiconductor nonvolatile memory device, comprising: a wiring film; and a thin film containing a nitrogen atom, the thin film being provided between the metal wiring film and the conductive film so as to cover the conductive film. 2. The semiconductor nonvolatile memory device according to claim 1, wherein the conductive film forms a floating gate, and a source and a drain are provided so as to sandwich a channel region on the surface of the semiconductor substrate below the conductive film. 3. A step of forming a conductive film so as to be covered with an insulating film provided on a semiconductor substrate and to be in an electrically floating state, and to cover the conductive film in or on the insulating film, A method for manufacturing a semiconductor nonvolatile memory device, comprising: providing at least one thin film containing nitrogen atoms; and providing a metal wiring film above the thin film. 4. The semiconductor non-volatile memory device according to claim 3, wherein the conductive film is on a channel region between a source and a drain provided on a surface portion of the semiconductor substrate to form a floating gate. Method. 5. The method of manufacturing a semiconductor non-volatile memory device according to claim 4, wherein another conductive film for controlling a means for transferring charges to the conductive film is not provided on the conductive film.