JPH05274819A - Storage or storage reading control circuit for voice data - Google Patents

Abstract

PURPOSE:To prevent the insufficiency of the storage data in a memory storing reproduced data and the break of voice by repeating reproductions in the parts where correct voice information is not possible to be reproduced. CONSTITUTION:The reproduction designation location of decode data is detected in a data storage range detection circuit 604, a storage address is generated from a storage address designation circuit 610 and the decode data is stored in the prescribed address of a memory 7. When a restorage command is given from an error check circuit 600 by the generation of a reproduced error, a storage operation is interrupted and it becomes the restorage operation. When this restorage is repeated a fixed number of times, a jumping command is generated by a jumping command generation circuit 606, a reproduction location designation circuit 605 is updated without updating a storage address designation circuit 613 and new decode data is stored in the previous storage address by being superposed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention, by reproducing a spiral recording track at a speed higher than the data speed and repeating a reproduction again when a reproduction error is detected, to store correct reproduction data in a memory at all times. The present invention relates to a storage control circuit that is effective by adopting a disc player that produces sound without reproduction errors.

[0002]

2. Description of the Related Art No. 160 of the December 9, 1991 issue of Nikkei Electronics magazine "Nikkei Electronics"
On pages 168 to 168, explanations are given regarding a mini disk recorder capable of recording and reproducing sound. This mini disk recorder compresses the audio of two channels to about ⅕ and intermittently records the audio of about two seconds as information of about 0.5 seconds to form a recording track, which is recorded during reproduction. The tracks are sequentially reproduced and stored in the memory, and the stored information is continuously read out to expand the data to reproduce the sound. The data structure of one cluster of each intermittent recording track is composed of 36 sectors as a whole, fixed data having no information in the preceding 3 sectors as link data, and display data such as lyrics of karaoke in the following 1 sector as sub data. Further, compressed audio data is arranged as main data in the following 32 sectors.

Address data called a header is provided at the head of each sector, and a cluster number and a sector number are added to this address data. Therefore, the sub data can be identified by detecting this sector number. Further, the main data of 2 sectors includes 11 sound groups, and the reproduction is performed intermittently in units of these 2 sectors. As a result, at the time of reproduction, the maximum amount of reproduction data is stored in the memory.

FIG. 2 is a circuit block diagram of a reproducing portion of this mini disk recorder. An optical pickup 1 for optically reproducing a recording track of a disc inputs the reproduced output to an RF amplifier 2 and amplifies the amplified output to the servo circuit 1
3 to the address decoder 3 and the EFM decoder 4. The servo circuit 13 forms a tracking control signal and a focus control signal from the reproduced and amplified output, supplies the tracking control signal and the focus control signal to the optical pickup 1 and the feed motor 12, and performs rotation based on a synchronization signal obtained via a system controller. Disk motor 1 for forming control signal
1 is being supplied. Therefore, the disk is kept at a constant linear velocity by the disk motor 11, and the pickup 1 correctly follows the recording track and makes its focus coincide with the recording track surface.

Further, the address decoder 3 detects an ADIP code obtained by FM demodulating the high frequency component of the tracking error signal in the reproduction amplification output and inputs it to the EFM decoder 4. The EFM decoder 3 selects a subcode detected in the EFM decoder 4 or an ADIP code to be input according to a selection signal obtained from the system controller 10 and supplies it to the system controller 10. Further, the EFM decoder 4 separates the sync signal together with the subcode,
The synchronization signal is supplied to the system controller 10.
The system controller sends a synchronization signal to the servo circuit 1
3 and the access control of the pickup is executed based on the subcode indicating the reproduction position or the ADIP code to enable the intermittent reproduction.

The EFM demodulated data is input to the memory controller 6 together with error detection data that cannot be corrected in the CIRC decoder 5 and subjected to error correction and the like. The memory controller 6 updates and stores the decoded data, which is repeatedly input by the interlaced reproduction of the optical pickup 1, every two sectors and stores the updated data in the memory 7, and also in the memory 7 in accordance with the read command of the ATRAC decoder 8 in the subsequent stage. The data is read sequentially.
The feature of this mini disk recorder is that when an uncorrectable error occurs, the memory 7 is restored and correct decoded data can be stored. In order to execute this replay, the memory controller 6 suspends the update of the play range of the optical pickup 1 during the replay period.

The data input to the ATRAC decoder 8 is decompressed in sound group units and input to the DA conversion circuit 9. As a result, the reproduced audio signal is derived from the DA conversion circuit 9 without interruption. still,
The configuration of FIG. 2 is a circuit block diagram showing the reproduced portion extracted in accordance with the description of the recorder of FIG. 1 on page 160 of the aforementioned article.

However, in the case of the above-described conventional example, there is a case where correct reproduction is still impossible due to a dropout that is difficult to correct even if the reproduction is executed again, and when the reproduction is repeated until it is reproduced correctly, the memory in the memory is stored. The data is reduced and the audio is cut off, making subsequent playback difficult. Therefore, when the reproduction is executed a certain number of times, it is conceivable to reproduce a new reproduction position subsequent to the reproduction position and store the reproduced voice information at a new address.

[0009]

However, if the voice information including an error is left in the memory and is read out, erroneous voice information is supplied to the subsequent voice processing circuit, and noise is generated in the derived voice signal. Therefore, it is necessary to remove audio information including an error from the memory when the reproduction is skipped and the reproduction is skipped.

[0010]

SUMMARY OF THE INVENTION Therefore, according to the present invention, an interlacing command generating means for generating an interlacing command when a reproduction error cannot be eliminated in a mini-disc player, and a reproduction for updating a reproduction position based on this interlacing command. A position specifying means and a storage address generating means for sequentially storing decoded data having no reproduction error in the memory are provided.

[0011]

According to the present invention, therefore, only the decoded data that does not include a reproduction error is stored in the memory.

[0012]

The present invention will be described below with reference to the embodiment shown in FIG. In this embodiment, the present invention is applied to the memory controller of the mini disc player shown in FIG. 1, and the decoded data derived from the CIRC decoder 5 are input to the gate circuit 602 and the header detection circuit 601, respectively.

The header detection circuit 601 detects the header data obtained by detecting the header multiplexed prior to the audio information in sector units, and the data storage range detection circuit 604.
Is supplied to the reproduction range passage detection circuit 603. This header data is arranged at the head of each sector and includes a cluster number and a sector number, and is used as an index of the reproduction position.

The data storage range detection circuit 604 compares the reproduction position data generated by the reproduction position specification circuit 605 with the header data and stores the storage information in the data period of two sectors corresponding to the audio information of the specified reproduction position. The detection output is generated and supplied to the gate circuit 602, the counter 611, and the input check circuit 607. Therefore, the gate circuit 602 is released during the input period of the audio information in the decoded data, and only the audio information is supplied to the memory. The reproduction range passage detection circuit inputs the passage detection output to the servo circuit 13 via the system controller 10 when the audio information corresponding to the reproduction position information is reproduced and the header data of the next sector is detected. The optical pickup 1 is urged to perform a track jump. Due to this track jump, the pickup 1 starts the reproduction scanning from the sector before the designated reposition. Further, the counter 611 provided in the storage address designating means 610 counts during the data period of two sectors, and the storage start address and count value obtained from the storage address designating circuit 613 are added by the adding circuit 612. The added value is supplied to the memory 7 as a storage address. Therefore, the voice information is sequentially stored in the memory 7. When the audio information for two sectors is correctly stored, the input check circuit 607 generates a memory update output after a fixed period from the generation of the memory information detection output, and the reproduction position designation circuit 605 and the memory address designation circuit 6
The designated state of No. 13 is updated, and the voice information of the subsequent reproduction position is designated to store new voice information at the subsequent address in the memory.

The stored voice information is sequentially read from the memory 7 in accordance with the read address generated by the read address generation circuit 609. This read address generation circuit 609
Generates a read address each time a read command is issued from the ATRAC decoder 8 and reads audio data in units of one sound group. If there is an error in the stored voice information when the voice information is stored, the voice information is re-stored. First, the uncorrectable error detection data C2 generated by the CIRC decoder 5 and the header error detection output generated by the header detection circuit 601 when the stored header data are not correctly updated are sent to the error check circuit 600. Is entered. The error check circuit 600 deactivates the stored information detection output from the data storage range detection circuit 604 by generating a re-store command, prevents the storage check output from the input check circuit 607, and is constituted by a counter. The jump instruction generating circuit 606 counts the re-stored instruction.

As a result, at the time of the next intermittent reproduction, the re-storing operation is executed to store the audio information at the same reproduction position in the memory 7 again. When an error occurs during this re-storing and a re-storing command is issued, the same re-storing operation is repeated. This storage operation is repeated three times, but when the third re-store command is issued during the third store operation, the jump command generation circuit 606 counts and detects the number of re-store commands and generates the jump command. .. This jump command is generated in order to skip the playback position by two sectors without updating the storage address and to store the discontinuous addresses in the memory due to the jump. Therefore, the reproduction position designation circuit 605 which inputs the jump command updates the reproduction position by two sectors, and the address register 608 which inputs the jump command stores the storage start address at that time as the jump address.

When such discontinuous voice information is stored without a gap, the voice signal waveform is disturbed at the discontinuous portion and noise is generated. Therefore, at the time of reading, it is necessary to provide a gap in the discontinuous portion and set the mute state to limit the generation of noise. Therefore, in the present embodiment, the data read control circuit 6
20 is provided to compare the address stored in the address register with the read address of the read address generation circuit 609 in the jump address detection circuit 623, and when the addresses match, a read restriction command for one sector period is generated. ing. During this read restriction command generation period, the read address generation circuit 609 blocks the generation of the read address, the error flag generation circuit 622 generates error flag data, and the switching circuit 621 replaces the voice data from the memory 7. Select the error flag data and select ATRAC decoder 8
Supply to. As a result, the ATRAC decoder which receives the error flag data forms and derives the 0-level audio data and executes the audio mute. If the jump command is continuously generated and the same storage start address is stored in the register, if the read limit command is formed in proportion to the number of times of continuous read, the read limit command will be generated in real time if the mute period is continued. It also enables faithful audio reproduction. Also, it goes without saying that the error flag generation period may be limited to one sound group in order to eliminate noise.

In the above-described embodiment, the memory controller 6 is composed of hardware, but part or all of it may be composed of software, and it goes without saying that such a structure is included in the present invention. Nor. Further, the error check circuit 600 described above may input a detection output of an optical off-track state and generate a re-store command,
Various detection outputs can be selected to generate the re-memorize command.
It is not necessarily limited to the configuration of the embodiment.

Further, the jump command generation circuit 606 may be configured not only as a counter but also as a circuit configuration for setting the number of times of re-storing according to the amount of stored data, and it is not determined by the number of times of re-storing. Further, the data read control circuit 620 forms and derives the error flag by generation of the read address, but mute data may be generated instead of the error flag. Further, the first invention also includes a configuration in which stored data is continuously read out, and in such a case, if noise is noticeable, the audio data including before and after the discontinuous portion may be muted. ..

Further, the present invention is not limited to a mini disc player, but is a CD player having a so-called shock proof function, in which a disc is rotated at a high speed to be stored in a memory and reproduction is repeated when a reproduction error occurs, and a mini disc recorder having a reproduction function. Can also be adopted.

[0021]

As described above, according to the present invention, the sound is not interrupted even when the reproduction is not properly performed even if the reproduction is repeated, and the sound data including the error is not stored in the memory. The effect is great without the circuit in the subsequent stage malfunctioning.

[Brief description of drawings]

FIG. 1 is a detailed circuit block diagram of a memory controller adopting the present invention.

FIG. 2 is a block diagram of a reproducing circuit of a mini disc player.

[Explanation of symbols]

 7 memory 606 jump command generation circuit 605 reproduction position designation circuit 610 storage address designation circuit 609 read address generation circuit 608 address register 620 data read control circuit

Claims (2)

[Claims] 1. Playback audio data obtained by intermittently playing back a spiral recording track on which voice data is recorded is stored in a memory for each predetermined playback unit, and the stored data read from the memory is processed to form a playback audio signal. In addition, in a disc player that detects a playback error in the playback audio data and repeats intermittent playback again to store the correct playback audio data, if a playback error cannot be resolved despite repeated intermittent playback, a jump command is issued. An interlacing command generating means that is generated, a reproducing position specifying means that updates the reproducing unit of the recording track based on the interlacing command, and a reproducing unit that does not include the reproducing error without storing the decoded data of the reproducing unit that includes the reproducing error. A storage control circuit for voice data, comprising storage address generation means for storing in a memory. 2. Playback audio data obtained by intermittently playing back a spiral recording track on which audio data is recorded is stored in a memory for each predetermined playback unit, and the stored data read from the memory is processed to form a playback audio signal. In addition, in a disc player that detects a playback error in the playback audio data and repeats intermittent playback again to store the correct playback audio data, if a playback error cannot be resolved despite repeated intermittent playback, a jump command is issued. An interlacing command generating means that is generated, a reproducing position specifying means that updates the reproducing unit of the recording track based on the interlacing command, and a reproducing unit that does not include the reproducing error without storing the decoded data of the reproducing unit that includes the reproducing error. Storage address generation means to be stored in the memory, and discontinuous portion of the decoded data stored in the memory An address register for storing a discontinuous storage address corresponding to, a read address generating means for reading the data stored in the memory in the storage order, and a read address generation when the discontinuous address and the read address stored in the address register match. Data read control means for activating the means for a certain period of time and deriving substitute data instead of read data; and voice signal forming means for converting the read data into a voice signal and limiting a voice signal level when the substitute data is input. A storage / readout control circuit for audio data, which is configured by arranging