JPH0527357B2 - - Google Patents
Info
- Publication number
- JPH0527357B2 JPH0527357B2 JP58046561A JP4656183A JPH0527357B2 JP H0527357 B2 JPH0527357 B2 JP H0527357B2 JP 58046561 A JP58046561 A JP 58046561A JP 4656183 A JP4656183 A JP 4656183A JP H0527357 B2 JPH0527357 B2 JP H0527357B2
- Authority
- JP
- Japan
- Prior art keywords
- phase
- circuit
- output
- voltage
- neutral point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004804 winding Methods 0.000 claims description 48
- 230000007935 neutral effect Effects 0.000 claims description 42
- 239000003990 capacitor Substances 0.000 claims description 37
- 238000001514 detection method Methods 0.000 claims description 32
- 230000010363 phase shift Effects 0.000 claims description 29
- 230000003321 amplification Effects 0.000 claims description 12
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 12
- 230000003111 delayed effect Effects 0.000 claims description 9
- 239000013256 coordination polymer Substances 0.000 description 36
- 230000010354 integration Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 238000003079 width control Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 235000013599 spices Nutrition 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/14—Electronic commutators
- H02P6/16—Circuit arrangements for detecting position
- H02P6/18—Circuit arrangements for detecting position without separate position detecting elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Motors That Do Not Use Commutators (AREA)
Description
【発明の詳細な説明】
本発明はブラシレス直流電動機の回転子位置検
出を固定子巻線の巻線電圧によつて検出するよう
にした装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device that detects the rotor position of a brushless DC motor using the winding voltage of a stator winding.
従来よりブラシレス直流電動機の回転子位置検
出信号を固定子巻線の巻線電圧から直接得るよう
にしたものは種々提案されておる。その一例を第
1図によつて説明する。1は商用交流電源(例え
ばAC100V,60Hz)、2は交流電源1を整流平滑
して出力する整流回路で、ダイオードD1のアノ
ードとダイオードD2のカソードとを交流電源1
の一端に力率改善用のリアクトル3を介して接続
し、上記ダイオードD1のカソードとダイオード
D2のアノードとの間にコンデンサC1とC2を直列
に接続した回路と、コンデンサC3とを並列に挿
入し、上記コンデンサC1とC2の接続点を交流電
源1の他端に接続して、いわゆる倍電圧整流回路
を形成し、上記コンデンサC3の端子間から直流
出力を送出するようになつている。4はブラシレ
ス直流電動機(以下単に電動機と呼称する)で、
3相星形結線された固定子巻線5と回転子6から
なつている。7は上記整流回路2の出力端に接続
されて電動機4の固定子巻線5の通電制御を行う
いわゆる120゜通電形のパルス幅制御方式インバー
タ回路(以下単にインバータ回路と呼称する)
で、トランジスタ等からなる6個のスイツチング
素子Qu,Qx,Qv,Qy,Qw,Qzを2個づつ直列に
接続して組とし(QuとQx,QvとQy,QwとQz)、
これをブリツジ形に結線して整流回路2の出力端
に接続し、上記各組のスイツチング素子相互の接
続点(例えばQuとQxの接続点)を出力端として
固定子巻線5の各相に接続して、各スイツチング
素子の導通により固定子巻線5を各相毎に通電せ
しめるようになつておる。そして、上記スイツチ
ング素子Qu,Qx,Qv,Qy,Qw,Qzのベースには
入力側と出力側を絶縁してドライブ出力を送出す
るようにしたバツフアドライバーBDがそれぞれ
接続されておる。8は上記固定子巻線8の各相に
接続されて、固定子巻線電圧から回転子6の位置
検出信号を得るようにした位置検出回路で、コン
デンサCu,Cv,Cwの一端をそれぞれ抵抗Ru,
Rv,Rwを介して固定子巻線5の各相に接続した
抵抗とコンデンサからなる移相器の上記コンデン
サCu,Cv,Cwの他端を共通接続して中性点とな
し、これを接地した星形結線の移相回路9と、こ
の移相回路9の各移相器の出力端(抵抗とコンデ
ンサの接続点)に演算増幅器からなる比較器
CPu,CPv,CPwの非反転入力端子をそれぞれ接
続し、この比較器CPu,CPv,CPwの反転入力端
子を接地((即ち移相回路9の中性点と接続)し
た比較回路10とから形成され、固定子巻線5と
鎖交する回転子6の磁束の変化に応じた上記固定
子巻線5の各相の巻線電圧を相電圧としてうけた
移相回路9の各相相器によつて積分することによ
り90゜位相遅れの略三角波状の電圧に形成し、こ
れを比較器CPu,CPv,CPwにより中性点電圧と
比較することで、比較器CPu,CPv,CPwの出力
端からそれぞれ120゜位相の異なる矩形波の比較信
号U0,V0,W0をデユテイ比50%で得て、これを
位置検出信号として利用するようになつておる。
11は上記位置検出回路8の比較回路10の比較
信号U0,V0,W0を論理回路の組合せ(例えば
0・W0,U0・0,0・U0,V0・0,0・V0,
W0・0)により上記インバータ回路7のスイツ
チング素子Qu,Qx,Qv,Qy,Qw,Qzを順次導通
(例えばQu→Qz→Qv→Qx→Qw→Qyの順で)せし
める開閉信号を送出するようにした分配回路であ
る。又、この分配回路11は負荷電流を検出する
電流検出器12から接続された負荷電流検出回路
13の信号によりインバータ回路7のスイツチン
グ素子がオフ状態になるように開閉信号を送出し
て回路の過電流保護を図るようになつており、電
動機4の起動時には起動回路14の信号により上
記スイツチング素子を順次導通しや断せしめる開
閉信号を送出するようになつておる。 Conventionally, various types of brushless DC motors have been proposed in which a rotor position detection signal is directly obtained from the winding voltage of a stator winding. An example of this will be explained with reference to FIG. 1 is a commercial AC power source (for example, AC 100 V, 60 Hz), 2 is a rectifier circuit that rectifies and smoothes the AC power source 1 and outputs it, and the anode of diode D 1 and the cathode of diode D 2 are
Connected to one end via reactor 3 for power factor improvement, and connected to the cathode of the diode D1 above and the diode
Insert a circuit in which capacitors C 1 and C 2 are connected in series between the anode of D 2 and a capacitor C 3 in parallel, and connect the connection point of the capacitors C 1 and C 2 to the other end of AC power supply 1. They are connected to form a so-called voltage doubler rectifier circuit, and a DC output is sent out between the terminals of the capacitor C3 . 4 is a brushless DC motor (hereinafter simply referred to as the motor),
It consists of a stator winding 5 and a rotor 6 connected in a three-phase star shape. Reference numeral 7 denotes a so-called 120° energization type pulse width control type inverter circuit (hereinafter simply referred to as an inverter circuit) connected to the output terminal of the rectifier circuit 2 to control energization of the stator winding 5 of the motor 4.
Then, six switching elements Q u , Q x , Q v , Q y , Q w , Q z consisting of transistors etc. are connected in series, two each (Q u and Q x , Q v and Q y , Q w and Q z ),
This is connected in a bridge shape and connected to the output end of the rectifier circuit 2 , and each of the stator windings 5 is The stator windings 5 are connected to the respective phases, and the stator winding 5 is energized for each phase by conducting each switching element. Buffer drivers BD are connected to the bases of the switching elements Q u , Q x , Q v , Q y , Q w , and Q z , respectively, so that the input side and the output side are isolated and the drive output is sent out. It has been done. 8 is a position detection circuit connected to each phase of the stator winding 8 to obtain a position detection signal of the rotor 6 from the stator winding voltage; one end of the capacitors C u , C v , C w ; are the resistance R u ,
The other ends of the capacitors C u , C v , C w of the phase shifter consisting of a resistor and a capacitor connected to each phase of the stator winding 5 via R v , R w are connected in common to the neutral point. None, a comparator consisting of a star-connected phase shift circuit 9 which is grounded, and an operational amplifier at the output end of each phase shifter (connection point of the resistor and capacitor) of this phase shift circuit 9.
The non-inverting input terminals of CP u , CP v , and CP w are connected, respectively, and the inverting input terminals of these comparators CP u , CP v , and CP w are grounded (i.e., connected to the neutral point of the phase shift circuit 9). a phase shift circuit 9 which is formed from a comparison circuit 10 and receives the winding voltage of each phase of the stator winding 5 as a phase voltage in response to a change in the magnetic flux of the rotor 6 interlinked with the stator winding 5; The voltage is formed into a substantially triangular waveform with a 90° phase lag by integrating it with each phase shifter, and this is compared with the neutral point voltage using comparators CP u , CP v , and CP w . Rectangular wave comparison signals U 0 , V 0 , W 0 with a phase difference of 120° are obtained from the output terminals of the devices CP u , CP v , and CP w at a duty ratio of 50%, and these are used as position detection signals. I'm getting older.
11 is a combination of logic circuits (e.g.
0・W 0 , U 0・0 , 0・U 0 , V 0・0 , 0・V 0 ,
W 0・0 ), the switching elements Q u , Q x , Q v , Q y , Q w , Q z of the inverter circuit 7 are sequentially turned on (for example, Q u →Q z →Q v →Q x →Q w → This is a distribution circuit designed to send open/close signals that cause Further, this distribution circuit 11 sends a switching signal to turn off the switching element of the inverter circuit 7 in response to a signal from a load current detection circuit 13 connected from a current detector 12 that detects the load current, thereby preventing an overload of the circuit. Current protection is provided, and when the motor 4 is started, a signal from the starting circuit 14 sends out an opening/closing signal that sequentially turns on and off the switching elements.
このような回転子位置検出装置において、電動
機の速度制御がパルス幅制御方式によつて行なわ
れた場合(即ち、上記分配回路11の開閉信号と
図示しないパルス幅変調回路の出力信号との論理
組合せによりインバータ回路7のスイツチング素
子がパルス幅変調されてスイツチングされた場
合)における回転子の位置検出を第2図によつて
説明する。第2図はスイツチング素子がパルス幅
変調されてスイツチングした場合の位置検出回路
8における移相回路9の入出力と比較回路10の
出力との波形を示したもので、同図イは無負荷及
び軽負荷時を、同図ロは重負荷時を、同図ハは過
負荷時をそれぞれ一相分について示したものであ
る。又、同図において、VS1はスイツチング素子
の切換時(例えばQuからQvへの切換時)、電流し
や断により固定子巻線の洩れインダクタンスによ
つて蓄積された電磁エネルギーの放出により発生
する逆電圧(以下、スパイク電圧と呼称する)、
VS2はスイツチング素子がパルス幅変調されてス
イツチングしたときの電流しや断により上述同
様、電磁エネルギーの放出により発生する逆電圧
(以下切込スパイクと呼称する)、VIは固定子巻
線の誘起電圧、VFは固定子巻線の相電圧をそれ
ぞれ示したものである。そして、無負荷時及び軽
負荷時にあつては(第2図イ)、パルス幅変調さ
れたスイツチング素子のオン期間は短かく、固定
子巻線の電流も少ないので、電磁エネルギーも小
なり、これにより発生する切込スパイクVS2は線
状となり、この発生後電動機の回転による誘起電
圧VIがあらわれ、その後スイツチング素子のオ
ンにより整流回路の直流出力が印加される電圧波
形となる(第2図イ9の入力)。このため移相回
路9の出力には切込スパイクVS2による三角波状
の高周波成分が重畳した波形となるので(第2図
イ9の出力)、90゜位相遅れの略三角波状で正負に
交番する出力のゼロクロス点が不安定となり、こ
れを比較した比較回路10の矩形波の立上り及び
立下り時点が動揺して不安定となり、相電圧VF
に対して90゜位相遅れの信号を適確に得ることが
困難となる。 In such a rotor position detection device, when the speed control of the motor is performed by a pulse width control method (that is, a logical combination of the opening/closing signal of the distribution circuit 11 and the output signal of a pulse width modulation circuit (not shown) Detection of the position of the rotor in the case where the switching element of the inverter circuit 7 is pulse width modulated and switched will be explained with reference to FIG. Figure 2 shows the waveforms of the input/output of the phase shift circuit 9 and the output of the comparator circuit 10 in the position detection circuit 8 when the switching element is switched by pulse width modulation. The figures (b) and (c) show one phase at light load, heavy load, and overload, respectively. In addition, in the same figure, V S1 is caused by the release of electromagnetic energy accumulated by the leakage inductance of the stator winding due to current interruption when switching the switching element (for example, when switching from Q u to Q v ). Reverse voltage generated (hereinafter referred to as spike voltage),
V S2 is the reverse voltage (hereinafter referred to as cutting spike) generated by the release of electromagnetic energy due to the current interruption when the switching element switches with pulse width modulation, and V I is the reverse voltage of the stator winding. The induced voltage and V F indicate the phase voltages of the stator windings, respectively. During no-load and light-load conditions (Fig. 2 A), the ON period of the pulse-width modulated switching element is short and the stator winding current is small, so the electromagnetic energy is also small. The cutting spike V S2 generated by this becomes linear, and after this occurs, an induced voltage V I due to the rotation of the motor appears, and then the switching element turns on, resulting in a voltage waveform where the DC output of the rectifier circuit is applied (see Figure 2). (input in step 9). For this reason, the output of the phase shift circuit 9 has a waveform in which a triangular wave-like high frequency component due to the cutting spike V S2 is superimposed (output of A9 in Fig. 2). The zero-crossing point of the output becomes unstable, and the rising and falling points of the rectangular wave of the comparison circuit 10 that compares these become unstable and unstable, and the phase voltage V F
It becomes difficult to accurately obtain a signal with a 90° phase lag.
又、重負荷時(第2図ロ)においては、スイツ
チング素子のオン期間を長くして固定子巻線の巻
線電圧を維持するように制御されるので、固定子
巻線の電流が増加し、洩れインダクタンスによる
電磁エネルギーも大となり、これの放出により発
生する切込スパイクVS2の巾も大となり、電動機
の誘起電圧VIがあらわれる前にパルス幅変調さ
れたスイツチング素子がオンとなつて直流出力が
固定子巻線に印加され、いわゆるチヨツパ周波数
で正負に交番する波形となる(第2図ロ9の入
力)。このため、リツプルが増大し移相回路9の
90゜位相遅れで略三角波状に正負に交番する出力
波形のゼロクロス点が等価的に進み位相となつて
これを比較した比較回路10の比較信号は相電圧
VFに対し上述同様、90゜位相遅れの信号を適確に
得ることができなくなる。 In addition, under heavy load (Figure 2 B), the on-period of the switching element is extended to maintain the stator winding voltage, so the stator winding current increases. , the electromagnetic energy due to the leakage inductance also increases, and the width of the cutting spike V S2 generated by this emission also increases, and the pulse width modulated switching element turns on before the induced voltage V I of the motor appears, causing a direct current The output is applied to the stator winding, resulting in a waveform that alternates between positive and negative at a so-called chopper frequency (input shown in FIG. 2, 9). Therefore, the ripple increases and the phase shift circuit 9
The zero-crossing point of the output waveform, which alternates between positive and negative in a substantially triangular waveform with a 90° phase lag, equivalently advances in phase, and the comparison signal of the comparator circuit 10 that compares this is the phase voltage.
As mentioned above, it becomes impossible to accurately obtain a signal with a 90° phase lag for V F.
さらに、過負荷時(第2図ハ)にはスイツチン
グ素子のオン期間をさらに長くするように(例え
ば120゜の範囲内で全導通となるように)制御され
るので、電流がさらに増加し、洩れインダクタン
スによる電磁エネルギーも大となつてスイツチン
グ素子の切換時に生ずるスパイク電圧S1の巾も大
となる(第2図ハの9の入力)。このため、移相
回路9の90゜位相遅れで略三角波状に正負に交番
する出力波形のゼロクロス点が等価的に大巾な進
み位相となつて、これを比較した比較回路10の
比較信号も、上述同様、相電圧VFに対して適確
な90゜位相遅れの信号を得ることができなくなる。
この結果、位置検出回路8の比較信号U0,V0,
W0を回転子の位置検出信号として利用できなく
なり、そのまま利用すれば、電動機の安定動作を
得ることができなくなるという問題を有してい
る。 Furthermore, in the event of an overload (Fig. 2 C), the on-period of the switching element is controlled to be even longer (for example, fully conductive within a range of 120°), so the current further increases. The electromagnetic energy due to the leakage inductance also increases, and the width of the spike voltage S1 generated when switching the switching element also increases (input 9 in FIG. 2C). Therefore, the zero-crossing point of the output waveform which alternates between positive and negative in a substantially triangular waveform due to the 90° phase lag of the phase shift circuit 9 becomes equivalently a large lead phase, and the comparison signal of the comparison circuit 10 that compares this also becomes , as described above, it becomes impossible to obtain a signal with an accurate 90° phase delay with respect to the phase voltage V F.
As a result, the comparison signals U 0 , V 0 ,
This poses a problem in that W 0 cannot be used as a rotor position detection signal, and if used as is, stable operation of the motor cannot be obtained.
本発明は上述した点にかんがみてなされたもの
で、その目的とするところは、スイツチング素子
がパルス幅変調により制御された場合でも電動機
の回転子の位置を適確に検出することができるよ
うにしたものを提供することにある。 The present invention has been made in view of the above points, and an object of the present invention is to enable accurate detection of the position of the rotor of an electric motor even when the switching element is controlled by pulse width modulation. Our mission is to provide what we believe in.
本発明は上記目的を達成するため、スイツチン
グ素子をパルス幅変調により制御する場合にあつ
ても、相電圧のゼロクロス点付近ではスイツチン
グ素子はスイツチングされないため、移相回路の
出力波形のピーク付近には高周波成分が重畳しな
い点に着目し、移相回路の出力から相電圧と同一
位相又は180゜位相差を有した信号を得てこれを回
転子の位置検出信号として利用するように構成し
たものである。 In order to achieve the above object, the present invention has been made so that even when the switching element is controlled by pulse width modulation, the switching element is not switched near the zero-crossing point of the phase voltage. Focusing on the fact that high frequency components are not superimposed, this system is configured to obtain a signal with the same phase or 180° phase difference from the phase voltage from the output of the phase shift circuit and use this as a rotor position detection signal. be.
以下、本発明の実施例を第3図及び第4図によ
つて説明する。なお位置検出回路を除いて第1図
と同様に構成されておるので、同一符号を付し、
重複をさけて説明することとする。第3図におい
て、100は電動機4の回転子6の位置を検出す
る位置検出回路で、整流回路2の出力端にインバ
ータ回路7と並列に挿入された仮想中性点回路1
01と、固定子巻線5の各相にそれぞれ接続され
たクランプ器を星形結線した電圧クランプ回路1
02と、この電圧クランプ回路102の各クラン
プ器の出力端に接続された移相器を星形結線した
移相回路103と、この移相回路103の各移相
器の出力から固定子巻線5の各相電圧と同一位相
又は180゜位相差を有した矩形波状の信号を得て、
これを90゜位相遅れの略三角波状の信号に変換し
この移相した出力と仮想中性点電圧とを比較した
信号によつて位置検出信号を得るようにした比較
回路104とからなつている。これら回路につい
て説明する。上記仮想中性点回路101は、整流
回路2の出力端子間に2つのコンデンサC4,C5
を直列に挿入し、このコンデンサC4,C5の端子
間に抵抗R1,R2をそれぞれ挿入し、上記コンデ
ンサC4とC5の接続点を仮想中性点ENとして回路
接地し、整流回路2の出力電圧に対して常に1/2
の仮想中性点電圧を得るようになつておる。従つ
て、交流電源1を整流平滑した整流回路2の出
力、即ち直流電源にブリツジ形に結線されたイン
バータ回路7の各出力端が3相星形結線の固定子
巻線5の各相に接続されていることにより、上記
固定子巻線5から導出されていない中性点の電圧
を実質的に上記コンデンサC4とC5の接続点(仮
想中性点EN)より得て仮想中性点電圧となすよ
うになつておる。そして、上記コンデンサC4,
C5と抵抗R1,R2とはそれぞれ同一の値(C4=C5,
R1=R2)とし、その値は、コンデンサC4,C5は
交流電源1に起因する誘導電圧を十分除去するた
め、インピーダンスをインバータ回路7のスイツ
チング素子のオフ時の洩れインピーダンスより十
分低い値となるように選定し、抵抗R1,R2はコ
ンデンサC4,C5の洩れ抵抗よりも十分低い値に
なるように選定して、仮想中性点電圧を整流回路
2の出力電圧の1/2にすると共に、交流電源1に
対して安定した電圧を得るようになつており、例
えば、C4=C510μF,R1=R2100KΩとなるよ
うに設定してもよい。電圧クランプ回路102
は、固定子巻線5の各相に、アノードを接続して
逆直列となつた一対の定電圧ダイオードZD1と
ZD2,ZD3とZD4,ZD5とZD6の上記定電圧ダイオ
ードZD1,ZD3,ZD5のカソードをそれぞれ抵抗
R3,R4,R5を介して接続し、定電圧ダイオード
ZD2,ZD4,ZD6のカソードを共通接続して中性
点となし、この中性点を上記仮想中性点と接続し
て回路接地し、抵抗と一対の定電圧ダイオードか
らなるクランプ器を3相星形結線に形成し、上記
各クランプ器の抵抗と定電圧ダイオードとの接続
点(R3とZD1,R4とZD3,R5とZD5の接続点)を
出力端として固定子巻線5の各相電圧をツエナー
電圧VZから定まる一定値にクランプした出力を
上記出力端からそれぞれ送出するようになつてお
る。移相回路103は、上記電圧クランプ回路1
02の各クランプ器の出力端にコンデンサC6,
C7,C8の一端をそれぞれ抵抗R6,R7,R8を介し
て接続し、上記コンデンサC6,C7,C8の他端を
共通接続して中性点とし、この中性点を上記仮想
中性点ENに接続して回路接地し、抵抗とコンデ
ンサからなる移相器を3相星形結線に形成し、上
記コンデンサC6,C7,C8の端子間には、該コン
デンサ相互の洩れ抵抗のバラツキによつて生ずる
時定数の変動を防止するため、バイパス抵抗R9,
R10,R11をそれぞれ挿入して、各移相器は抵抗
とコンデンサの接続点(R6とC6,R7とC7,R8と
C8の接続点)を出力端として入力の位相を90゜遅
れの位相に移相した略三角波状の出力電圧を出力
信号U1,V1,W1としてそれぞれ送出するように
なつておる。比較回路104は、上記移相回路1
03の各移相器の出力端に接続されて上記固定子
巻線5の各相電圧と略180゜の位相差を有する矩形
波の出力信号U3,V3,W3を送出するようにした
反転出力形の減算増幅部105と、この減算増幅
部105の出力信号U3,V3,W3を90゜位相遅れ
に移相して略三角波状の出力信号U4,V4,W4を
それぞれ送出するようにした積分部106と、こ
の積分部106の出力を交流結合して上記仮想中
性点電圧と比較反転させて、相電圧VFに対して
90゜位相遅れとなつた出力信号U0,V0,W0をそ
れぞれ送出するようにした比較部107とから形
成されておる。そして、上記減算増幅部105
は、移相回路103の各移相器の出力端に、演算
増幅器A1,A2,A3の反転入力端子をそれぞれ抵
抗R12,R13,R14を介して接続すると共に、演算
増幅器A1,A2,A3の非反転入力端子をそれぞれ
抵抗とコンデンサ(R15とC9,R16とC10,R17と
C11)とからなる遅延回路を介して接続し、上記
演算増幅器A1,A2,A3の反転入力端子と出力端
子間には帰還抵抗R18,R19,R20をそれぞれ挿入
し、上記抵抗R12,R13,R14と帰還抵抗R18,
R19,R20との関係をR12=R13=R14≪R18=R19=
R20に設定して、演算増幅器A1,A2,A3の出力
端子から遅延回路の出力端au,av,awから送出す
る出力信号U2,V2,W2と移相器の出力信号U1,
V1,W1とを減算し(U1−U2,V1−V2,W1−
W2)、これを大きな増幅度により反転増幅して上
記相電圧VFに対して略180゜の位相差をもつて交番
する矩形波の出力信号U3,V3,W3を、それぞれ
送出するようになつておる。この減算増幅回路1
05における遅延回路は各移相器の出力波形のピ
ークにおける変曲点(即ち、相電圧VFのゼロク
ロス点)を適確に検出するために設けたもので、
CR時定数を数10μS〜100μS程度に設定して移相
器の出力よりだけ若干位相を遅らせた出力を送
出するようになつており、演算増幅器A1,A2,
A3の増幅度はR12=R13=R14≪R18=R19=R20の
関係になるように大きく設定してあるので、反転
増幅によりリツプルが飽和した矩形波の出力信号
となるようになつている。積分部106は上記減
算増幅部105の演算増幅器A1,A2,A3の出力
端子と回路接地間に2つの抵抗とコンデンサ
(R21・R22とC12,R23・R24とC13,R25・R26と
C14)を直列にそれぞれ挿入し、上記2つの抵抗
相互の接続点(R21とR22,R23とR24,R25とR26
の各接続点)を出力端とし、上記2つの抵抗は
R21=R23=R25≫R22=R24=R26の関係に設定し
て、減算増幅部105の出力を90゜位相遅れで積
分したとき、その略三角波状で正負に交番する積
分波形のゼロクロス点が若干進み位相となるよう
に(即ち、積分波形のゼロクロス点が相電圧VF
のゼロクロス点に対し90゜位相遅れで対応するよ
うに)した出力信号U4,V4,W4を上記各出力端
からそれぞれ送出するようになつておる。比較部
107は、上記積分部106の各出力端に演算増
幅器からなる比較器CPu,CPv,CPwの反転入力
端子をそれぞれコンデンサC15,C16,C17を介し
て接続し、上記反転入力端子と回路接地間にそれ
ぞれ抵抗R27,R28,R29を挿入し、上記比較器
CPu,CPv,CPwの非反転入力端子を回路接地し
て、積分部106の各出力を交流結合を介して比
較器CPu,CPv,CPwに入力させ、この入力と仮
想中性点電圧を比較し、比較器CPu,CPv,CPw
の出力端子から互いに120゜位相の異なる矩形波の
比較信号U0,V0,W0をデユテイ比50%で上記分
配回路11にそれぞれ送出するようになつてお
る。 Embodiments of the present invention will be described below with reference to FIGS. 3 and 4. Since the configuration is the same as that in Fig. 1 except for the position detection circuit, the same reference numerals are used.
I will explain this without repeating it. In FIG. 3, 100 is a position detection circuit for detecting the position of the rotor 6 of the electric motor 4, and a virtual neutral point circuit 1 is inserted in parallel with the inverter circuit 7 at the output end of the rectifier circuit 2.
01, and a voltage clamp circuit 1 in which clamp devices connected to each phase of the stator winding 5 are connected in a star shape.
02, a phase shift circuit 103 in which phase shifters connected to the output terminals of each clamper of this voltage clamp circuit 102 are connected in a star shape, and a stator winding from the output of each phase shifter of this phase shift circuit 103. Obtain a rectangular wave signal having the same phase or a 180° phase difference as each phase voltage of 5,
The comparator circuit 104 converts this into a substantially triangular waveform signal with a phase delay of 90 degrees, and obtains a position detection signal by comparing this phase-shifted output with a virtual neutral point voltage. . These circuits will be explained. The virtual neutral point circuit 101 includes two capacitors C 4 and C 5 between the output terminals of the rectifier circuit 2.
are inserted in series, resistors R 1 and R 2 are inserted between the terminals of these capacitors C 4 and C 5 , respectively, and the connection point of the above capacitors C 4 and C 5 is grounded as a virtual neutral point EN, and the rectification is performed. Always 1/2 of the output voltage of circuit 2
It is now possible to obtain a virtual neutral point voltage of . Therefore, the output of the rectifier circuit 2 which rectifies and smoothes the AC power supply 1, that is, each output terminal of the inverter circuit 7 connected in a bridge form to the DC power supply, is connected to each phase of the stator winding 5 of the three-phase star connection. As a result, the voltage at the neutral point that is not derived from the stator winding 5 is substantially obtained from the connection point (virtual neutral point EN) of the capacitors C 4 and C 5 , and the voltage at the neutral point is obtained from the virtual neutral point EN. It is becoming like a voltage. And the above capacitor C 4 ,
C 5 and resistors R 1 and R 2 have the same value (C 4 = C 5 ,
R 1 = R 2 ), and its value is such that the impedance of capacitors C 4 and C 5 is sufficiently lower than the leakage impedance of the switching element of the inverter circuit 7 when it is off, in order to sufficiently remove the induced voltage caused by the AC power source 1. The resistors R 1 and R 2 are selected to have a value sufficiently lower than the leakage resistance of the capacitors C 4 and C 5 , and the virtual neutral point voltage is set to the output voltage of the rectifier circuit 2. It is designed to reduce the voltage to 1/2 and to obtain a stable voltage with respect to the AC power supply 1. For example, it may be set so that C 4 =C 5 10 μF, R 1 =R 2 100KΩ. Voltage clamp circuit 102
is a pair of constant voltage diodes ZD 1 whose anodes are connected to each phase of the stator winding 5 to form an anti-series connection.
The cathodes of the above voltage regulator diodes ZD 1 , ZD 3 , ZD 5 of ZD 2 , ZD 3 and ZD 4 , ZD 5 and ZD 6 are resistors, respectively.
Connected through R 3 , R 4 , R 5 and constant voltage diode
The cathodes of ZD 2 , ZD 4 , and ZD 6 are commonly connected to form a neutral point, and this neutral point is connected to the above virtual neutral point to ground the circuit, and a clamp device consisting of a resistor and a pair of voltage regulator diodes is constructed. form a three-phase star-shaped connection, and use the connection point between the resistor of each clamper and the constant voltage diode (the connection point between R 3 and ZD 1 , R 4 and ZD 3 , and R 5 and ZD 5 ) as the output terminal. Outputs obtained by clamping each phase voltage of the stator winding 5 to a constant value determined from the Zener voltage V Z are sent out from the output ends, respectively. The phase shift circuit 103 is the voltage clamp circuit 1 described above.
A capacitor C 6 is connected to the output terminal of each clamp device of 02,
One ends of C 7 and C 8 are connected through resistors R 6 , R 7 , and R 8 respectively, and the other ends of the capacitors C 6 , C 7 , and C 8 are commonly connected to form a neutral point. A point is connected to the above virtual neutral point EN to ground the circuit, a phase shifter consisting of a resistor and a capacitor is formed into a three-phase star connection, and between the terminals of the above capacitors C 6 , C 7 and C 8 , In order to prevent fluctuations in the time constant caused by variations in leakage resistance between the capacitors, bypass resistors R 9 ,
By inserting R 10 and R 11 respectively, each phase shifter is connected to the connection point of the resistor and capacitor (R 6 and C 6 , R 7 and C 7 , R 8 and
The connection point of C8 ) is used as the output terminal to send out substantially triangular waveform output voltages, which are obtained by shifting the phase of the input to a phase delayed by 90°, as output signals U 1 , V 1 , and W 1 , respectively. The comparison circuit 104 is the phase shift circuit 1
03 to output rectangular wave output signals U 3 , V 3 , W 3 having a phase difference of approximately 180° from each phase voltage of the stator winding 5. The subtractive amplifying section 105 has an inverted output type, and the output signals U 3 , V 3 , W 3 of this subtracting amplifying section 105 are phase-shifted by 90° to produce approximately triangular wave-like output signals U 4 , V 4 , W . The output of this integrating section 106 is AC-coupled with the integrating section 106, which is configured to send out 4 , respectively, and is compared with the virtual neutral point voltage and inverted, and the result is calculated with respect to the phase voltage V F.
The comparator 107 is configured to send out output signals U 0 , V 0 , and W 0 with a 90° phase delay, respectively. Then, the subtraction amplification section 105
connects the inverting input terminals of operational amplifiers A 1 , A 2 , A 3 to the output terminals of each phase shifter of the phase shift circuit 103 via resistors R 12 , R 13 , R 14 respectively, and Connect the non-inverting input terminals of A 1 , A 2 , and A 3 to resistors and capacitors (R 15 and C 9 , R 16 and C 10 , R 17 and
C 11 ), and feedback resistors R 18 , R 19 , and R 20 are inserted between the inverting input terminals and output terminals of the operational amplifiers A 1 , A 2 , and A 3 , respectively. The above resistors R 12 , R 13 , R 14 and feedback resistor R 18 ,
The relationship between R 19 and R 20 is R 12 = R 13 = R 14 ≪ R 18 = R 19 =
R 20 , the output terminals of the operational amplifiers A 1 , A 2 , A 3 are phase-shifted from the output signals U 2 , V 2 , W 2 sent from the output terminals au , av , aw of the delay circuit . output signal U 1 ,
Subtract V 1 and W 1 (U 1 − U 2 , V 1 − V 2 , W 1 −
W 2 ), this is inverted and amplified with a large amplification degree, and alternating square wave output signals U 3 , V 3 , W 3 with a phase difference of approximately 180° with respect to the above-mentioned phase voltage V F are sent out, respectively. I'm starting to do that. This subtraction amplifier circuit 1
The delay circuit in 05 is provided to accurately detect the inflection point at the peak of the output waveform of each phase shifter (i.e., the zero-crossing point of the phase voltage V F ).
The CR time constant is set to about 10 μS to 100 μS to send out an output whose phase is slightly delayed from that of the phase shifter output, and the operational amplifiers A 1 , A 2 ,
Since the amplification degree of A 3 is set large so that the relationship R 12 = R 13 = R 14 ≪ R 18 = R 19 = R 20 is established, the output signal is a rectangular wave with saturated ripples due to inversion amplification. It's becoming like that. The integrating section 106 connects two resistors and capacitors (R 21 , R 22 and C 12 , R 23 , R 24 and C 13 , R 25 , R 26 and
C 14 ) in series, and the connection points of the above two resistors (R 21 and R 22 , R 23 and R 24 , R 25 and R 26
) are the output terminals, and the above two resistors are
When setting the relationship R 21 = R 23 = R 25 ≫ R 22 = R 24 = R 26 and integrating the output of the subtraction amplifier 105 with a 90° phase delay, the integral alternates between positive and negative in a substantially triangular waveform. so that the zero-crossing point of the waveform is slightly advanced in phase (i.e., the zero-crossing point of the integral waveform is the phase voltage V F
Output signals U 4 , V 4 , and W 4 (corresponding with a 90° phase delay with respect to the zero-crossing point of ) are sent out from each of the output terminals. The comparator 107 connects the inverting input terminals of comparators CP u , CP v , CP w consisting of operational amplifiers to each output terminal of the integrator 106 via capacitors C 15 , C 16 , C 17 , respectively. Insert resistors R 27 , R 28 , and R 29 between the inverting input terminal and circuit ground, respectively, and connect the above comparator.
The non-inverting input terminals of CP u , CP v , CP w are connected to the circuit ground, and each output of the integrating section 106 is inputted to the comparators CP u , CP v , CP w via AC coupling, and the input terminals and the virtual Compare the sex point voltages and use comparators CP u , CP v , CP w
Rectangular wave comparison signals U 0 , V 0 , and W 0 having a phase difference of 120° from each other are sent from the output terminals to the distribution circuit 11 at a duty ratio of 50%.
次に、回転子6の位置検出動作について説明す
る。交流電源1(例えばAC100V,60Hz)をリア
クトル3を介してうけた整流回路2は、これを倍
電圧に整流平滑した直流出力電圧をインバータ回
路7と仮想中性点回路101に供給する。 Next, the position detection operation of the rotor 6 will be explained. The rectifier circuit 2 receives an AC power source 1 (for example, AC 100 V, 60 Hz) via a reactor 3, and supplies a DC output voltage obtained by rectifying and smoothing the AC power source 1 to a doubled voltage to an inverter circuit 7 and a virtual neutral point circuit 101.
次に電動機4を起動する。これは周知のよう
に、起動回路14からの起動信号により分配回路
11が応動してその出力端からインバータ回路7
のスイツチング素子Qu,Qx,Qv,Qy,Qw,Qzの
ベースにベースドライバーBDを介して順次開閉
信号を送出して上記スイツチング素子を例えば
Qu→Qz→Qv→Qx→Qw→Qyの順に導通しや断せし
めて、固定子巻線5の各相を順次通電させ電動機
4を起動させ、インバータ回路7の出力周波数を
所定の周波数(例えば20Hz程度)まで徐々に上昇
させると共に、回転数を所定の回転数(例えば
600r.p.m程度)まで上昇させるいわゆる他制動作
が上記起動回路14によつて行なわれる。しかる
後、位置検出回路100の位置検出信号により分
配回路11を介してインバータ回路7の各スイツ
チング素子が適時導通しや断せしめるいわゆる自
制動作が行なわれる。 Next, the electric motor 4 is started. As is well known, the distribution circuit 11 responds to the starting signal from the starting circuit 14, and the inverter circuit 7 is connected to the output terminal of the distribution circuit 11.
The switching elements Q u , Q x , Q v , Q y , Q w , Q z are sequentially sent open/close signals to their bases via the base driver BD, and the switching elements are
Conducting and disconnecting in the order of Q u → Q z → Q v → Q x → Q w → Q y , energizing each phase of the stator winding 5 in turn and starting the motor 4, the output frequency of the inverter circuit 7 gradually increase to a predetermined frequency (e.g. about 20Hz), and increase the rotation speed to a predetermined number (e.g.
The starting circuit 14 performs a so-called additional braking operation to increase the speed up to about 600 rpm. Thereafter, a so-called self-control operation is performed in which each switching element of the inverter circuit 7 is made conductive or disconnected as appropriate via the distribution circuit 11 in response to the position detection signal from the position detection circuit 100.
この自制動作において、電動機4の速度を制御
するため、スイツチング素子がパルス幅変調され
てスイツチングした場合、固定子巻線5の各相の
巻線電圧は上記スイツチング素子の導通しや断に
よつて整流回路2の出力が印加され、一相分につ
いてみれば、スイツチング時に生ずる切込スパイ
スVS2とスイツチング素子の切換時に生ずるスパ
イク電圧VS1を有し、仮想中性点ENを中心にし
て正負に交番する略台形状の電圧波形となつて示
され、これが相電圧VFとして電圧クランプ回路
102の各クランプ器にそれぞれ入力される(第
4図102の入力)。この際、仮想中性点ENは
仮想中性点回路101が整流回路2の出力電圧の
1/2の電圧を常に導出するようになつておるので、
安定した仮想中性点電圧として示される。そし
て、上記固定子巻線5の各相の巻線電圧を相電圧
VFとしてうけた電圧クランプ回路102の各ク
ランプ器は、一対の定電圧ダイオード(ZD1と
ZD2,ZD3とZD4,ZD5とZD6)のツエナー電圧VZ
により一定の値にクランプして略矩形波の出力電
圧をそれぞれ送出する。この際、電動機の負荷が
増大し整流平滑した出力に重畳するリツプルが増
大して固定子巻線5の各相の巻線電圧に不平衡が
生じ、各相の相電圧VFの尖頭値の不平衡が生じ
ても常に安定した尖頭値を有する相電圧を上記各
クランプ器から出力することになる(第4図10
2の出力)。上記電圧クランプ回路102の各ク
ランプ器の出力をうけた移相回路103の各移相
器は入力電圧を抵抗とコンデンサにより積分して
90゜位相遅れの略三角波状の電圧に変換し仮想中
性点ENを中心にして正負に交番する出力電圧を
出力信号U1,V1,W1としてそれぞれ送出する
(第4図103の出力)。この際、3相星形結線さ
れた電圧クランプ回路102と移相回路103の
中性点は仮想中性点回路101の仮想中性点EN
と接続されており、仮想中性点回路101は、交
流電源1の電源周波数に対して十分低インピーダ
ンス化され、かつインバータ回路7の各スイツチ
ング素子のオフ時の洩れインピーダンスより十分
低いインピーダンスに設定されておるので、上記
スイツチング素子のオフ時の洩れインピーダンス
のバラツキによる誘導電圧の影響をうけることな
く電圧クランプした出力を90゜位相遅れに移相す
ることになつて各移相器の出力は相電圧VFのゼ
ロクロス点でピークとなつた略三角波状となり、
上記ゼロクロス点を的確にとらえた波形となる。
又、電動機4が例えば圧縮機用として使用され
て、負荷が電動機4の1回転中に変動し、この1
回転中の回転速度にムラを生ずるいわゆるワウフ
ラツタ現象が生じて固定子巻線5の各相の巻線電
圧に位相の不平衡を生じ、移相器のコンデンサに
対する正、負の各充電時間に差を生じて、仮想中
性点ENに対し直流的にシフトされた波形で上記
移相器から出力されることがあつても、相電圧
VFのゼロクロス点に対応するピークにおける変
曲点は変化することなく的確に出力される。そし
て、上記移相回路103の各移相器の出力信号
U1,V1,W1をうけた比較回路104の減算増幅
部105は、上記移相器の出力信号U1,V1,W1
と、この出力信号U1,V1,W1を遅延回路によつ
て、そのCR時定数で定まる時限だけ遅らせた出
力信号U2,V2,W2(即ち、上記出力信号U1,
V1,W1を位相だけ若干遅らせた出力信号、第
4図105のa点)とをそれぞれ減算(U1−U2,
V1−V2,W1−W2)することによりその波形は、
第4図105のAの入力差で示すように、相電圧
VFのゼロクロス点に対し位相だけ遅れたゼロ
クロス点で正負に交番し、かつリツプルを有した
略矩形波の信号を得、これを抵抗R12,R13,R14
とR18,R19,R20とで定まる大きな増幅度を反転
増幅することにより上記リツプルを飽和させて、
相電圧VFに対し180゜位相差を有した矩形波で正負
に交番する出力信号U3,V3,W3を位相だけ遅
れて、演算増幅器A1,A2,A3の出力端子からそ
れぞれ送出する(第4図105の出力)。この出
力信号U3,V3,W3をうけた積分部106は、入
力信号U3,V3,W3を90゜位相遅れで積分し略三
角波状で正負に交番する波形の出力信号U4,V4,
W4をそれぞれ送出する(第4図106の出力)。
この際、積分部106は、2つの抵抗(R21と
R22,R23とR24,R25とR26)とコンデンサC12,
C13,C14とにより入力信号U3,V3,W3をそれぞ
れ積分し、その出力信号U4,V4,W4を2つの抵
抗相互の接続点(出力端)から送出するように形
成し、かつ2つの抵抗をR21=R23=R25≫R22=
R24=R26の関係に設定してあるので、上記入力
信号U3,V3,W3の極性が反転したとき、上記出
力端の電圧は、入力信号U3,V3,W3の極性反転
後の電圧Vu3,Vv3,VW3とコンデンサC12,C13,
C14の上記入力信号極性反転直前の充電電圧Vc12,
Vc13,Vc14との差に2つの抵抗の分圧比を乗じた
電圧Vd(例えば、(Vu3−Vc12)R22/R21+R22)だけ
ゼロ電圧方向に急峻に変化し、その後CR時定数
によつて定まる時限で積分された出力波形(第4
図106の出力)となるため、該積分部106の
出力信号U4,V4,W4の出力波形のゼロクロス点
は、減算増幅部105の出力信号U3,V3,W3を
単に90゜位相遅れに積分したときの出力波形のゼ
ロクロス点より若干進み側(即ち、位相ずれだ
け進み側)となる。即ち、相電圧VFに対する位
相ずれを補正することになる。この結果、積分
部106は、入力信号が相電圧VFに対し位相
だけ遅れた180゜位相差の信号であつても、その出
力波形のゼロクロス点を相電圧VFのゼロクロス
点に対し270゜位相差で得ることができることにな
る。これをうけた比較部107の比較器CPu,
CPv,CPwは、その反転入力端子に設けたコンデ
ンサと抵抗(C15とR27,C16とR28,C17とR29)に
よる交流結合を介して直流分を阻止して入力せし
め、この入力と非反転入力端子の入力(仮想中性
点電圧)とを比較反転して相電圧VFに対し90゜位
相遅れとなつたデユテイ比50%の矩形波の出力信
号U0,V0,W0を比較器CPu,CPv,CPwの出力
端から互いに120゜異なる位相でそれぞれ送出し、
これを位置検出回路100は回転子6の位置検出
信号U0,V0,W0として分配回路11にそれぞれ
送出する。 In this self-control operation, when the switching element is pulse-width-modulated and switched in order to control the speed of the motor 4, the winding voltage of each phase of the stator winding 5 changes depending on whether the switching element is turned on or off. When the output of the rectifier circuit 2 is applied, and looking at one phase, it has a cutting spice V S2 that occurs during switching and a spike voltage V S1 that occurs when switching the switching element, and the voltage is positive and negative around the virtual neutral point EN. This is shown as an alternating substantially trapezoidal voltage waveform, which is input as a phase voltage V F to each clamper of the voltage clamp circuit 102 (input in FIG. 4 102). At this time, the virtual neutral point EN is such that the virtual neutral point circuit 101 always derives a voltage that is 1/2 of the output voltage of the rectifier circuit 2.
Shown as a stable virtual neutral point voltage. Then, the winding voltage of each phase of the stator winding 5 is determined as the phase voltage.
Each clamper of the voltage clamp circuit 102 received as VF has a pair of constant voltage diodes (ZD 1 and
Zener voltage V Z of ZD 2 , ZD 3 and ZD 4 , ZD 5 and ZD 6 )
The voltages are clamped to a constant value and output voltages of approximately rectangular waves are transmitted. At this time, the load on the motor increases and the ripples superimposed on the rectified and smoothed output increase, causing unbalance in the winding voltage of each phase of the stator winding 5, and the peak value of the phase voltage V F of each phase. Even if unbalance occurs, phase voltages with stable peak values are output from each of the clamps (see Fig. 4, 10).
2 output). Each phase shifter of the phase shift circuit 103 receives the output of each clamper of the voltage clamp circuit 102, and integrates the input voltage using a resistor and a capacitor.
The output voltages, which are converted to approximately triangular waveforms with a 90° phase lag and alternate between positive and negative around the virtual neutral point EN, are sent out as output signals U 1 , V 1 , and W 1 (output 103 in Figure 4). ). At this time, the neutral point of the voltage clamp circuit 102 and the phase shift circuit 103 connected in a three-phase star shape is the virtual neutral point EN of the virtual neutral point circuit 101.
The virtual neutral point circuit 101 has an impedance sufficiently low with respect to the power frequency of the AC power supply 1, and is set to an impedance sufficiently lower than the leakage impedance of each switching element of the inverter circuit 7 when it is off. Therefore, the voltage-clamped output is phase-shifted with a 90° phase lag without being affected by the induced voltage due to variations in leakage impedance when the switching element is off, and the output of each phase shifter is equal to the phase voltage. It becomes a nearly triangular wave shape with a peak at the zero cross point of V F ,
This is a waveform that accurately captures the above zero-crossing point.
Further, when the electric motor 4 is used for a compressor, for example, and the load changes during one rotation of the electric motor 4,
A so-called wow and flutter phenomenon occurs that causes unevenness in the rotational speed during rotation, causing a phase imbalance in the winding voltage of each phase of the stator winding 5, resulting in a difference in the positive and negative charging times for the phase shifter capacitor. Even if the above phase shifter outputs a DC-shifted waveform with respect to the virtual neutral point EN, the phase voltage
The inflection point at the peak corresponding to the zero crossing point of V F is accurately output without change. Then, the output signal of each phase shifter of the phase shift circuit 103 is
The subtraction amplification section 105 of the comparator circuit 104 that receives U 1 , V 1 , W 1 outputs the output signals U 1 , V 1 , W 1 of the phase shifter.
Then, the output signals U 2 , V 2 , W 2 are obtained by delaying the output signals U 1 , V 1 , W 1 by a time period determined by the CR time constant using a delay circuit (i.e., the above output signals U 1 ,
The output signal obtained by slightly delaying the phase of V 1 and W 1 (point a in Fig. 4, 105) is subtracted (U 1 - U 2 ,
V 1 −V 2 , W 1 −W 2 ), the waveform is
As shown by the input difference of A in Figure 4 105, the phase voltage
At the zero-crossing point delayed by the phase with respect to the zero-crossing point of V F , a substantially rectangular wave signal that alternates between positive and negative and has ripples is obtained, and this is transmitted to the resistors R 12 , R 13 , R 14
By inverting and amplifying the large amplification determined by R 18 , R 19 , and R 20 , the above ripple is saturated,
Output signals U 3 , V 3 , W 3 which alternate between positive and negative with a rectangular wave having a phase difference of 180° with respect to the phase voltage V F are output from the output terminals of operational amplifiers A 1 , A 2 , A 3 with a delay of the phase. (output of 105 in FIG. 4). The integrating section 106 that receives the output signals U 3 , V 3 , W 3 integrates the input signals U 3 , V 3 , W 3 with a 90° phase lag, and outputs an output signal U having a substantially triangular waveform alternating between positive and negative. 4 , V4 ,
W 4 respectively (output of 106 in FIG. 4).
At this time, the integrating section 106 connects two resistors (R 21 and
R 22 , R 23 and R 24 , R 25 and R 26 ) and capacitor C 12 ,
The input signals U 3 , V 3 , and W 3 are integrated by C 13 and C 14 respectively, and the output signals U 4 , V 4 , and W 4 are sent out from the connection point (output end) between the two resistors. and two resistors R 21 = R 23 = R 25 ≫ R 22 =
Since the relationship R 24 = R 26 is set, when the polarity of the input signals U 3 , V 3 , W 3 is reversed, the voltage at the output terminal is the same as that of the input signals U 3 , V 3 , W 3 . Voltages V u3 , V v3 , V W3 after polarity reversal and capacitors C 12 , C 13 ,
The charging voltage V c12 immediately before the above input signal polarity reversal of C 14 ,
The voltage V d (for example, (V u3 − V c12 ) R 22 /R 21 + R 22 ), which is the difference between V c13 and V c14 multiplied by the voltage division ratio of the two resistors, changes sharply toward zero voltage, and then The output waveform (fourth
106), the zero-crossing point of the output waveform of the output signals U 4 , V 4 , W 4 of the integrating section 106 is simply 90 It is slightly on the leading side (that is, on the leading side by the phase shift) of the zero-crossing point of the output waveform when integrated over the phase lag. That is, the phase shift with respect to the phase voltage V F is corrected. As a result, even if the input signal is a signal with a phase difference of 180° that is delayed by the phase with respect to the phase voltage V F , the integrating section 106 can set the zero-crossing point of its output waveform at 270° with respect to the zero-crossing point of the phase voltage V F. This can be obtained by phase difference. The comparator CP u of the comparator 107 that received this,
CP v and CP w are inputted by blocking the DC component through AC coupling by the capacitor and resistor (C 15 and R 27 , C 16 and R 28 , C 17 and R 29 ) provided at the inverting input terminal. , this input is compared with the input of the non-inverting input terminal (virtual neutral point voltage) and inverted to produce a rectangular wave output signal U 0 , V with a duty ratio of 50% that is 90° phase delayed with respect to the phase voltage V F 0 and W 0 are sent out from the output terminals of comparators CP u , CP v , and CP w, respectively, with phases that are 120° different from each other.
The position detection circuit 100 sends these to the distribution circuit 11 as position detection signals U 0 , V 0 , and W 0 of the rotor 6, respectively.
上記位置検出動作において、インバータ回路7
の出力周波数の周期をT、減算増幅部105の遅
延回路の遅延時間をtdとすると、上記出力周波数
が低い場合((即ち電動機4の回転数が低い場合)
は、周期Tが長く、遅延時間tdは一定であるた
め、2・td/T×2πで定まる位相ずれは、周期T
に対してきわめて小となり、このとき減算増幅部
105の出力をうけた積分部106の出力は、積
分時間が長くなつて略三角波状で正負に交番する
出力波形の振幅が大きくなり、この振幅に対する
極性反転時に急変する電圧Vdの割合は小さくな
つて、該積分部106の出力波形におけるゼロク
ロス点を進み側に小さく補正し、又、出力周波数
が高くなつた場合(即ち電動機4の回転数が高く
なつた場合)は、周期Tが短かくなり、上記関係
式2・td/T×2πからも理解されるように位相遅れ
は大きくなるが、これをうけた積分部106の
出力は、積分時間が短かくなつて略三角波状で交
番する出力波形の振幅は小さくなり、この振幅に
対する極性反転時に急変する電圧Vdの割合は大
きくなつて、該積分部106の出力波形における
ゼロクロス点を進み側に大きく補正することにな
る。換言すれば、出力周波数に応じて(即ち回転
数に応じて)変化する位相ずれの大きさに応じ
て積分部106の出力波形のゼロクロス点を、進
み側に補正して相電圧VFのゼロクロス点に対し
270゜位相差を有したゼロクロス点の信号を積分部
106から得ることができ、これを比較部107
で比較反転することによつて相電圧VFに対し90゜
位相遅れの信号を適確に得ることができる。この
ことは電動機4の回転が低速から高速領域に至る
まで電動機4の動作に支障を与えることなく回転
子6の位置検出を適確に行うことができることに
なる。 In the above position detection operation, the inverter circuit 7
Let T be the period of the output frequency of , and let td be the delay time of the delay circuit of the subtraction amplification section 105 , when the above output frequency is low ((i.e., when the rotational speed of the motor 4 is low)
Since the period T is long and the delay time td is constant, the phase shift determined by 2・td/T×2π is extremely small with respect to the period T. As the integration time becomes longer, the output of the section 106 becomes larger, and the amplitude of the output waveform that alternates between positive and negative in a substantially triangular waveform increases, and the ratio of the voltage V d that suddenly changes when the polarity is reversed to this amplitude becomes smaller. If the zero-crossing point in the output waveform of is corrected to a smaller value on the advancing side, and if the output frequency becomes higher (that is, if the rotational speed of the electric motor 4 becomes higher), the period T becomes shorter, and the above relational expression 2. As can be understood from td/T×2π, the phase delay increases, but the integration time of the output from the integrating section 106 due to this decreases, and the amplitude of the alternating approximately triangular waveform decreases. , the ratio of the voltage V d that suddenly changes at the time of polarity reversal to this amplitude increases, and the zero-crossing point in the output waveform of the integrating section 106 is greatly corrected to the advancing side. In other words, the zero-crossing point of the output waveform of the integrating section 106 is corrected to the leading side according to the magnitude of the phase shift that changes according to the output frequency (that is, according to the rotational speed), and the zero-crossing point of the phase voltage V F is adjusted to the leading side. to the point
A zero-cross point signal having a 270° phase difference can be obtained from the integrating section 106, and this signal is sent to the comparing section 107.
By comparing and inverting at , it is possible to accurately obtain a signal with a phase delay of 90° with respect to the phase voltage V F . This means that the position of the rotor 6 can be accurately detected without interfering with the operation of the electric motor 4 even when the rotation of the electric motor 4 ranges from low speed to high speed.
さらに、電動機4が圧縮機用として使用されて
負荷が1回転中に変動し1回転中の回転速度にム
ラが生ずるいわゆるワウフラツタ現象が生じて固
定子巻線5の各相の巻線電圧の位相の不平衡が生
じ、移相回路103の各移相器における正、負両
極性方向の積分時間にずれが生じたとき、バイパ
ス抵抗R9,R10,R11により速やかに放電して直
流的なシフトの原因となる電荷の蓄積の抑制を図
り、かつ各移相器の出力信号U1,V1,W1を減算
増幅部105、積分部106を介して交流結合さ
せて比較するようにしてあるので、比較信号U0,
V0,W0の位相ずれを防止して相電圧VFに対し
90゜位相遅れの位置検出信号を適確に得ることが
できることになる。 Furthermore, when the electric motor 4 is used as a compressor, the load fluctuates during one rotation, resulting in uneven rotational speed during one rotation, which is the so-called wow and flutter phenomenon, which causes the phase of the winding voltage of each phase of the stator winding 5 to change. When an unbalance occurs and a shift occurs in the integration time in the positive and negative polarity directions in each phase shifter of the phase shift circuit 103, the bypass resistors R 9 , R 10 , and R 11 quickly discharge the DC current. In order to suppress the accumulation of charge that causes a shift, the output signals U 1 , V 1 , W 1 of each phase shifter are AC-coupled via the subtraction amplification section 105 and the integration section 106 for comparison. Therefore, the comparison signal U 0 ,
Preventing phase shift between V 0 and W 0 and adjusting for phase voltage V F
This means that a position detection signal with a 90° phase delay can be obtained accurately.
尚、上記実施例において位置検出回路100の
比較回路104は減算増幅部105により相電圧
VFに対し位相だけ遅延させた180゜位相差を有す
る矩形波で交番する出力信号U3,V3,W3を得
て、これを積分部106を介して仮想中性点電圧
と比較して相電圧VFに対し90゜位相遅れの位置検
出信号を得るように説明したが、これに代つて第
5図に示すように、移相回路103の各移相器の
出力端に、演算増幅器A1,A2,A3の非反転入力
端子を接続すると共に、反転入力端子を抵抗とコ
ンデンサ(R15とC9,R16とC10,R17とC11)から
なる遅延回路を介して接続し、演算増幅器A1,
A2,A3の反転入力端子と出力端子間に帰還抵抗
R18,R19,R20をそれぞれ挿して、上記各移相器
の出力U1,V1,W1をこれを遅延回路を介して位
相だけ遅らせた出力で減算しこれを大きな増幅
度で増幅して相電圧VFに対し同一位相差を有す
る矩形波で交番する出力信号U3′,V3′,W4′を若
干の位相だけ遅らせてそれぞれ送出するように
した減算増幅部105′と、上述同様に形成され
た積分部106と、これの各出力端に比較器
CPu,CPv,CPwの非反転入力端子をそれぞれ接
続すると共に、この比較器CPu,CPv,CPwの反
転入力端子を抵抗とコンデンサ(R30とC18,R31
とC19,R32とC20)とによるローパスフイルタを
介してそれぞれ接続して、上記積分部106の出
力U4′,V4′,W4′とこれをローパスフイルタによ
つて平均化した出力とを比較した信号U0,V0,
W0をそれぞれ送出するようにした比較部10
7′とからなる比較回路104′を設けて、移相回
路103の各移相器の出力に直流的なシフト分が
含まれてもこれを上記ローパスフイルタにより補
正して、相電圧VFに対し90゜位相遅れとなつた比
較信号U0,V0,W0を位置検出信号として送出す
るようにしてもよい。 In the above embodiment, the comparison circuit 104 of the position detection circuit 100 detects the phase voltage by the subtraction amplification section 105.
Output signals U 3 , V 3 , W 3 alternating with rectangular waves having a phase difference of 180° delayed by the phase with respect to V F are obtained, and these are compared with the virtual neutral point voltage via the integrating section 106. Although it has been explained that a position detection signal with a phase delay of 90° is obtained with respect to the phase voltage V F , instead of this, as shown in FIG. The non-inverting input terminals of amplifiers A 1 , A 2 , and A 3 are connected, and the inverting input terminal is connected to a delay circuit consisting of a resistor and a capacitor (R 15 and C 9 , R 16 and C 10 , R 17 and C 11 ). Connected through operational amplifier A 1 ,
Feedback resistor between the inverting input terminal and output terminal of A 2 and A 3
By inserting R 18 , R 19 , and R 20 respectively, the outputs U 1 , V 1 , and W 1 of each of the above phase shifters are subtracted by the outputs delayed by the phase through the delay circuits, and this is done with a large amplification factor. A subtraction amplification unit 105' that amplifies and outputs alternating output signals U 3 ′, V 3 ′, and W 4 ′ with rectangular waves having the same phase difference with respect to the phase voltage V F with a slight phase delay and sends them out respectively. , an integrating section 106 formed in the same manner as described above, and a comparator at each output terminal of this section.
The non-inverting input terminals of CP u , CP v , CP w are connected respectively, and the inverting input terminals of the comparators CP u , CP v , CP w are connected to resistors and capacitors (R 30 and C 18 , R 31
and C 19 , R 32 and C 20 ), and the outputs U 4 ′, V 4 ′, W 4 ′ of the integrating section 106 are averaged by the low-pass filter. Signals compared with the output U 0 , V 0 ,
Comparison unit 10 configured to send W 0 respectively
7' is provided, and even if the output of each phase shifter of the phase shift circuit 103 includes a DC shift component, this is corrected by the above-mentioned low-pass filter, and the phase voltage V F is On the other hand, comparison signals U 0 , V 0 , and W 0 with a phase delay of 90° may be sent out as position detection signals.
本発明によれば、回転子の位置検出は、相電圧
に対し同一位相又は180゜位相差を有した信号を若
干位相をずらして形成し、これを相電圧に対して
90゜位相遅れとなるように積分した出力により比
較検出して位置検出信号を得るようにしてあるの
で、インバータ回路のスイツチング素子がパルス
幅変調されてスイツチングしてもこれに影響され
ることなく、適確に回転子の位置を検出すること
ができる。しかも、同一位相又は180゜位相差を有
する出力は商用交流電源を整流平滑して出力する
整流回路の出力端に低インピーダンス化した仮想
中性点回路を設け、この仮想中性点回路の仮想中
性点に、星形結線された固定子巻線の各相に接続
されたたクランプ器の星形結線した電圧クランプ
回路と、上記クランプ器の出力端に接続された移
相器を星形結線した移相回路との中性点を接続し
て回路接地して、中性点電圧の安定化を図つてス
イツチング素子のオフ時の洩れインピーダンスの
バラツキに起因する誘導分の重畳を阻止る上記各
移相器の出力とこれの位相より若干遅れた出力と
を減算増幅して得るようにしてあるので、相電圧
のゼロクロス点を適確に検出することができ、上
記若干位相の遅れは2つの抵抗とコンデンサによ
る積分で簡単に補正して相電圧に対し90゜位相遅
れの位置検出信号を得ることができ、電動機の低
速から高速に至る全領域を格別な補正手段を設け
ることなく、かつスイツチング素子がパルス幅変
調されてスイツチングするものに対しても回転子
の位置を適確に検出することができる。 According to the present invention, the rotor position is detected by forming a signal having the same phase or a 180° phase difference with respect to the phase voltage, with a slight phase shift, and transmitting the signal with respect to the phase voltage.
Since the position detection signal is obtained by comparing and detecting the integrated output with a 90° phase delay, even if the switching element of the inverter circuit is pulse width modulated and switches, it will not be affected by this. The position of the rotor can be detected accurately. Moreover, outputs with the same phase or a 180° phase difference are obtained by installing a low-impedance virtual neutral point circuit at the output end of the rectifier circuit that rectifies and smoothes the commercial AC power source, and outputs the output with the same phase or a 180° phase difference. The star-wired voltage clamp circuit of the clamper is connected to each phase of the star-wired stator winding at the power point, and the phase shifter connected to the output end of the clamper is star-wired. The neutral point of the phase shift circuit is connected to ground the circuit, thereby stabilizing the neutral point voltage and preventing the superposition of induced components due to variations in leakage impedance when the switching element is turned off. Since the output of the phase shifter and the output slightly delayed from the phase of the phase shifter are subtracted and amplified, it is possible to accurately detect the zero crossing point of the phase voltage, and the above slight phase delay is due to the difference between the two. A position detection signal with a phase delay of 90° relative to the phase voltage can be obtained by easily correcting the integration using a resistor and a capacitor, and switching can be performed over the entire motor speed range from low speed to high speed without the need for special correction means. The position of the rotor can be accurately detected even when the element is switched by pulse width modulation.
第1図は従来例を示すブロツク図、第2図は第
1図の動作を説明する各部電圧波形図で、同図イ
は無負荷及び軽負荷の場合、同図ロは重負荷の場
合、同図ハは過負荷の場合を示したものである。
第3図は本発明の実施例を示すブロツク図、第4
図は第3図の動作を説明する各部電圧波形図、第
5図は第4図の比較回路の他の実施例を示すブロ
ツク図である。
1:商用交流電源、2:整流回路、4:ブラシ
レス直流電動機、5:固定子巻線、6:回転子、
7:インバータ回路、100:位置検出回路、1
01:仮想中性点回路、102:電圧クランプ回
路、103:移相回路、104,104′:比較
回路、105,105′:減算増幅部、106:
積分部、107,107′:比較部。
Fig. 1 is a block diagram showing a conventional example, and Fig. 2 is a voltage waveform diagram of each part explaining the operation of Fig. 1. Figure C shows the case of overload.
FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG.
This figure is a voltage waveform diagram of each part explaining the operation of FIG. 3, and FIG. 5 is a block diagram showing another embodiment of the comparison circuit of FIG. 4. 1: Commercial AC power supply, 2: Rectifier circuit, 4: Brushless DC motor, 5: Stator winding, 6: Rotor,
7: Inverter circuit, 100: Position detection circuit, 1
01: Virtual neutral point circuit, 102: Voltage clamp circuit, 103: Phase shift circuit, 104, 104': Comparison circuit, 105, 105': Subtraction amplifier section, 106:
Integration section, 107, 107': Comparison section.
Claims (1)
ブラシレス直流電動機と、商用交流電源に整流回
路を介して複数のスイツチング素子をブリツジ形
に結線してその出力端を上記固定子巻線の各相に
接続したインバータ回路と、上記固定子巻線の巻
線電圧から回転子位置を検出して上記スイツチン
グ素子を適時導通しや断せしめる位置検出信号を
送出する位置検出回路とを備え、上記固定子巻線
の各相を順次通電せしめるようにしたものにおい
て、上記位置検出回路は、整流回路の出力端に2
つのコンデンサを直列に接続し、このコンデンサ
の端子間に抵抗をそれぞれ挿入し、上記コンデン
サ相互の接続点を仮想中性点となして回路接地し
た仮想中性点回路と、上記固定子巻線の各相に接
続された抵抗と逆直列接続した一対の定電圧ダイ
オードとからなるクランプ器を星形結線して中性
点を上記仮想中性点と接続した電圧クランプ回路
と、この電圧クランプ回路の各クランプ器の出力
端に直列に接続された抵抗とコンデンサとにより
積分することによつて90゜位相遅れに移相した略
三角波状の電圧を出力する移相器を星形結線して
中性点を上記仮想中性点と接続した移相回路とを
備え、上記移相回路の各移相器の出力端に、該移
相器の出力とこれを遅延回路を介して若干位相を
遅らせた出力とを演算増幅して出力するようにし
た演算増幅器からなる減算増幅部と、これの出力
を直列に接続した2つの抵抗とコンデンサとによ
り90゜位相遅れに積分して上記2つの抵抗の接続
点から出力するようにした積分部と、これの出力
を仮想中性点電圧と比較した信号を送出するよう
にした比較部とからなる比較回路を設けて、固定
子巻線の相電圧と同一位相又は180゜位相差を有し
た信号から位置検出信号を得るようにしたことを
特徴とするブラシレス直流電動機の回転子位置検
出装置。1. A brushless DC motor consisting of a star-connected stator winding and a rotor, and a plurality of switching elements connected to a commercial AC power source in a bridge shape via a rectifier circuit, and the output end of the stator winding connected to the stator winding. The switching element is equipped with an inverter circuit connected to each phase, and a position detection circuit that detects the rotor position from the winding voltage of the stator winding and sends a position detection signal that makes the switching element conductive or disconnected as appropriate. In a device in which each phase of the stator winding is sequentially energized, the position detection circuit has two terminals connected to the output end of the rectifier circuit.
A virtual neutral point circuit is created by connecting two capacitors in series, inserting a resistor between the terminals of each capacitor, and grounding the circuit by using the connection point between the capacitors as a virtual neutral point. There is a voltage clamp circuit in which a clamp device consisting of a resistor connected to each phase and a pair of voltage regulator diodes connected in anti-series is connected in a star shape, and the neutral point is connected to the above virtual neutral point. A phase shifter that outputs a substantially triangular wave voltage whose phase is shifted by 90° by integrating it with a resistor and a capacitor connected in series to the output terminal of each clamp device is star-wired and neutralized. a phase shift circuit whose point is connected to the virtual neutral point, and at the output end of each phase shifter of the phase shift circuit, the output of the phase shifter and this are slightly delayed in phase through a delay circuit. A subtraction amplification section consisting of an operational amplifier that operationally amplifies the output and outputs it, and the output of this is integrated to a 90° phase delay using two resistors and a capacitor connected in series, and the above two resistors are connected. A comparison circuit is provided, which consists of an integrating section that outputs from a point, and a comparing section that sends out a signal that compares the output of this with the virtual neutral point voltage. A rotor position detection device for a brushless DC motor, characterized in that a position detection signal is obtained from a signal having a phase or a 180° phase difference.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58046561A JPS59172991A (en) | 1983-03-18 | 1983-03-18 | Rotor position detector of brushless dc motor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58046561A JPS59172991A (en) | 1983-03-18 | 1983-03-18 | Rotor position detector of brushless dc motor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59172991A JPS59172991A (en) | 1984-09-29 |
JPH0527357B2 true JPH0527357B2 (en) | 1993-04-20 |
Family
ID=12750729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58046561A Granted JPS59172991A (en) | 1983-03-18 | 1983-03-18 | Rotor position detector of brushless dc motor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59172991A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62260586A (en) * | 1986-04-30 | 1987-11-12 | Sony Corp | Brushless motor |
JP2551834B2 (en) * | 1989-02-02 | 1996-11-06 | 日本電産株式会社 | Brushless motor rotation control method |
CN1520024A (en) * | 1998-07-16 | 2004-08-11 | ������������ʽ���� | Control method and controller for motor without position sensor |
-
1983
- 1983-03-18 JP JP58046561A patent/JPS59172991A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59172991A (en) | 1984-09-29 |
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