JPH0526938A - Testing method for electronic circuit device with planar antenna - Google Patents

Testing method for electronic circuit device with planar antenna

Info

Publication number
JPH0526938A
JPH0526938A JP18478491A JP18478491A JPH0526938A JP H0526938 A JPH0526938 A JP H0526938A JP 18478491 A JP18478491 A JP 18478491A JP 18478491 A JP18478491 A JP 18478491A JP H0526938 A JPH0526938 A JP H0526938A
Authority
JP
Japan
Prior art keywords
antenna
pattern
resin
circuit device
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP18478491A
Other languages
Japanese (ja)
Inventor
Hideo Sugawara
秀夫 菅原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18478491A priority Critical patent/JPH0526938A/en
Publication of JPH0526938A publication Critical patent/JPH0526938A/en
Withdrawn legal-status Critical Current

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  • Waveguide Aerials (AREA)

Abstract

PURPOSE:To enable manufacturing yield to be improved and manufacturing cost to be reduced in a card-type electronic circuit device with a planar antenna. CONSTITUTION:In a testing method for an electronic circuit device with a planar antenna, a circuit pattern 13 including a pattern 12 for connection with the antenna is formed, at the same time a printed-circuit board 11 where electronic parts 15-20 are mounted is coated by resin and is formed in a card shape, and then an antenna pattern is formed on the resin surface. Before coating the printed-circuit board 11 with resin, a test is executed by connecting the pattern 12 for connection and an antenna 22 of a tester 21, and then resin is coated, thus forming an antenna pattern.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、平面アンテナを備えた
カード型の電子回路装置に関する。近年、鉄道の改札や
高速道路の料金所等において、ICカードにより料金を
支払うことが行われている。しかし、一般のICカード
は、料金等のデータの入出力のために、ホスト装置(例
えば、料金管理装置)に対して物理的な接触を必要とす
るから、これに時間を要する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a card type electronic circuit device having a plane antenna. 2. Description of the Related Art In recent years, IC cards have been used to pay fees at railway ticket gates and toll gates on expressways. However, a general IC card requires physical contact with a host device (for example, a charge management device) in order to input and output data such as a charge, and this requires time.

【0002】そこで、通信機能を備えたカード型電子回
路装置が注目されている。この装置はアンテナを具備
し、電波により、即ち非接触でデータの入出力が可能で
あり、今後大量に使用されることが期待されている。
Therefore, a card type electronic circuit device having a communication function has been attracting attention. This device is equipped with an antenna and can input / output data by radio waves, that is, in a contactless manner, and is expected to be used in large quantities in the future.

【0003】[0003]

【従来の技術】図5は平面アンテナを備えたカード型電
子回路装置の斜視図、図6は図5のA−A線断面図であ
る。同図において、1はプリント基板であり、プリント
基板1はその両面に導体箔が形成された後、一方の面の
所要部分の導体箔が除去されて、アンテナとの結合パタ
ーンを含む回路パターン2が形成されて構成される。他
方の面の導体箔はそのままの状態でアースパターン(接
地導体)3となる。
2. Description of the Related Art FIG. 5 is a perspective view of a card type electronic circuit device having a planar antenna, and FIG. 6 is a sectional view taken along line AA of FIG. In the figure, reference numeral 1 denotes a printed circuit board. The printed circuit board 1 has a circuit pattern 2 including a coupling pattern with an antenna after conductor foils are formed on both surfaces of the printed circuit board 1 and a required portion of the conductive foil is removed. Are formed and configured. The conductor foil on the other surface becomes the earth pattern (ground conductor) 3 as it is.

【0004】プリント基板1上には、メモリ、ゲートア
レイ、マイクロプロセッサ等として機能する回路部品
4、チップ抵抗、コンデンサ、マイクロ波検波器、電池
等の部品5が実装される。この状態において、雌型内に
プリント基板1を装填して樹脂を流し込むことにより、
プリント基板1の部品実装面上に樹脂層6を形成してカ
ード状に成形する。次いで、樹脂層6表面に矩形状のア
ンテナパターン7を形成し、さらにこれら全面に化粧シ
ートを被着させて完成品となる。
On the printed circuit board 1, a circuit component 4 functioning as a memory, a gate array, a microprocessor and the like, a component 5 such as a chip resistor, a capacitor, a microwave detector and a battery are mounted. In this state, by loading the printed circuit board 1 in the female mold and pouring the resin,
A resin layer 6 is formed on the component mounting surface of the printed board 1 and molded into a card. Next, a rectangular antenna pattern 7 is formed on the surface of the resin layer 6, and a decorative sheet is attached to the entire surface of the antenna pattern 7 to complete the product.

【0005】この段階において、試験器との間で実際に
通信することにより、メモリの入出力試験や通信距離試
験等の機能試験が実施され、合格の場合は製品として出
荷されることになる。
At this stage, a functional test such as a memory input / output test and a communication distance test is carried out by actually communicating with the tester, and if it passes, the product is shipped as a product.

【0006】[0006]

【発明が解決しようとする課題】上述したような構成に
よると、装置の小型化、低価格化を図ることができると
いう利点を有しているのであるが、従来は装置完成後に
機能試験を実施しているため、ここで試験不合格となっ
た場合は、その修理は極めて困難であり、装置全体とし
て不良品となっていた。従って、歩留り(全製品の内良
品の得られる割合)が低く、全体としての製造コストが
高くなるという問題があった。
According to the above-mentioned structure, there is an advantage that the size and cost of the device can be reduced. Conventionally, the function test is performed after the device is completed. Therefore, if the test fails here, it is extremely difficult to repair it and the device as a whole is defective. Therefore, there is a problem that the yield (ratio of non-defective products out of all products) is low and the manufacturing cost as a whole is high.

【0007】本発明はこのような点に鑑みてさなれたも
のであり、その目的とするところは、歩留りを向上し、
全体としての製造コストを低減することである。
The present invention has been made in view of the above points, and an object of the present invention is to improve yield.
It is to reduce the manufacturing cost as a whole.

【0008】[0008]

【課題を解決するための手段】アンテナとの結合用パタ
ーンを含む回路パターンが形成されているとともに、電
子部品が実装されたプリント基板を、樹脂で被覆してカ
ード状に形成した後に、該樹脂表面にアンテナパターン
を形成してなる平面アンテナ付き電子回路装置の試験方
法として、以下のような方法を提供する。
A printed circuit board on which a circuit pattern including a pattern for coupling with an antenna is formed, and an electronic component is mounted is coated with resin to form a card, and then the resin is formed. The following method is provided as a method for testing an electronic circuit device with a planar antenna, which has an antenna pattern formed on the surface thereof.

【0009】即ち、前記プリント基板を樹脂で被覆する
以前に、前記結合用パターンと試験器のアンテナを結合
させて試験を実施し、その後に前記樹脂被覆、アンテナ
パターン形成を行う。
That is, before coating the printed circuit board with resin, the coupling pattern and the antenna of the tester are coupled to perform a test, and then the resin coating and antenna pattern formation are performed.

【0010】[0010]

【作用】本発明によると、プリント基板に必要な部品を
実装した後、樹脂で被覆する以前に、後に形成されるア
ンテナパターンと結合すべきプリント基板上に形成され
た結合パターンに試験器のアンテナを結合させ、装置の
基本動作確認試験を実施する。
According to the present invention, the antenna of the tester is mounted on the coupling pattern formed on the printed circuit board to be coupled with the antenna pattern formed after mounting the necessary components on the printed circuit board and before covering with the resin. And perform a basic operation confirmation test of the device.

【0011】この試験では、装置の感度や指向性といっ
たアンテナパターンがないと十分な特性の得られない項
目は試験できないものの、回路パターン切れ、半田ブリ
ッジ、回路パターンと部品との接続不良、部品不良等は
ほぼ発見することができる。この段階では、半田付の修
正や不良部品の交換等は容易に行なえるので、ここで良
品となるように修理を実施する。その後に、樹脂被覆、
アンテナパターンの形成を行い、上述したアンテナパタ
ーンがないと試験できない項目の試験を実施し、必要な
特性を確認する。
In this test, items that cannot obtain sufficient characteristics without an antenna pattern such as sensitivity and directivity of the device cannot be tested, but circuit patterns are broken, solder bridges, connection failures between circuit patterns and components, and component defects. Etc. can almost be found. At this stage, correction of soldering and replacement of defective parts can be easily performed, and therefore repairs are performed so that the products are non-defective. After that, resin coating,
After forming the antenna pattern, conduct the tests of the items that cannot be tested without the above-mentioned antenna pattern, and confirm the necessary characteristics.

【0012】これにより、従来よりも歩留りを向上する
ことができ、全体としての製造コストを低くすることが
できる。
As a result, the yield can be improved and the manufacturing cost as a whole can be reduced as compared with the conventional case.

【0013】[0013]

【実施例】以下、本発明の実施例を図面に基づいて説明
する。図1及び図2は本発明実施例の説明図であり、図
1は中間試験実施時の構成を示す図であり、図2は最終
試験実施時の構成を示す図である。
Embodiments of the present invention will be described below with reference to the drawings. 1 and 2 are explanatory views of an embodiment of the present invention, FIG. 1 is a diagram showing a configuration at the time of performing an intermediate test, and FIG. 2 is a diagram showing a configuration at the time of performing a final test.

【0014】まず、図1を参照する。同図において、1
1はプリント基板であり、プリント基板11はその両面
に導体箔が形成された後、一方の面の所要部分の導体箔
が除去されて、アンテナとの結合パターン12を含む回
路パターン13が形成されて構成される。他方の面の導
体箔はアースパターン(接地導体)14となる。
First, referring to FIG. In the figure, 1
Reference numeral 1 denotes a printed circuit board. After the conductive foil is formed on both surfaces of the printed circuit board 11, the conductive foil of a required portion on one surface is removed to form a circuit pattern 13 including a coupling pattern 12 with the antenna. Consists of The conductor foil on the other surface becomes a ground pattern (ground conductor) 14.

【0015】プリント基板11上には、メモリ、ゲート
アレイ、マイクロプロセッサ等として機能する回路部品
15、マイクロ波検波器16、終端抵抗17、起動用時
定数コンデンサ18,19、電池20等の部品が実装さ
れる。
On the printed circuit board 11, components such as a circuit component 15 functioning as a memory, a gate array and a microprocessor, a microwave detector 16, a terminating resistor 17, start-up time constant capacitors 18 and 19, a battery 20 and the like are provided. To be implemented.

【0016】必要な部品の実装が終了したならば、この
状態で、結合用パターン12と試験器21のアンテナ2
2とを結合させて、各回路や部品の動作試験を実施し、
回路パターン切れ、半田ブリッジ、回路パターンと部品
との接続不良、部品不良等がないかどうかを確認する。
この試験により、部品不良等を発見した場合には、適宜
半田付けの修正や不良部品の交換を実施する。
When the mounting of the necessary parts is completed, the coupling pattern 12 and the antenna 2 of the tester 21 are kept in this state.
Combine with 2 and perform operation test of each circuit and parts,
Check for broken circuit patterns, solder bridges, defective connections between circuit patterns and components, and defective components.
If a defect such as a component is found by this test, the soldering is corrected and the defective component is replaced as appropriate.

【0017】次いで、図2を参照する。中間試験におい
て異常が発見されなかったならば、あるいは修正が終了
したならば、雌型内にプリント基板11を装填して樹脂
を流し込むことにより、プリント基板11の部品実装面
上に樹脂層23を形成してカード状に成形する。そし
て、樹脂層23表面の結合用パターン12に対応する位
置に矩形状のアンテナパターン24を形成し、この状態
において最終試験を実施する。即ち、試験器21のアン
テナ22をアンテナパターン24に結合させ、装置の感
度や指向性等についての試験を実施し、異常が発見され
なかったならば、プリント基板11、樹脂層23、アン
テナパターン24の全体に化粧シート(図示せず)を被
着させて、試験済みの完成品となる。
Next, referring to FIG. If no abnormality is found in the intermediate test, or if the correction is completed, the printed circuit board 11 is loaded into the female mold and resin is poured into the female mold to form the resin layer 23 on the component mounting surface of the printed circuit board 11. It is formed into a card shape. Then, a rectangular antenna pattern 24 is formed at a position corresponding to the coupling pattern 12 on the surface of the resin layer 23, and a final test is performed in this state. That is, the antenna 22 of the tester 21 is coupled to the antenna pattern 24, a test for the sensitivity and directivity of the device is performed, and if no abnormality is found, the printed circuit board 11, the resin layer 23, the antenna pattern 24. A decorative sheet (not shown) is attached to the whole of the above, and the finished product is tested.

【0018】本実施例によると、中間試験において殆ど
の不良が発見されており、適宜修正を実施した後に、樹
脂被覆、アンテナ形成を実施しているので、最終試験で
不良と判定されることは非常に少なく、歩留りを向上す
ることができる。
According to the present embodiment, most of the defects are found in the intermediate test, and the resin coating and the antenna formation are performed after the appropriate correction, so that the final test does not determine the defect. The yield is very small and the yield can be improved.

【0019】図3及び図4は本発明他の実施例の説明図
であり、図3は中間試験時の構成を示す図、図4は最終
試験時の構成を示す図である。この実施例は、プリント
基板上に直交二偏波(水平偏波、垂直偏波)用の二つの
結合パターン31,32が形成されている場合の例であ
り、試験器33は二つのアンテナ34,35を有し、該
アンテナ34,35をそれぞれ結合パターン31,32
に結合させて中間試験及び最終試験を実施するものであ
る。試験器用のアンテナが直交二偏波共用である場合に
は、試験器のアンテナは当然に一つでよい。
FIGS. 3 and 4 are explanatory views of another embodiment of the present invention, FIG. 3 is a diagram showing a configuration at the time of an intermediate test, and FIG. 4 is a diagram showing a configuration at the time of a final test. This embodiment is an example in which two coupling patterns 31 and 32 for two orthogonal polarizations (horizontal polarization and vertical polarization) are formed on a printed circuit board, and the tester 33 includes two antennas 34. , 35 for connecting the antennas 34, 35 to the coupling patterns 31, 32, respectively.
The intermediate test and the final test are carried out in combination with. If the antenna for the tester has dual orthogonal polarizations, the number of antennas for the tester is naturally one.

【0020】尚、上記実施例は直交二偏波の場合である
が、円偏波の場合であっても同様に適用できることはい
うまでもない。
Although the above embodiment is for the case of two orthogonal polarized waves, it goes without saying that the same can be applied to the case of circular polarized waves.

【0021】[0021]

【発明の効果】以上述べたように本発明方法によれば、
平面アンテナを備えたカード型の電子回路装置におい
て、製造歩留りを向上させることができ、その結果とし
て装置の低コスト化を図ることができるという効果を奏
する。
As described above, according to the method of the present invention,
In the card-type electronic circuit device provided with the planar antenna, the manufacturing yield can be improved, and as a result, the cost of the device can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明実施例における中間試験時の説明図であ
る。
FIG. 1 is an explanatory diagram during an intermediate test in an example of the present invention.

【図2】本発明実施例における最終試験時の説明図であ
る。
FIG. 2 is an explanatory diagram at the final test in the example of the present invention.

【図3】本発明他の実施例における中間試験時の説明図
である。
FIG. 3 is an explanatory diagram at the time of an intermediate test in another example of the present invention.

【図4】本発明他の実施例における最終試験時の説明図
である。
FIG. 4 is an explanatory diagram at the final test in another example of the present invention.

【図5】電子回路装置の斜視図である。FIG. 5 is a perspective view of an electronic circuit device.

【図6】電子回路装置の断面図である。FIG. 6 is a cross-sectional view of an electronic circuit device.

【符号の説明】[Explanation of symbols]

11 プリント基板 12 結合用パターン 21 試験器 22 アンテナ 23 樹脂層 24 アンテナパターン 11 printed circuit boards 12 coupling patterns 21 tester 22 antenna 23 Resin layer 24 antenna pattern

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 アンテナとの結合用パターン(12)を含む
回路パターンが形成されているとともに、電子部品 (15
〜20) が実装されたプリント基板(11)を、樹脂(23)で被
覆してカード状に形成した後に、該樹脂(23)表面にアン
テナパターン(24)を形成してなる平面アンテナ付き電子
回路装置の試験方法において、 前記プリント基板(11)を樹脂(23)で被覆する以前に、前
記結合用パターン(12)と試験器(21)のアンテナ(22)を結
合させて試験を実施し、 その後に前記樹脂被覆、アンテナパターン形成を行うこ
とを特徴とする平面アンテナ付き電子回路装置の試験方
法。
1. A circuit pattern including a pattern (12) for coupling with an antenna is formed, and an electronic component (15)
~ 20) mounted on the printed circuit board (11) is coated with a resin (23) to form a card, and then an antenna pattern (24) is formed on the surface of the resin (23). In a test method for a circuit device, a test is performed by coupling the coupling pattern (12) and the antenna (22) of the tester (21) before coating the printed board (11) with the resin (23). A test method for an electronic circuit device with a flat antenna, characterized in that the resin coating and antenna pattern formation are then performed.
【請求項2】 前記結合用パターンを直交2偏波用に2
ケ形成し、前記試験器のアンテナをそれぞれ結合させて
行うようにしたことを特徴とする請求項1に記載の平面
アンテナ付き電子回路装置の試験方法。
2. The coupling pattern is used for two orthogonal polarizations.
2. The method for testing an electronic circuit device with a planar antenna according to claim 1, wherein the tester is formed by forming the antenna and the antennas of the tester are coupled to each other.
【請求項3】 前記2ケの結合用パターンが送受信する
信号が直交2偏波が組み合わされた結果としての円偏波
の電波であることを特徴とする請求項2に記載の平面ア
ンテナ付き電子回路装置の試験方法。
3. The electron with a planar antenna according to claim 2, wherein the signals transmitted and received by the two coupling patterns are circularly polarized radio waves as a result of combining two orthogonally polarized waves. Circuit device test method.
JP18478491A 1991-07-24 1991-07-24 Testing method for electronic circuit device with planar antenna Withdrawn JPH0526938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18478491A JPH0526938A (en) 1991-07-24 1991-07-24 Testing method for electronic circuit device with planar antenna

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18478491A JPH0526938A (en) 1991-07-24 1991-07-24 Testing method for electronic circuit device with planar antenna

Publications (1)

Publication Number Publication Date
JPH0526938A true JPH0526938A (en) 1993-02-05

Family

ID=16159233

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18478491A Withdrawn JPH0526938A (en) 1991-07-24 1991-07-24 Testing method for electronic circuit device with planar antenna

Country Status (1)

Country Link
JP (1) JPH0526938A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10288643A (en) * 1997-04-16 1998-10-27 Nippon Telegr & Teleph Corp <Ntt> Method and apparatus for judging malfunction of noncontact type ic card
JP2000208571A (en) * 1999-01-18 2000-07-28 Advantest Corp Method and device for testing device and card for measurement
JP2000242746A (en) * 1999-02-23 2000-09-08 Hitachi Ltd Device and method for examining non-contact ic card
JP2019211224A (en) * 2018-05-31 2019-12-12 株式会社ヨコオ Semiconductor inspection device with antenna

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10288643A (en) * 1997-04-16 1998-10-27 Nippon Telegr & Teleph Corp <Ntt> Method and apparatus for judging malfunction of noncontact type ic card
JP2000208571A (en) * 1999-01-18 2000-07-28 Advantest Corp Method and device for testing device and card for measurement
JP2000242746A (en) * 1999-02-23 2000-09-08 Hitachi Ltd Device and method for examining non-contact ic card
JP2019211224A (en) * 2018-05-31 2019-12-12 株式会社ヨコオ Semiconductor inspection device with antenna
US10715262B2 (en) 2018-05-31 2020-07-14 Yokowo Co., Ltd. Testing device for antenna-incorporated semiconductor device

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