JPH05265406A - Matrix electrode driving device for liquid crystal display panel - Google Patents

Matrix electrode driving device for liquid crystal display panel

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Publication number
JPH05265406A
JPH05265406A JP6414692A JP6414692A JPH05265406A JP H05265406 A JPH05265406 A JP H05265406A JP 6414692 A JP6414692 A JP 6414692A JP 6414692 A JP6414692 A JP 6414692A JP H05265406 A JPH05265406 A JP H05265406A
Authority
JP
Japan
Prior art keywords
common electrode
switch
electrode driving
liquid crystal
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6414692A
Other languages
Japanese (ja)
Inventor
Katsunori Tanaka
克憲 田中
Mikio Oshiro
幹夫 大城
Toshiya Onodera
俊也 小野寺
Katsuhiko Kishida
克彦 岸田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6414692A priority Critical patent/JPH05265406A/en
Publication of JPH05265406A publication Critical patent/JPH05265406A/en
Withdrawn legal-status Critical Current

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  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To provide the matrix electrode driving device for the liquid crystal display panel which drives a common electrode by inversion with small electric power. CONSTITUTION:This device consists of a 1st switch part 3-1 which is arranged between a driving line group 1-1 of the common electrode and a 1st common electrode driving part 5-1 and turns off only for a specific period from the switching timing of the polarities of driving signals outputted by the 1st and 2nd common electrode driving parts 5-1 and 5-2 at the time of the polarity switching, a 2nd switch part 3-2 which is arranged between a driving line group 1-2 of the common electrode and a 2nd common electrode driving part 5-2 and turns off for the same period simultaneously with the 1st switch part 3-1, and plural 3rd switch parts 2 which are provided, pair by pair, between the driving line group 1-1 and driving line group 1-2 and turn on while the switch parts 3-1 and 3-2 are OFF.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は液晶表示パネルの電極駆
動装置に係り、特にアクティブマトリックス駆動方式の
電極駆動を低電力で行う液晶表示パネルのマトリックス
電極駆動装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode driving device for a liquid crystal display panel, and more particularly to a matrix electrode driving device for a liquid crystal display panel which performs electrode driving of an active matrix driving system with low power.

【0002】液晶表示パネルは他の表示素子に比べ低電
力消費と低電圧動作を兼ね備えたフラットパネル型の表
示素子であり、この特徴により初期には時計、電卓に、
続いて家電、車載機器に、そしてパーソナルコンピュー
タやワードプロッセサ等に用途が拡大されている。液晶
表示パネルの液晶素子を駆動するための電極構成には、
セグメント電極、固定パターン電極及びマトリックス電
極がある。
A liquid crystal display panel is a flat panel type display device having both low power consumption and low voltage operation as compared with other display devices, and due to this characteristic, it is initially used for a clock, a calculator,
Subsequently, its applications are expanding to home appliances, in-vehicle devices, personal computers and word processors. The electrode structure for driving the liquid crystal element of the liquid crystal display panel,
There are segment electrodes, fixed pattern electrodes and matrix electrodes.

【0003】マトリックス電極は任意のパターンを表示
する場合に用いられるもので、一方の基板に形成された
複数の走査行電極と、他方の基板に形成された複数の信
号列電極とから構成され、これらの走査行電極と信号列
電極とからなる任意の交点(画素)に選択的に電圧を印
加することで文字表示、グラフィック表示、ビデオ表示
を行う。
The matrix electrode is used when displaying an arbitrary pattern, and is composed of a plurality of scanning row electrodes formed on one substrate and a plurality of signal column electrodes formed on the other substrate. Character display, graphic display, and video display are performed by selectively applying a voltage to an arbitrary intersection (pixel) formed by these scanning row electrodes and signal column electrodes.

【0004】これが、一般のマルチプレックス駆動方式
におけるマトリックス電極の構成であるが、これに対し
て、各画素毎にスイッチング素子を付加するアクティブ
マトリックス駆動方式は、走査行電極と信号列電極とが
スイッチング素子を介して同一基板面に形成されてお
り、他方の基板面は全面に亘って電極が構成されてい
る。
This is the structure of the matrix electrodes in the general multiplex drive system, whereas in the active matrix drive system in which a switching element is added to each pixel, the scanning row electrodes and the signal column electrodes are switched. The electrodes are formed on the same substrate surface via the element, and the electrodes are formed over the entire surface of the other substrate surface.

【0005】前記スイッチング素子には、例えばガラス
基板上に導電層、絶縁層及び非晶質Si薄膜等を蒸着・
スパッタ及びエッチングすることで形成されたa−Si
薄膜トランジスタ(TFT:Thin Film Tr
ansistor、以下TFTという)が用いられる。
TFTが用いられたアクティブマトリックス駆動方式で
は、複数の走査行電極を線順次方式で順々に走査し、一
つの走査行電極上の全TFTを一時一斉に導通状態に
し、この走査に同期して信号列電極に供給される信号に
応じた信号電荷をTFTに接続されているコンデンサに
供給する。
For the switching element, for example, a conductive layer, an insulating layer and an amorphous Si thin film are deposited on a glass substrate by vapor deposition.
A-Si formed by sputtering and etching
Thin film transistor (TFT: Thin Film Tr)
Anistor, hereinafter referred to as TFT) is used.
In the active matrix driving method using TFTs, a plurality of scanning row electrodes are sequentially scanned in a line-sequential method, all the TFTs on one scanning row electrode are simultaneously brought into a conductive state at a time, and in synchronization with this scanning. A signal charge corresponding to the signal supplied to the signal column electrode is supplied to the capacitor connected to the TFT.

【0006】このようにして、各画素毎に設けられたT
FTは各画素電極を独立分離することでクロストークを
防ぎ、コンデンサは信号電荷を1フレーム時間の間蓄積
して、液晶表示パネルのコントラストやレスポンス等の
性能の向上を図っている。
In this way, the T provided for each pixel is
The FT separates each pixel electrode independently to prevent crosstalk, and the capacitor accumulates the signal charge for one frame time to improve the performance such as contrast and response of the liquid crystal display panel.

【0007】[0007]

【従来の技術】最近のコンピュータシステムの小形化に
伴い、液晶表示パネルも更に小形化・低電力化が要求さ
れている。このため、アクティブマトリックス駆動方式
においても、スイッチング素子を駆動するための共通電
極の消費電力を低減する必要がある。
2. Description of the Related Art With the recent miniaturization of computer systems, further miniaturization and lower power consumption of liquid crystal display panels are required. Therefore, it is necessary to reduce the power consumption of the common electrode for driving the switching element even in the active matrix driving method.

【0008】そこで、マトリックス電極における共通電
極の印加電圧を一定にするこれまでの駆動方法から、共
通電極を2系統に分割し、一対の共通電極の印加電圧を
それぞれ互いに反転駆動する方法が提案されている。
Therefore, from the conventional driving method in which the voltage applied to the common electrode in the matrix electrode is constant, a method has been proposed in which the common electrode is divided into two systems and the voltages applied to the pair of common electrodes are inverted to each other. ing.

【0009】この方法によれば消費電流が最も大きい信
号列電極の駆動電圧を低減することにより低電力化が図
られ、液晶表示パネル全体の消費電力が低減するが、一
方共通電極の駆動電力は増加してしまう。
According to this method, the power consumption is reduced by reducing the drive voltage of the signal column electrode which consumes the most current, and the power consumption of the entire liquid crystal display panel is reduced, while the drive power of the common electrode is reduced. Will increase.

【0010】また、等価的に容量性負荷である共通電極
を短時間で所定の電圧に設定するために、前記共通電極
の反転駆動は高速・大出力のOPアンプ(演算増幅器)
を用いて行っている。したがって、反転駆動の回数が増
加すると共通電極の充・放電電流が増加する。特に、こ
の充・放電電流は1ライン反転の場合に最大となる。
Further, in order to set the common electrode, which is equivalently a capacitive load, to a predetermined voltage in a short time, the reversal drive of the common electrode is performed by a high speed / high output OP amplifier (operational amplifier).
Is done using. Therefore, the charging / discharging current of the common electrode increases as the number of times of inversion driving increases. In particular, this charge / discharge current becomes maximum in the case of one line inversion.

【0011】なお、充・放電電流は通常正電源から充電
されて負電源またはグランドに放電される。このこと
は、共通電極が複数に分割されている場合、例えば共通
電極の駆動線を2本ずつ共通に接続して駆動する場合も
同じである。
The charging / discharging current is usually charged from the positive power source and discharged to the negative power source or the ground. This is the same when the common electrode is divided into a plurality of parts, for example, when two drive lines of the common electrode are commonly connected and driven.

【0012】[0012]

【発明が解決しようとする課題】上述のように、従来の
液晶表示パネルのマトリックス電極駆動装置は、共通電
極の印加電圧を反転駆動するための駆動電流が大きくな
り、共通電極の消費電力が増加するという問題があっ
た。
As described above, in the conventional matrix electrode driving device for the liquid crystal display panel, the driving current for inverting the voltage applied to the common electrode is large, and the power consumption of the common electrode is increased. There was a problem to do.

【0013】本発明はこのような事情に鑑みてなされた
もので、その課題は低電力で共通電極を反転駆動する液
晶表示パネルのマトリックス電極駆動装置を提供するこ
とにある。
The present invention has been made in view of the above circumstances, and an object thereof is to provide a matrix electrode driving device for a liquid crystal display panel that drives a common electrode in reverse with low power.

【0014】[0014]

【課題を解決するための手段】図1は本発明の原理説明
図である。上記課題を解決するために、本発明は、周期
的に互いに逆極性の駆動信号を出力する一対の共通電極
駆動部5−1 ,5−2 と、この一対の共通電極駆動部5
−1 ,5−2 のうち、一方の共通電極駆動部5−1 に接
続される第1の駆動線群1−1 と、他方の共通電極駆動
部5−2 に接続される第2の駆動線群1−2 とを備えた
液晶表示パネルのマトリックス電極駆動装置であって、
前記第1の駆動線群1−1 と前記一方の共通電極駆動部
5−1 との間に配置され、前記一対の共通電極駆動部5
−1 ,5−2 が出力する駆動信号の極性の切換え時に、
この切換えタイミングから所定の期間だけオフ状態とな
る第1のスイッチ部3−1 と、前記第2の駆動線群1−
2 と前記他方の共通電極駆動部5−2 との間に配置さ
れ、前記第1のスイッチ部3−1 と同時に同期間だけオ
フ状態となる第2のスイッチ部3−2 と、前記第1の駆
動線群1−1 と前記第2の駆動線群1−2 との間に一対
毎に設けられ、前記第1、2の各スイッチ部3−1 ,3
−2 がオフ状態の間はオン状態となる複数の第3のスイ
ッチ部2とを具備して構成する。
FIG. 1 illustrates the principle of the present invention. In order to solve the above-mentioned problems, the present invention provides a pair of common electrode driving units 5-1 and 5-2 which periodically output drive signals of opposite polarities, and a pair of common electrode driving unit 5
-1, 5-2, a first drive line group 1-1 connected to one common electrode drive section 5-1 and a second drive line group connected to the other common electrode drive section 5-2. A matrix electrode driving device for a liquid crystal display panel comprising line group 1-2,
The pair of common electrode driving units 5 are arranged between the first driving line group 1-1 and the one common electrode driving unit 5-1.
-1, When switching the polarity of the drive signal output by 5-2,
A first switch section 3-1 that is turned off for a predetermined period from the switching timing, and the second drive line group 1-
2 and the other common electrode drive section 5-2, and a second switch section 3-2 which is turned off at the same time as the first switch section 3-1 at the same time as the first switch section 3-1; Between the first drive line group 1-1 and the second drive line group 1-2, and the first and second switch units 3-1 and 3 are provided.
And a plurality of third switch units 2 which are in the ON state while −2 is in the OFF state.

【0015】[0015]

【作用】本発明では、図1の如く、一対の共通電極駆動
部5−1 ,5−2 における駆動信号の極性の切換え時
に、この切換えタイミングから所定の期間だけ第1,2
のスイッチ部3−1 ,3−2 をオフ状態にすると同時
に、複数の第3のスイッチ部2をオン状態にして、第
1,2の駆動線群1−1 ,1−2 にそれぞれ接続され複
数対に分割された共通電極群の高電位の電極群から低電
位の電極群に向かって電荷を移動する。
According to the present invention, as shown in FIG. 1, when the polarities of the driving signals in the pair of common electrode driving sections 5-1 and 5-2 are switched, the first and second electrodes are switched for a predetermined period from this switching timing.
Switch sections 3-1 and 3-2 are turned off, and at the same time, a plurality of third switch sections 2 are turned on and connected to the first and second drive line groups 1-1 and 1-2, respectively. The charges are moved from the high potential electrode group of the common electrode group divided into a plurality of pairs toward the low potential electrode group.

【0016】[0016]

【実施例】以下、本発明に係る好適な実施例を図面に基
づいて説明する。図2乃至図4は本発明の一実施例を示
す。図2は本発明の実施例に係る液晶表示パネルのマト
リックス電極駆動装置の全体構成図を、図3は図2に示
す液晶表示パネルのマトリックス電極駆動装置の動作を
示すタイミングチャートを、図4は図3に示す液晶表示
パネルのマトリックス電極駆動装置の共通電極の駆動線
を流れる電流の状態を示す説明図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. 2 to 4 show an embodiment of the present invention. 2 is an overall configuration diagram of a matrix electrode driving device for a liquid crystal display panel according to an embodiment of the present invention, FIG. 3 is a timing chart showing the operation of the matrix electrode driving device for a liquid crystal display panel shown in FIG. 2, and FIG. 4 is an explanatory diagram showing a state of a current flowing through a drive line of a common electrode of the matrix electrode drive device of the liquid crystal display panel shown in FIG. 3. FIG.

【0017】図2において、液晶表示パネルのマトリッ
クス電極駆動装置は、第1,2の共通電極駆動部5−1
,5−2 と、液晶表示パネル10と、第1,2,3の
スイッチ部3−1 ,3−2 ,2と、インバータロジック
16aとで構成される。
In FIG. 2, the matrix electrode driving device of the liquid crystal display panel includes a first and a second common electrode driving section 5-1.
, 5-2, a liquid crystal display panel 10, first, second, and third switch sections 3-1, 3-2, 2 and an inverter logic 16a.

【0018】前記液晶表示パネル10は偶数の走査行電
極(ゲートバス)X2n(n:自然数)または奇数の走査
行電極X2n+1と第n番目の信号列電極Yn(データバ
ス)とのそれぞれ交点にスイチッング素子としてTFT
10a-2n又はTFT10a-2n+1が配置されて構成される。そ
して、TFT10a-2nまたはTFT10a-2n+1はそのゲート
が走査行電極X2nまたはX2n+1と接続され、一方ドレイ
ンが信号列電極Ynに接続されると共に、それぞれのソ
ースには共通電極(画素電極群)の等価容量C10 b-2n
たはC10b-2n+1が接続される。
The liquid crystal display panel 10 has an even scanning row electrode (gate bus) X 2n (n: natural number) or an odd scanning row electrode X 2n + 1 and an nth signal column electrode Yn (data bus). TFT as a switching element at each intersection
10a-2n or TFTs 10a-2n + 1 are arranged. The gate of the TFT 10a-2n or the TFT 10a-2n + 1 is connected to the scan row electrode X 2n or X 2n + 1 , the drain is connected to the signal column electrode Yn, and each source is common. The equivalent capacitance C 10 b-2n or C 10b-2n + 1 of the electrode (pixel electrode group) is connected.

【0019】なお、前記走査行電極X2nまたはX2n+1
信号列電極Ynは、図示しない制御部でそれぞれ制御さ
れるゲートバス駆動部、データバス部から供給される信
号で駆動されるものである。
The scanning row electrode X 2n or X 2n + 1 and the signal column electrode Yn are driven by signals supplied from a gate bus driving unit and a data bus unit, which are controlled by a control unit (not shown). Is.

【0020】第1の共通電極駆動部5−1 は,電源入力
端子19に接続されているボルテージフォロアのOPア
ンプ5aから成り、その入力側は信号入力端子15−1
に接続され、その出力側は出力線21−1 を介して前記
第2のスイッチ部3−2 の入力側に接続されている。
The first common electrode drive section 5-1 is composed of a voltage follower OP amplifier 5a connected to the power supply input terminal 19, and its input side is a signal input terminal 15-1.
And the output side is connected to the input side of the second switch section 3-2 via the output line 21-1.

【0021】また、第2の共通電極駆動部5−2 は,電
源入力端子19に接続されているボルテージフォロアの
OPアンプ5bから成り、その入力側は信号入力端子1
5−2 に接続され、その出力側は出力線21−2 を介し
て前記第1のスイッチ部3−1 の入力側に接続されてい
る。ここで、信号入力端子15−1 ,15−2 はそれぞ
れ制御部に接続されて、また、前記OPアンプ5a,5
bはそれぞれ接地されている。
The second common electrode driving section 5-2 is composed of a voltage follower OP amplifier 5b connected to the power source input terminal 19, and its input side is the signal input terminal 1
5-2, the output side of which is connected to the input side of the first switch section 3-1 via the output line 21-2. Here, the signal input terminals 15-1 and 15-2 are respectively connected to the control section, and the OP amplifiers 5a and 5-2 are connected.
b is grounded.

【0022】また、第1のスイッチ部3−1 はアナログ
スイッチ3aから成り、その出力側は共通電極の駆動線
を1−2 を介して等価容量C10b-2n+1の一端に接続され
ると共に、接続線4−2 を介してアナログスイッチ2a
から成る第3のスイッチ部2の入力側に接続される。
The first switch section 3-1 is composed of an analog switch 3a, the output side of which is connected to the one end of the equivalent capacitance C 10b-2n + 1 through the drive line of the common electrode via 1-2. Together with the analog switch 2a via the connection line 4-2.
Is connected to the input side of the third switch unit 2.

【0023】一方、第2のスイッチ部3−2 はアナログ
スイッチ3bから成り、その出力側は共通電極の駆動線
を1−1 を介して前記等価容量C10b-2nに接続されると
共に、接続線4−1 を介して第3のスイッチ部2の出力
側に接続される。
On the other hand, the second switch section 3-2 comprises an analog switch 3b, the output side of which is connected to the drive line of the common electrode via 1-1 and to the equivalent capacitance C 10b-2n , and is also connected. It is connected to the output side of the third switch section 2 via the line 4-1.

【0024】更に、信号入力端子16−2 は第1,2の
スイッチ部3−1 ,3−2 のそれぞれの制御端子に接続
されると共に、インバータロジック16aと接続線16
−1とを介して前記第3のスイッチ部2の制御端子に接
続される。
Further, the signal input terminal 16-2 is connected to the respective control terminals of the first and second switch sections 3-1 and 3-2, and the inverter logic 16a and the connecting line 16 are connected.
−1 is connected to the control terminal of the third switch unit 2.

【0025】なお、OPアンプ5a,5bの出力電圧の
極性が互いに周期的に反転するタイミングに同期して、
制御部から信号入力端子16ー2 を介して第1,2,3
のスイッチ部3−1,3−2 ,2にスイッチ制御信号が
供給される。そして、このスイッチ制御信号により、ア
ナログスイッチ3a,3bのオン・オフ動作とアナログ
スイッチ2aのオン・オフ動作が交互に逆動作で行われ
るようになっている。
Incidentally, in synchronization with the timing when the polarities of the output voltages of the OP amplifiers 5a and 5b are periodically inverted,
From the control unit through the signal input terminal 16-2, the first, second, third
A switch control signal is supplied to the switch units 3-1, 3-2, and 2 of. The switch control signal causes the on / off operation of the analog switches 3a and 3b and the on / off operation of the analog switch 2a to be alternately performed in reverse.

【0026】また、前記アナログスイッチ2a,3a,
3bはそれぞれpMOSとnMOSとを並列に接続した
もので、MOS−FETを同時にオン動作或はオフ動作
させて機械的にリーレースイッチの代りをするもので、
平坦なオン抵抗特性を有するものである。
Further, the analog switches 2a, 3a,
3b is a circuit in which a pMOS and an nMOS are connected in parallel, and the MOS-FET is turned on or off at the same time to mechanically replace the relay switch.
It has a flat on-resistance characteristic.

【0027】次に、本実施例に係る液晶表示パネルのマ
トリックス電極駆動装置の動作を図2乃至図4に基づい
て説明する。先ず、第1,2の共通電極駆動部5−1 ,
5−2 がそれぞれ共通電極の駆動線1−1 ,1−2 に直
接接続されている場合について説明する。
Next, the operation of the matrix electrode driving device for the liquid crystal display panel according to this embodiment will be described with reference to FIGS. First, the first and second common electrode driving units 5-1 and
The case where 5-2 is directly connected to the drive lines 1-1 and 1-2 of the common electrode will be described.

【0028】図示しない制御部はフレーム同期信号(V
SYNC)やライン同期信号(HSYNC)またはライン同期信
号を分周して、図3(a)に示す交流化のためのタイミ
ング信号を作る。そして、このタイミング信号に基づい
て(b)に示すような互いに逆極性の交流化制御信号を
作り、それぞれ信号入力端子15−1 ,15−2 を介し
て第1の共通電極駆動部5−1、第2の共通電極駆動部
5−2に供給する。
A control unit (not shown) controls the frame synchronization signal (V
SYNC), a line synchronization signal (HSYNC) or a line synchronization signal is frequency-divided to generate a timing signal for AC conversion shown in FIG. Then, based on this timing signal, alternating current control signals of opposite polarities are generated as shown in (b), and the first common electrode drive section 5-1 is respectively supplied via the signal input terminals 15-1 and 15-2. , To the second common electrode driver 5-2.

【0029】すると、第1の共通電極駆動部5−1 は
(c)に実線で示す出力信号を共通電極の駆動線1−1
を介して共通電極の等価容量C10b-2nに供給する。一
方、第2の共通電極駆動部5−2 は破線で示す出力信号
を共通電極の駆動線1−2 を介して共通電極の等価容量
10b-2n+1に供給する。
Then, the first common electrode driving section 5-1 outputs the output signal indicated by the solid line in (c) to the common electrode driving line 1-1.
To the equivalent capacitance C 10b-2n of the common electrode. On the other hand, the second common electrode drive section 5-2 supplies the output signal indicated by the broken line to the equivalent capacitance C 10b-2n + 1 of the common electrode via the drive line 1-2 of the common electrode.

【0030】ここで、第1の共通電極駆動部5−1 が
(c)のa1 で示す低レベルの信号を出力するときは、
共通電極の等価容量C10b-2nに既に蓄積された電荷が放
電し、(d)のa2 で示す放電電圧の変化に応じた放電
電流((e)のa3 )が第1の共通電極駆動部5−1 へ
流れる。この放電電流はOPアンプ5aを介してグラン
ドに流れる。
Here, when the first common electrode driving section 5-1 outputs the low level signal indicated by a 1 in (c),
The charge already accumulated in the equivalent capacitance C 10b-2n of the common electrode is discharged, and the discharge current (a 3 of (e)) corresponding to the change of the discharge voltage indicated by a 2 of (d) is the first common electrode. It flows to the drive unit 5-1. This discharge current flows to the ground via the OP amplifier 5a.

【0031】一方、このとき共通電極駆動部5−2 は共
通電極駆動部5−1 に対して逆極性の高レベルの信号
((c)のa4 )を出力するので、(d)にa5 で示す
充電電圧による充電電流((e)のa6 )が共通電極の
等価容量C10b-2n+1に流れて、共通電極を所定の電圧で
印加する。
On the other hand, at this time, the common electrode driving section 5-2 outputs a high-level signal (a 4 of (c)) of the opposite polarity to the common electrode driving section 5-1. The charging current (a 6 of (e)) due to the charging voltage shown by 5 flows into the equivalent capacitance C 10b-2n + 1 of the common electrode, and the common electrode is applied with a predetermined voltage.

【0032】次に、制御部からスイッチ制御信号が第
1,2,3のスイッチ部3−1 ,3−2 ,2に供給され
る本実施例の動作について説明する。制御部から(f)
のa7 で示すような高レベルのスイッチ制御信号が信号
入力端子16−2 に供給されると、このスイッチ制御信
号は第1、2のスイッチ部3−1 ,3−2 にこのまま供
給され、スイッチ部3−1 ,3−2 はオン状態となる。
一方、このスイッチ制御信号はインバータロジック16
aで(f)のa8 で示すように反転され低レベル信号と
なり、第3のスイッチ部2はオフ状態となる。
Next, the operation of the present embodiment in which the switch control signal is supplied from the control section to the first, second and third switch sections 3-1, 3-2, 2 will be described. From the control unit (f)
When a high level switch control signal as indicated by a 7 in Figure 7 is supplied to the signal input terminal 16-2, this switch control signal is supplied to the first and second switch sections 3-1 and 3-2 as they are, The switch units 3-1 and 3-2 are turned on.
On the other hand, this switch control signal is the inverter logic 16
At a, the signal is inverted as shown by a 8 in (f) to become a low level signal, and the third switch section 2 is turned off.

【0033】すると、第1の共通電極駆動部5−1 は
(c)にa1 で示す低レベルの出力信号を出力線21−
1 と、オン状態の第2のスイッチ部3−2 と、共通電極
の駆動線1−1 とを介して共通電極の等価容量C10b-2n
に供給する。
Then, the first common electrode driving section 5-1 outputs the low level output signal indicated by a 1 to the output line 21- in (c).
1, the second switch unit 3-2 in the ON state, and the drive line 1-1 of the common electrode, the equivalent capacitance C 10b-2n of the common electrode.
Supply to.

【0034】一方、第2の共通電極駆動部5−2 は
(c)にa4 で示す高レベルの出力信号を出力線21−
2 と、オン状態の第1のスイッチ部3−1 と共通電極の
駆動線1−2 とを介して共通電極の等価容量C10b-2n+1
に供給する。
On the other hand, the second common electrode driving section 5-2 outputs the high level output signal indicated by a 4 to the output line 21- in (c).
2, and the equivalent capacitance C 10b-2n + 1 of the common electrode via the first switch section 3-1 in the ON state and the drive line 1-2 of the common electrode.
Supply to.

【0035】続いて、(f)にa9 で示すように信号入
力端子16−2 に供給されるスイッチ制御信号が立下る
と、第1,2のスイッチ部3−1 ,3−2 はオフ状態と
なる一方、前記スイッチ制御信号はインバータロジック
16aで(f)のa10で示すように反転され高レベルの
信号となり第3のスイッチ部2をがオン状態とする。
Then, when the switch control signal supplied to the signal input terminal 16-2 falls as indicated by a 9 in (f), the first and second switch sections 3-1 and 3-2 are turned off. while the state, the switch control signal is a third switch section 2 becomes a high level signal is inverted as shown by a 10 in the inverter logic 16a (f) is turned on.

【0036】したがって、前述した偶数の共通電極の等
価容量C10b-2nからの放電電流は、共通電極の駆動線1
−1 から接続線4−1 を通って第3のスイッチ部2に流
入する。そして、この電流は接続線4−2 から駆動線1
−2 を通って奇数の共通電極の等価容量C10b-2n+1に流
入する。
Therefore, the discharge current from the equivalent capacitance C 10b-2n of the even-numbered common electrodes is equal to the drive line 1 of the common electrodes.
−1 through the connection line 4-1 and flows into the third switch unit 2. Then, this current flows from the connection line 4-2 to the drive line 1
It flows through −2 into the equivalent capacitance C 10b-2n + 1 of the odd-numbered common electrode.

【0037】次に、高レベルのスイッチ制御信号信号
((f)のa11)が入力端子16−2に供給されると、
第1、2のスイッチ部3−1 ,3−2 は再びオン状態と
なり、第3のスイッチ部2がオフ状態となる。したがっ
て、前述した共通電極の等価容量C10b-2nからの放電電
流は、入力端子16−2 に供給されるスイッチ制御信号
の低レベル信号の期間だけ、即ち、インバータロジック
16aで反転されて高レベルの信号がスイッチ部2に供
給される期間((f)のa16)だけ、(g)のa 12で示
すように流れる。
Next, a high level switch control signal signal
(A in (f)11) Is supplied to the input terminal 16-2,
The first and second switch sections 3-1 and 3-2 are turned on again.
Then, the third switch unit 2 is turned off. Because
And the equivalent capacitance C of the common electrode described above.10b-2nDischarge from
Current is a switch control signal supplied to the input terminal 16-2.
Only during the period of low level signal of the inverter logic
The high level signal inverted by 16a is supplied to the switch unit 2.
Period to be paid (a in (f)16), A of (g) 12Indicated by
It flows like a stream.

【0038】したがって、等価容量C10b-2n+1は等価容
量C10b-2nの放電電流によって充電されその電位が上昇
するので、第1の共通電極駆動部5−1 からは図(h)
の鎖線a13で示したような充電電流は必要なく、実線a
14で示したような充電電流のみで良い。
Therefore, the equivalent capacitance C 10b-2n + 1 is charged by the discharge current of the equivalent capacitance C 10b-2n and its potential rises, so that the first common electrode driving section 5-1 is shown in FIG.
The charging current as shown by the chain line a 13 in FIG.
Only the charging current shown in 14 is required.

【0039】なお、(g)のa15は上述の偶数の共通電
極の等価容量C10b-2nと奇数の共通電極の等価容量C
10b-2n+1との充放電の関係が逆、即ち等価容量C
10b-2n+1から等価容量C10b-2nへ電荷が流入するときの
放電電流を示す。
Incidentally, a 15 in (g) is the equivalent capacitance C 10b-2n of the even - numbered common electrodes and the equivalent capacitance C of the odd - numbered common electrodes described above.
The charge / discharge relationship with 10b-2n + 1 is reversed, that is, the equivalent capacity C
The discharge current when charges flow from 10b-2n + 1 to the equivalent capacitance C 10b-2n is shown.

【0040】以降、第1の共通電極駆動部5−1 と第2
の共通電極駆動部5−2 の出力電圧が反転する度に、そ
のタイミングに同期して上述した動作が繰り返される。
このとき、共通電極の駆動線1−1 及び駆動線1−2 に
は、図4に示すような充放電電流が流れる。
After that, the first common electrode driving section 5-1 and the second common electrode driving section 5-1
Every time the output voltage of the common electrode driving section 5-2 is inverted, the above operation is repeated in synchronization with the timing.
At this time, a charging / discharging current as shown in FIG. 4 flows through the drive lines 1-1 and 1-2 of the common electrode.

【0041】このようにして、第1の共通電極部5−1
及び第2の共通電極部5−2 の出力電圧が反転すると、
このタイミングに同期して、第1,2のスイッチ部3−
1 ,3−2 が一時的にオフ状態となり、第3のスイッチ
部2がオン状態となるので、共通電極の等価容量C
10b-2nと等価容量C10b-2n+1との間で高電位側から低電
位側に向かって電荷の移動が行われ、それぞれ共通電極
の電位を向上する。
In this way, the first common electrode section 5-1
And when the output voltage of the second common electrode section 5-2 is inverted,
In synchronization with this timing, the first and second switch units 3-
Since 1 and 3-2 are temporarily turned off and the third switch section 2 is turned on, the equivalent capacitance C of the common electrode is
The charge is moved from the high potential side to the low potential side between 10b-2n and the equivalent capacitance C 10b-2n + 1, and the potential of the common electrode is improved.

【0042】したがって、第1の共通電極駆動部5−1
及び第2の共通電極駆動部5−2 の負荷が軽減されて、
液晶表示パネル駆動の低電力化が実現できる。なお、本
実施例では第1乃至第3のスイッチ部3−1 ,3−2 ,
2にアナログスイッチを用いたが、他の素子、例えばF
ETでも良い。また、液晶表示パネルはTFT方式のも
のを用いたが、構造上、共通電極となるかまたは機能的
にこれに相当する方式を用いても良い。
Therefore, the first common electrode driver 5-1
And the load on the second common electrode driver 5-2 is reduced,
It is possible to reduce the power consumption for driving the liquid crystal display panel. In addition, in the present embodiment, the first to third switch units 3-1, 3-2,
Although an analog switch was used for 2, other elements such as F
ET is fine. Further, although the liquid crystal display panel is of the TFT type, it may be of a type having a common electrode or a functionally equivalent type in terms of structure.

【0043】[0043]

【発明の効果】以上説明したように、本発明によれば、
一対の共通電極駆動部における駆動信号の極性の切換え
時に、この切換えタイミングから所定の期間だけ第1,
2のスイッチ部をオフ状態にすると同時に、複数の第3
のスイッチ部をオン状態にして、第1,2の駆動線群に
それぞれ接続され複数対に分割された共通電極群の高電
位の電極群から低電位の電極群に向かって電荷を移動し
て、これらの電極群の電位を上昇するので、共通電極駆
動部の負荷を軽減することができ、液晶表示パネルのマ
トリックス電極駆動の低電力化が図れる。
As described above, according to the present invention,
When switching the polarity of the drive signal in the pair of common electrode drive units, the first and
At the same time as turning off the second switch unit,
Of the common electrode group connected to the first and second drive line groups and divided into a plurality of pairs to move the charges from the high potential electrode group to the low potential electrode group. Since the potentials of these electrode groups are increased, the load on the common electrode driving unit can be reduced, and the power consumption for driving the matrix electrodes of the liquid crystal display panel can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理説明図である。FIG. 1 is a diagram illustrating the principle of the present invention.

【図2】本発明の実施例に係る液晶表示パネルのマトリ
ックス電極駆動装置の全体構成図である。
FIG. 2 is an overall configuration diagram of a matrix electrode driving device of a liquid crystal display panel according to an embodiment of the present invention.

【図3】図2に示す液晶表示パネルのマトリックス電極
駆動装置の各部の信号状態を示すタイミングチャートで
ある。
3 is a timing chart showing signal states of respective parts of the matrix electrode driving device of the liquid crystal display panel shown in FIG.

【図4】図2に示す液晶表示パネルのマトリックス電極
駆動装置の駆動線を流れる電流の状態を示す説明図であ
る。
4 is an explanatory diagram showing a state of a current flowing through a drive line of a matrix electrode driving device of the liquid crystal display panel shown in FIG.

【符号の説明】[Explanation of symbols]

1−1 ,1−1 …駆動線 2…第3のスイッチ 3−1 …第1のスイッチ部 3−2 …第2のスイッチ部 5−1 …第1の共通電極駆動部 5−2 …第2の共通電極駆動部 10…液晶表示パネル 1-1, 1-1 ... Drive line 2 ... Third switch 3-1 ... First switch section 3-2 ... Second switch section 5-1 ... First common electrode drive section 5-2 ... 2 common electrode drive unit 10 ... Liquid crystal display panel

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岸田 克彦 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Katsuhiko Kishida 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 周期的に互いに逆極性の駆動信号を出力
する一対の共通電極駆動部(5−1 ,5−2 )と、この
一対の共通電極駆動部(5−1 ,5−2 )のうち、一方
の共通電極駆動部(5−1 )に接続される第1の駆動線
群(1−1)と、他方の共通電極駆動部(5−2 )に接続
される第2の駆動線群(1−2)とを備えた液晶表示パネ
ルのマトリックス電極駆動装置であって、 前記第1の駆動線群(1−1)と前記一方の共通電極駆動
部(5−1 )との間に配置され、前記一対の共通電極駆
動部(5−1 ,5−2 )が出力する駆動信号の極性の切
換え時に、この切換えタイミングから所定の期間だけオ
フ状態となる第1のスイッチ部(3−1)と、 前記第2の駆動線群(1−2)と前記他方の共通電極駆動
部(5−2 )との間に配置され、前記第1のスイッチ部
(3−1)と同時に同期間だけオフ状態となる第2のスイ
ッチ部(3−2)と、 前記第1の駆動線群(1−1)と前記第2の駆動線群(1
−2)との間に一対毎に設けられ、前記第1、2の各スイ
ッチ部(3−1 ,3−2 )がオフ状態の間はオン状態と
なる複数の第3のスイッチ部(2)とを具備したことを
特徴とする液晶表示パネルのマトリックス電極駆動装
置。
1. A pair of common electrode driving sections (5-1, 5-2) which periodically output driving signals of opposite polarities, and a pair of common electrode driving sections (5-1, 5-2). Of the first drive line group (1-1) connected to one common electrode drive section (5-1) and the second drive line group connected to the other common electrode drive section (5-2) A matrix electrode driving device for a liquid crystal display panel, comprising: a line group (1-2), comprising: the first drive line group (1-1) and the one common electrode driving section (5-1). A first switch unit (which is disposed between the switch units and is turned off for a predetermined period from the switching timing when the polarity of the drive signal output by the pair of common electrode driving units (5-1, 5-2) is switched. 3-1), the second drive line group (1-2) and the other common electrode drive section (5-2), and the first switch. (3-1) at the same time the second switching section in the off state by the same time period and (3-2), the first driving line group (1-1) and the second drive line group (1
-2) and a pair of third switch sections (2) that are provided in pair with each other and are in the ON state while the first and second switch sections (3-1, 3-2) are in the OFF state. ) A matrix electrode driving device for a liquid crystal display panel, comprising:
【請求項2】 前記第1,2,3の各スイッチ部(3−
1 ,3−2 ,2)が半導体素子であることを特徴とする
請求項1記載の液晶表示パネルのマトリックス電極駆動
装置。
2. The first, second and third switch parts (3-
The matrix electrode driving device for a liquid crystal display panel according to claim 1, wherein 1, 3-2 and 2) are semiconductor elements.
【請求項3】 前記一対の共通電極駆動部(5−1 ,5
−2 )の各共通電極における面積を略等しく形成したこ
とを、特徴とする請求項1記載の液晶表示パネルのマト
リックス電極駆動装置。
3. The pair of common electrode driving units (5-1, 5)
2. The matrix electrode driving device for a liquid crystal display panel according to claim 1, wherein the areas of the common electrodes of (2) are formed to be substantially equal.
JP6414692A 1992-03-19 1992-03-19 Matrix electrode driving device for liquid crystal display panel Withdrawn JPH05265406A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6414692A JPH05265406A (en) 1992-03-19 1992-03-19 Matrix electrode driving device for liquid crystal display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6414692A JPH05265406A (en) 1992-03-19 1992-03-19 Matrix electrode driving device for liquid crystal display panel

Publications (1)

Publication Number Publication Date
JPH05265406A true JPH05265406A (en) 1993-10-15

Family

ID=13249649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6414692A Withdrawn JPH05265406A (en) 1992-03-19 1992-03-19 Matrix electrode driving device for liquid crystal display panel

Country Status (1)

Country Link
JP (1) JPH05265406A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0834763A1 (en) * 1995-05-23 1998-04-08 International Business Machines Corporation Common electrode driving device in a liquid crystal display
JP2005024583A (en) * 2003-06-30 2005-01-27 Renesas Technology Corp Liquid crystal driver
JP2009145639A (en) * 2007-12-14 2009-07-02 Epson Imaging Devices Corp Driving system, electro-optical device and electronic device
JP2010277107A (en) * 2010-07-22 2010-12-09 Renesas Electronics Corp Liquid crystal driving device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0834763A1 (en) * 1995-05-23 1998-04-08 International Business Machines Corporation Common electrode driving device in a liquid crystal display
EP0834763A4 (en) * 1995-05-23 1999-03-31 Ibm Common electrode driving device in a liquid crystal display
US6094192A (en) * 1995-05-23 2000-07-25 International Business Machines Corporation Common electrode driving device in a liquid crystal display
JP2005024583A (en) * 2003-06-30 2005-01-27 Renesas Technology Corp Liquid crystal driver
TWI398841B (en) * 2003-06-30 2013-06-11 Renesas Electronics Corp Liquid crystal drive device
JP2009145639A (en) * 2007-12-14 2009-07-02 Epson Imaging Devices Corp Driving system, electro-optical device and electronic device
JP2010277107A (en) * 2010-07-22 2010-12-09 Renesas Electronics Corp Liquid crystal driving device

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