JPH0526325B2 - - Google Patents

Info

Publication number
JPH0526325B2
JPH0526325B2 JP58084396A JP8439683A JPH0526325B2 JP H0526325 B2 JPH0526325 B2 JP H0526325B2 JP 58084396 A JP58084396 A JP 58084396A JP 8439683 A JP8439683 A JP 8439683A JP H0526325 B2 JPH0526325 B2 JP H0526325B2
Authority
JP
Japan
Prior art keywords
diamond
type semiconductor
substrate
semiconductor
semiconductor part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58084396A
Other languages
Japanese (ja)
Other versions
JPS59208821A (en
Inventor
Akira Doi
Naoharu Fujimori
Takeshi Yoshioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP8439683A priority Critical patent/JPS59208821A/en
Publication of JPS59208821A publication Critical patent/JPS59208821A/en
Publication of JPH0526325B2 publication Critical patent/JPH0526325B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1602Diamond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1604Amorphous materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/7317Bipolar thin film transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】 (イ) 発明の目的 本発明はダイヤモンド半導体に関するものであ
り、ダイヤモンドの持つ高い熱伝導度、高いキヤ
リヤー移動度、結晶状態により制御可能な比抵抗
等に特徴を利用し、マイクロ波発信用、高密度集
積型VLSI用、更には高温で動作可能な同用途に
有望となる半導体素子の構造と製造法を提供す
る。
[Detailed Description of the Invention] (a) Purpose of the Invention The present invention relates to a diamond semiconductor, and utilizes diamond's characteristics such as high thermal conductivity, high carrier mobility, and specific resistance that can be controlled by the crystal state. We provide structures and manufacturing methods for semiconductor devices that are promising for microwave transmission, high-density integrated VLSI, and similar applications that can operate at high temperatures.

(ロ) 技術の背景 ICの高速化、小型化へのニーズがコンピユー
タや機器制御用マイクロプロセツサー等に対し急
速な高まりを見せている。そのため、半導体集積
回路の集積度アツプや各種ダイオード及びトラン
ジスターの小型薄肉化が必要となつて来た。特に
集積回路を例にとれば回路パターンの微細化と3
次元多層化が最も一般的な手段であるが、それに
対して回路の単位体積当りの発生熱が増大し、例
えば回路素子の強制冷却に一段の考慮を払う必要
が生ずる等の問題が、つきまとつて来る。この様
な熱の問題に対しては、低電力消費型回路の設計
とそれを達成する為の関連技術の確立も一つの対
応策であるがそれとても熱放散性が銅の1/3程度
(室温下)と低いSiを半導体材料として採用して
いる限りは対応策としては不充分である。即ち基
体でありしかも半導体素子であるSiを思い切つて
熱散線性の良い半導体材料で置換する事が必要と
なつている。また集積回路のみならず、高周波、
スイツチング用域は電力増巾用トランジスター、
発熱が大きいパワートランジスター、定電圧ダイ
オード、大電力用SCR用等の熱劣化対策として
高温に強い半導体の出現が待たれている。
(b) Technology background The need for faster and more compact ICs is rapidly increasing for computers and microprocessors used to control devices. Therefore, it has become necessary to increase the degree of integration of semiconductor integrated circuits and to make various diodes and transistors smaller and thinner. In particular, if we take integrated circuits as an example, the miniaturization of circuit patterns and the
Dimensional multilayering is the most common method, but there are problems with it, such as increased heat generation per unit volume of the circuit, and the need to take greater consideration into forced cooling of circuit elements. It comes. One way to deal with such heat problems is to design low-power consumption circuits and establish related technology to achieve them, but the heat dissipation properties of these circuits are only about 1/3 that of copper ( As long as Si, which has a low temperature (at room temperature), is used as a semiconductor material, it is insufficient as a countermeasure. In other words, it is necessary to boldly replace Si, which is the substrate and also the semiconductor element, with a semiconductor material that has good heat dissipation properties. In addition to integrated circuits, high frequency
The switching area is a power amplification transistor,
The emergence of high-temperature resistant semiconductors is awaited as a countermeasure against thermal deterioration in power transistors, voltage regulator diodes, high-power SCRs, etc., which generate a large amount of heat.

(ハ) 発明の開示 本発明は半導体Siに代えて、半導体ダイヤモン
ドを使用した、熱放散性が良好で、しかもキヤリ
ヤー移動度の大きい特長を生かした半導体素子の
構造と製造法を提供する。即ち本発明は、バイポ
ーラ及び電界効果型トランジスター更には各種ダ
イオードに使用されている半導体素子を構成する
基体となる基板を従来のSiよりも熱放散性の良好
なダイヤモンドとする事が第1の特徴である。勿
論価格の問題により、この基板をCBN焼結体
(BN粒子を超高圧下でMg化合から成るフラツク
ス中に固溶させると共に引続き析出させて同時に
焼結させて作成する立方晶BN多結晶体)とする
事も本発明の対象とする構造に含まれる。何とな
れば、この材料はSiに比べ熱方散性が良いばかり
でなく、簿膜集積回路の基板として用いる事を前
提とした場合基板上に、本発明の特徴であるダイ
ヤモンド半導体回路を気相合成により形成する上
でダイヤモンドに続いて好ましい材料の故であ
る。ダイヤモンドを基板として用いる場合は通
常、集積回路用域は極く一般のプレーナー型トラ
ンジスター用に於ても、その上にN型のダイヤモ
ンド層をエピタキシヤル成長させる。この様にエ
ピタキシヤル成長させたN型ダイヤモンド層に、
イオン注入法を利用しBを注入しP型の「島」を
形成する。この場合、絶縁膜の形成が必要とな
る。本発明に於ける第2の特徴は、上記の絶縁膜
を気相で合成蒸着させたダイヤモンドもしくはダ
イヤモンド質炭素膜にて形成る点にある。一般に
高真空(10-4Torr以下)で炭化水素ガスのみを
分解蒸着して得られるダイヤモンド又はダイヤモ
ンド質炭素膜は比抵抗が1012Ωcm以上であり極め
て良好な絶縁膜となる。本発明に於て集積回路や
一般のプレーナー型トランジスター回路の形成上
必要となるその他の製造技術には、選択フオトエ
ツチング電極蒸着等があるが、それは一般にSi半
導体の集積回路の製造で用いられている方法を踏
襲する事が可能である。本発明は、記述の通り簿
膜集積回路も、その対象に含める。更に半導体集
積回路と簿膜集積回路を組合わせた混成簿膜集積
回路もその対象に含まれる事は言う迄もない。特
に簿膜集積回路に於てはSiよりも熱放散性の良い
基板上に気相反応蒸着によりP型、P+型、N+
型などの半導体ダイヤモンド層、無添加型、(i
型)絶縁ダイヤモンド層、更にはTa、Al、Auも
しくは導電カーボンを蒸着して形成させる電極層
から成る薄膜が機能素子として利用される構造が
本発明の対象である。
(C) Disclosure of the Invention The present invention provides a structure and manufacturing method for a semiconductor element that uses semiconductor diamond instead of semiconductor Si and takes advantage of its characteristics of good heat dissipation and high carrier mobility. That is, the first feature of the present invention is that the substrate, which serves as the base for forming the semiconductor elements used in bipolar and field effect transistors as well as various diodes, is made of diamond, which has better heat dissipation than conventional Si. It is. Of course, due to cost issues, this substrate was replaced with a CBN sintered body (a cubic BN polycrystalline body created by dissolving BN particles in a flux consisting of an Mg compound under ultra-high pressure, followed by subsequent precipitation and sintering at the same time). This is also included in the structure targeted by the present invention. Not only does this material have better thermal dissipation than Si, but if it is intended to be used as a substrate for a film integrated circuit, a diamond semiconductor circuit, which is a feature of the present invention, can be formed in a vapor phase on the substrate. This is because it is the second most preferred material after diamond for synthetic formation. When diamond is used as a substrate, an N-type diamond layer is typically grown epitaxially thereon, even for planar transistors, which are very common in integrated circuit applications. In the N-type diamond layer epitaxially grown in this way,
B is implanted using an ion implantation method to form a P-type "island". In this case, it is necessary to form an insulating film. A second feature of the present invention is that the above-mentioned insulating film is formed of a diamond or diamond-like carbon film synthetically deposited in a vapor phase. Generally, a diamond or diamond-like carbon film obtained by decomposition vapor deposition of only hydrocarbon gas in a high vacuum (10 -4 Torr or less) has a resistivity of 10 12 Ωcm or more and is an extremely good insulating film. Other manufacturing techniques required for the formation of integrated circuits and general planar transistor circuits in the present invention include selective photoetching and electrode deposition, which are generally used in the manufacture of Si semiconductor integrated circuits. It is possible to follow the method. As described, the present invention also covers film integrated circuits. Furthermore, it goes without saying that the subject matter also includes a hybrid film integrated circuit that is a combination of a semiconductor integrated circuit and a film integrated circuit. In particular, in film integrated circuits, P-type, P+-type, N+
Semiconductor diamond layer such as type, additive-free type, (i
The object of the present invention is a structure in which a thin film consisting of an insulating diamond layer (type) and an electrode layer formed by vapor-depositing Ta, Al, Au, or conductive carbon is used as a functional element.

(ニ) 実施例 Bを0.1%添加したP型ダイヤモンドを超高圧
装置で作成し、これを基板としてC2H4とPH3
混合ガス中で高周波放電を行い3μmN型ダイヤ
モンド膜を形成した。この膜の表面をLEELS
(Low Energy Electron Loss Spectrometry)
で測定したところダイヤモンド特有のピークが確
認された。これに公知のイオンインプランテーシ
ヨン法でBを打ち込みP型の領域を作り、Al電
極及びC2H6の高周波分野で得られた絶縁膜を所
定領域に被覆してMIS型プレーナトランジスター
を形成した。本発明のMIS型プレーナトランジス
ターは高周波出力用増幅回路に用い100MHzの高
周波を15Vの電源で作動し、3.5Wの出力が得ら
れた。同一回路でシリコンとエピタシヤルプレー
ナ型トランジスターでは、2.2Wが限界であつた。
(D) Example A P-type diamond containing 0.1% B was prepared using an ultra-high pressure apparatus, and using this as a substrate, high-frequency discharge was carried out in a mixed gas of C 2 H 4 and PH 3 to form a 3 μm N-type diamond film. LEELS the surface of this membrane
(Low Energy Electron Loss Spectrometry)
When measured, a peak unique to diamond was confirmed. B is implanted into this using a well-known ion implantation method to create a P-type region, and a predetermined region is covered with an Al electrode and an insulating film obtained in the high frequency field of C 2 H 6 to form an MIS type planar transistor. did. The MIS type planar transistor of the present invention was used in a high frequency output amplifier circuit and operated at a high frequency of 100 MHz with a 15 V power supply, and an output of 3.5 W was obtained. The limit for silicon and epitaxial planar transistors in the same circuit was 2.2W.

Claims (1)

【特許請求の範囲】 1 MIS接合を利用した半導体に於て、p型半導
体部またはn型半導体部がダイヤモンドから成
り、絶縁部がダイヤモンドまたはダイヤモンド質
炭素膜から成りかつその基板が人工又は天然のダ
イヤモンド又は立方晶BN焼結体であることを特
徴とする気相合成によるダイヤモンド半導体。 2 人工又は天然のダイヤモンド又は立方晶BN
焼結体を基板とし、該基板上に炭素を含むガスを
原料として気相合成法により、ダイヤモンド層を
エピタキシヤル成長して、p型半導体部またはn
型半導体部を形成する工程、およびそのダイヤモ
ンド層の上に10-4Torr以下の真空中で炭化水素
ガスを分解してダイヤモンド又はダイヤモンド質
炭素膜からなる絶縁部を形成する工程を含むこと
を特徴とする、MIS接合を利用したダイヤモンド
半導体の製造方法。
[Claims] 1 In a semiconductor using MIS junction, the p-type semiconductor part or the n-type semiconductor part is made of diamond, the insulating part is made of diamond or a diamond-like carbon film, and the substrate is made of artificial or natural material. A diamond semiconductor produced by vapor phase synthesis, characterized by being a diamond or a cubic BN sintered body. 2 Artificial or natural diamond or cubic BN
Using the sintered body as a substrate, a diamond layer is epitaxially grown on the substrate by vapor phase synthesis using carbon-containing gas as a raw material to form a p-type semiconductor part or an n-type semiconductor part.
A process of forming a type semiconductor part, and a process of forming an insulating part made of diamond or a diamond-like carbon film on the diamond layer by decomposing hydrocarbon gas in a vacuum of 10 -4 Torr or less. A method for manufacturing diamond semiconductors using MIS bonding.
JP8439683A 1983-05-13 1983-05-13 Diamond semiconductor by gas phase combination and manufacture thereof Granted JPS59208821A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8439683A JPS59208821A (en) 1983-05-13 1983-05-13 Diamond semiconductor by gas phase combination and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8439683A JPS59208821A (en) 1983-05-13 1983-05-13 Diamond semiconductor by gas phase combination and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS59208821A JPS59208821A (en) 1984-11-27
JPH0526325B2 true JPH0526325B2 (en) 1993-04-15

Family

ID=13829410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8439683A Granted JPS59208821A (en) 1983-05-13 1983-05-13 Diamond semiconductor by gas phase combination and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS59208821A (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274268A (en) * 1987-04-01 1993-12-28 Semiconductor Energy Laboratory Co., Ltd. Electric circuit having superconducting layered structure
JP2614868B2 (en) * 1987-09-09 1997-05-28 導電性無機化合物技術研究組合 Manufacturing method of field effect transistor
JP2590161B2 (en) * 1987-12-15 1997-03-12 導電性無機化合物技術研究組合 Manufacturing method of MIS type field effect transistor
JP2671259B2 (en) * 1988-03-28 1997-10-29 住友電気工業株式会社 Schottky junction semiconductor device
GB8812216D0 (en) * 1988-05-24 1988-06-29 Jones B L Diamond transistor method of manufacture thereof
WO1990007796A1 (en) * 1989-01-03 1990-07-12 Massachusetts Institute Of Technology Insulator films on diamond
JP2695000B2 (en) * 1989-04-11 1997-12-24 住友電気工業株式会社 Thermistor and manufacturing method thereof
US5243199A (en) * 1990-01-19 1993-09-07 Sumitomo Electric Industries, Ltd. High frequency device
JP2730271B2 (en) * 1990-03-07 1998-03-25 住友電気工業株式会社 Semiconductor device
JP2961812B2 (en) * 1990-05-17 1999-10-12 住友電気工業株式会社 Semiconductor device
JP2836790B2 (en) * 1991-01-08 1998-12-14 株式会社神戸製鋼所 Ohmic electrode formation method on diamond thin film
EP0543392A3 (en) * 1991-11-21 1993-10-20 Canon Kk Diamond semiconductor device and method of producing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848428A (en) * 1981-09-17 1983-03-22 Semiconductor Energy Lab Co Ltd Compound material having carbon film and manufacture therefor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848428A (en) * 1981-09-17 1983-03-22 Semiconductor Energy Lab Co Ltd Compound material having carbon film and manufacture therefor

Also Published As

Publication number Publication date
JPS59208821A (en) 1984-11-27

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