JPH05259176A - Bipolar transistor - Google Patents

Abstract

PURPOSE:To improve a withstand voltage between a collector and a base together with frequency characteristics in a high frequency transistor having a graft base. CONSTITUTION:After an N<-> type epitaxial layer 2 is formed on an N<+> type semiconductor substrate 1, a P<+> type graft base region 3, a P-type base region 4 and an N<+> type emitter region 7 are formed on the layer 2, and the substrate is used as a collector in a transistor. The transistor has a recess 6 reaching the layer 2 through the substrate directly under a base, and the same conductivity type and high concentration N<+> type region 8 as that of the substrate on the substrate opposed to a collector region. Thus, even if an epitaxial thickness is increased, the collector region directly under the base is short, and hence a collector series resistance is not raised. Accordingly, fT is not reduced. A withstand voltage between the collector and the base can be raised without increasing an epitaxial specific resistance by an amount corresponding to the increase in the epitaxial thickness.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar transistor, and more particularly to a high frequency transistor having a graft base.

[0002]

2. Description of the Related Art FIG. 2 is a sectional view showing the structure of an example of a conventional high frequency transistor. In FIG. 2, an N ⁻ type epitaxial layer 2 is formed on an N ⁺ type semiconductor substrate 1, and a P ⁺ type graft base region 3, a P type base region 4 and an N ⁺ type epitaxial layer 2 are formed on the N ⁻ type epitaxial layer 2. An emitter region 7 is formed, a thermal oxide film 5, a base electrode 9 and an emitter electrode 10 are formed thereon, and a collector electrode 11 is formed on the lower surface of the N ⁺ type semiconductor substrate 1.

In such a high frequency transistor, the base region is made shallow in order to increase the cutoff frequency, and the base region is made high in concentration and deeper than the base in order to reduce the base spreading resistance (r _bb ′). Are formed on both sides of. Further, since the cutoff frequency decreases as the collector series resistance increases, a thin epitaxial layer in which a high frequency transistor is formed (hereinafter referred to as an epi thickness) is used.

[0004]

In the above-mentioned conventional high-frequency transistor, in order to increase the cutoff frequency, not only the graft base is formed and r _bb ′ is lowered, but also the epi thickness is made thin. However, reducing the epi thickness has the drawback of increasing the cost because the standards are going to be stricter in terms of manufacturing. Also, since the epi thickness is thin, the collector-base breakdown voltage (BV _CBO ) is increased. There has been a problem that the resistivity of the epitaxial layer must be increased, which increases collector capacitance and lowers the cutoff frequency.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems by providing a bipolar transistor which is a high frequency transistor having improved frequency characteristics and collector-base breakdown voltage.

[0006]

The present invention provides a bipolar transistor having an epitaxial layer formed on the upper surface of a semiconductor substrate and an emitter region, a base region and a graft base region formed on the surface of the epitaxial layer. A concave portion formed on the lower surface of the semiconductor substrate immediately below the base region so as to penetrate the semiconductor substrate and reach the inside of the epitaxial layer; and the concave portion formed on the lower surface of the semiconductor substrate including the surface of the concave portion. It is characterized in that it has a high impurity region of the same conductivity type as that of the semiconductor substrate and a collector electrode formed on the surface of this high impurity region.

[0007]

Since the recess formed on the lower surface of the semiconductor substrate reaches the inside of the epitaxial layer through the semiconductor substrate, the thickness of the epitaxial layer immediately below the base region is the distance from the lower surface of the base region to the recess. Therefore, even if the epi thickness is increased, the collector region is shortened, and since the collector series resistance does not increase due to the high impurity region, the cutoff frequency does not decrease.

Further, since the epi thickness is increased, the collector-base breakdown voltage can be increased without increasing the specific resistance of the epitaxial layer.

This makes it possible to increase the collector-base breakdown voltage as well as the high frequency characteristics of the transistor.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing an NPN transistor according to an embodiment of the present invention.

In this embodiment, an N ⁻ type epitaxial layer 2 formed on the upper surface of an N ⁺ type semiconductor substrate 1, an N ⁺ type emitter region 7 formed on the surface of the epitaxial layer 2,
In NPN transistor having a P-type base region 4 and the P ⁺ -type graft base region 3, at which the feature of the present invention, N ⁺ -type semiconductor on the lower surface of the N ⁺ -type semiconductor substrate 1 immediately below the P-type base region 4 A recess 6 formed so as to penetrate the substrate 1 and reach the inside of the N ⁻ type epitaxial layer 2.
And an N ⁺ type region 8 formed on the lower surface of the N ⁺ type semiconductor substrate 1 including the surface of the recess 6, and a collector electrode 11 formed on the surface of the N ⁺ type region 8.

Next, an outline of the manufacturing method of this embodiment will be described.

First, 10 ¹⁵ cm ^{−3 is formed on the} N ⁺ type semiconductor substrate 1.
And the N ⁻ type epitaxial layer 2 of 8 to 10 μm is formed.
Further, the P ⁺ -type graft base region 3 is formed on the surface of the epitaxial layer 2 so as to be laterally spaced from each other by diffusing ¹¹ B ⁺ into BCl ₃ . Furthermore, shallower than P ⁺ -type graft base region 3 by ion implantation ⁺ a P-type base region 4, for example ¹¹ B so as to extend over the two islands spaced P ⁺ -type graft base region 3 inside the and each other, and a low concentration To be formed. Next, the thermal oxide film 5 is set to 1 μm.
The degree N ⁺ -type semiconductor substrate 1 and the N ^- -type epitaxial layer formed on the second surface, at the same time N ⁺ -type well to form an oxide film on the back surface of the semiconductor substrate 1 N ⁺ -type semiconductor substrate 1 rear surface of the oxide film immediately below the base Selective etching is performed to penetrate the N ⁺ type semiconductor substrate 1 and further perform silicon etching to reach the inside of the N ⁻ type epitaxial layer 2 to form a recess 6. next,
Thermal oxide film 5 in the emitter region inside the P-type base region 4
Is selectively removed by etching, and the thermal oxide film on the back surface of the N ⁻ type epitaxial layer 2 is etched to remove PoCl.
_{By 3} diffusion, the N ⁺ type emitter region 7 is inside the P type base region 4, and the N ⁺ type region 8 is the N ⁺ type semiconductor substrate 1.
Is formed on the back surface and the surface of the recess 6. Next, the thermal oxide film 5 in the contact opening region is etched in the N ⁺ type emitter region 7 and the P ⁺ type graft base region 3 to form the base electrode 9 and the emitter electrode 10, and the N ⁺ type semiconductor substrate 1 is further formed. Ni, Ag, Pt, etc. are vapor-deposited on the back surface to form the collector electrode 11. In this way, the NPN transistor of the embodiment of the present invention is manufactured.

[0015]

As described above, according to the present invention, a substrate is provided on the back surface of the semiconductor substrate which has a recess which penetrates the semiconductor substrate directly below the base and reaches the inside of the epitaxial layer, and which faces the collector region. Since it has the same conductivity type and high-concentration layer, the collector region directly under the base can be shortened even if the epi thickness is increased, so that the collector series resistance does not increase and the cutoff frequency does not decrease. . Further, as the epi thickness increases, there is an effect that the collector-base breakdown voltage (BV _CBO ) can be increased without increasing the epi specific resistance. Furthermore, since it is not necessary to use a thin epi layer as in the conventional case, the epitaxial layer can be easily formed and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view of an NPN transistor according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a conventional NPN transistor.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 N ⁺ type semiconductor substrate 2 N ⁻ type epitaxial layer 3 P ⁺ type graft base region 4 P type base region 5 thermal oxide film 6 recess 7 N ⁺ type emitter region 8 N ⁺ type region 9 base electrode 10 emitter electrode 11 collector electrode

Claims (1)

[Claims] 1. A bipolar transistor having an epitaxial layer formed on the upper surface of a semiconductor substrate, and an emitter region, a base region and a graft base region formed on the surface of the epitaxial layer, wherein the bipolar transistor is provided directly below the base region. A recess formed on the lower surface of the semiconductor substrate so as to penetrate the semiconductor substrate and reach the inside of the epitaxial layer, and a high-conductivity type same as the semiconductor substrate formed on the lower surface of the semiconductor substrate including the surface of the recess. A bipolar transistor having an impurity region and a collector electrode formed on the surface of the high impurity region.