JPH05252668A - Power converter - Google Patents

Power converter

Info

Publication number
JPH05252668A
JPH05252668A JP4048986A JP4898692A JPH05252668A JP H05252668 A JPH05252668 A JP H05252668A JP 4048986 A JP4048986 A JP 4048986A JP 4898692 A JP4898692 A JP 4898692A JP H05252668 A JPH05252668 A JP H05252668A
Authority
JP
Japan
Prior art keywords
output
power
voltage
harmonic
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4048986A
Other languages
Japanese (ja)
Inventor
Yoshiaki Miyazawa
芳明 宮澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4048986A priority Critical patent/JPH05252668A/en
Publication of JPH05252668A publication Critical patent/JPH05252668A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve voltage waveform of parallel output bus by optimally controlling a power converter based on the parameter for controlling the output voltage or the phase of each order higher harmonic. CONSTITUTION:When basic wave output voltage or basic wave output phase fluctuates, a basic wave control parameter operating unit 121 detects fluctuated output current and operates parameters, e.g. basic wave voltage, basic wave phase, impedance, of a system based on a plurality of detected data and produces estimated parameter data. An reference output controller 122 determines optimal control data for basic wave output voltage and basic wave output phase based on the system parameter estimation data operated by the basic wave control parameter operating unit 121 and then controls a power conveter 2 optimally based on thus determined data. According to the constitution, power converters 2 having different capacity and different constitution can be linked and the voltage waveform of parallel output bus can be improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、商用電源等の第1の電
源または蓄電池や燃料電池等をエネルギ源とする第2の
電源を入力として安定な交流電力を負荷へ供給する電力
変換装置に係り、特に複数台の電力変換装置の出力を容
量増大又は冗長化のために相互に連系するように構成し
た電力変換装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter for supplying stable AC power to a load by inputting a first power source such as a commercial power source or a second power source having a storage battery, a fuel cell or the like as an energy source. In particular, the present invention relates to a power conversion device configured so that outputs of a plurality of power conversion devices are interconnected for capacity increase or redundancy.

【0002】[0002]

【従来の技術】コンピュ―タ等の重要負荷システムの電
源として、交流入力電源の停電時或いは交流入力系統の
瞬時電圧低下時でも蓄電池を電源として安定な交流電力
を供給する電力変換装置は、無停電電源装置(以下、U
PSと記す)として広く使われるようになってきてい
る。特に近年のオンライン通信ネットワ―クを初とした
システムの大規模化に伴ない容量増大と給電信頼性向上
のためにUPSを並列運転するシステムも用いられてい
る。図3は、従来この種のUPSの一例を示すブロック
図である。
2. Description of the Related Art As a power supply for an important load system such as a computer, there is no power conversion device that supplies stable AC power using a storage battery as a power supply even when the AC input power supply is interrupted or when the AC input system has a momentary voltage drop. Blackout power supply (hereinafter U
It is becoming widely used as PS). In particular, a system in which UPSs are operated in parallel is used to increase the capacity and improve the reliability of power supply with the increase in the scale of the system, which is the first of the recent online communication networks. FIG. 3 is a block diagram showing an example of a conventional UPS of this type.

【0003】同図において、10は交流入力電源、1a
と1bは各出力が並列に接続されたUPS、12は負
荷、13は並列出力母線である。UPS1aと1bの内
部構成は全く同一であり、aとbの添字を付して区別し
ており、その主回路はコンバ―タ11a,11b、蓄電
池12a,12b、インバ―タ13a,13b、交流フ
ィルタ14a,14bで構成される。
In the figure, 10 is an AC input power source, 1a
1b is a UPS in which outputs are connected in parallel, 12 is a load, and 13 is a parallel output busbar. The UPSs 1a and 1b have the same internal configuration and are distinguished by adding subscripts a and b. The main circuits of the UPS 1a and 1b are converters 11a and 11b, storage batteries 12a and 12b, inverters 13a and 13b, AC filters. It is composed of 14a and 14b.

【0004】UPS1a,1bの主回路構成は公知のも
のであるが、交流入力電源10の電力をコンバ―タ11
a,11bで直流電力へ変換し、インバ―タ13a,1
3bで再び交流電力に変換し、更に、交流フィルタ14
a,14bで出力電圧波形を正弦波形に改善し、負荷1
2へ給電する。蓄電池12a,12bは通常コンバ―タ
11a,11bで充電されており、交流入力電源10が
停電した際に蓄電池12a,12bの直流電力をインバ
―タ13a,13bに供給することにより、UPS1
a,1bは無停電で給電を継続する。
Although the main circuit configuration of the UPS 1a, 1b is well known, the power of the AC input power source 10 is converted into the converter 11.
a, 11b convert to DC power, and inverters 13a, 1
3b converts into AC power again, and the AC filter 14
The output voltage waveform is improved to a sine waveform with a and 14b, and load 1
Power to 2. The storage batteries 12a and 12b are normally charged by the converters 11a and 11b, and when the AC input power source 10 has a power failure, the DC power of the storage batteries 12a and 12b is supplied to the inverters 13a and 13b, so that the UPS 1
Power supply to a and 1b continues uninterrupted.

【0005】並列出力母線13を介して並列接続された
UPS1a,1bの並列運転の目的は、システム容量を
UPS1aと1bの出力容量の和とする出力容量増加ま
たはUPS1a,1bのうち1台分を予備容量として給
電信頼性向上を図る冗長化のためである。
The purpose of parallel operation of the UPS 1a, 1b connected in parallel via the parallel output bus bar 13 is to increase the output capacity by making the system capacity the sum of the output capacities of the UPS 1a and 1b, or for one of the UPS 1a, 1b. This is for the purpose of redundancy for improving the reliability of power supply as a reserve capacity.

【0006】この並列運転は、制御回路を構成する11
0a〜119a,110b〜119bにより以下のよう
に制御される。即ち、CT111a,111bによって
検出される各UPSの出力電流の偏差ΔIと出力電圧か
ら有効電力検出器119a,119bにより有効電力偏
差ΔPを、無効電力検出器110a,110bにより無
効電力偏差ΔQを検出する。有効電力偏差ΔPにより、
発振器117a,117bを基準とする位相同期制御回
路118a,118bへの位相補正を行い、無効電力偏
差ΔQにより出力電圧を制御する電圧制御器115a,
115b(インバ―タ出力波形歪みを低減するようにパ
ルス幅変調機能を有する)の発生するインバ―タ13
a,13bの駆動信号を制御することにより、並列運転
制御を行う。この並列運転制御の動作原理は、例えば特
許第1215332号「インバ―タの並列運転装置」等
によって周知の技術であるので、その詳細説明は省略す
る。
This parallel operation constitutes a control circuit 11
It is controlled as follows by 0a to 119a and 110b to 119b. That is, the active power detectors 119a and 119b detect the active power deviation ΔP and the reactive power detectors 110a and 110b detect the reactive power deviation ΔQ from the output current deviation ΔI and the output voltage of each UPS detected by the CTs 111a and 111b. .. By the active power deviation ΔP,
A voltage controller 115a for performing phase correction on the phase synchronization control circuits 118a, 118b with the oscillators 117a, 117b as a reference and controlling the output voltage by the reactive power deviation ΔQ,
115b (having a pulse width modulation function so as to reduce the output waveform distortion of the inverter)
Parallel operation control is performed by controlling the drive signals of a and 13b. The operation principle of this parallel operation control is a well-known technique, for example, in Japanese Patent No. 1215332 “Inverter parallel operation device”, and therefore its detailed description is omitted.

【0007】図3の如きUPSの並列運転システムにお
いては、図3に図示されるように並列バランスの補正制
御のための装置間の信号の授受が必要であり、UPS1
aと1bが同一の容量、同一の構成、同一の制御機能で
あることも必要であった。
In the UPS parallel operation system as shown in FIG. 3, it is necessary to send and receive signals between devices for parallel balance correction control as shown in FIG.
It was also necessary that a and 1b had the same capacity, the same configuration, and the same control function.

【0008】[0008]

【発明が解決しようとする課題】図3の例を基に従来技
術による電力変換装置の並列運転システムの技術課題を
整理すると次ようようになる。 (1) 各電力変換装置は相互に並列運転のための制御信号
の授受が必要であり、本当の意味での装置単位での独立
制御の構成とすることができない。 (2) 各電力変換装置の出力は、電力分担が均等になるよ
うに制御され並列運転は同一定格で同一特性の電力変換
装置に限定されていた。
The technical problems of the parallel operation system for the power converter according to the prior art will be summarized as follows based on the example of FIG. (1) Each power conversion device needs to exchange control signals for parallel operation with each other, and it cannot be configured as an independent control in the true sense of the device unit. (2) The output of each power converter was controlled so that the power distribution was even, and parallel operation was limited to power converters with the same rating and characteristics.

【0009】(3) 負荷となるコンピ―タシステムの増設
に対応した電源容量増加のための電力変換装置の増設に
関し、上記(2) 項より当初の計画段階より予備容量を正
確に見込んだ設備計画を立てない限りフレキシブルな対
応が困難であることや、前記(1) 項より制御信号の授受
が必要であるためオンライン給電での増設工事のリスク
があることより増設工事に対する時期や時間の制約があ
った。
(3) Regarding the expansion of the power conversion device to increase the power supply capacity corresponding to the expansion of the load computer system, from the above (2) the equipment plan that accurately estimates the spare capacity from the initial planning stage. If it is not possible to do so, it is difficult to respond flexibly, and since there is a risk of extension work with online power supply because it is necessary to send and receive control signals from the above (1), there are restrictions on the time and time for extension work. there were.

【0010】(4) 既設電力変換装置の出力電圧高調波歪
み補正性能が低いことにより並列出力母線電圧の波形歪
みが多い場合でも新設電力変換装置の特性を既設装置に
合せる必要があるため、最新制御技術による高性能の装
置を並列運転することができず、並列出力母線電圧波形
歪みを改善するには、別に高調波吸収用のフィルタを設
置する必要があった。(最近のコンピュ―タ、通信機器
の大半は、高調波電流を発生する整流器負荷であるた
め、これに対応した電力変換装置の出力電圧の低歪み化
の要求も高まっている。)
(4) Even if the waveform distortion of the parallel output bus voltage is large due to the low output voltage harmonic distortion correction performance of the existing power converter, it is necessary to match the characteristics of the new power converter with that of the existing power converter. High-performance devices cannot be operated in parallel due to the control technology, and in order to improve the parallel output bus voltage waveform distortion, it was necessary to install a filter for absorbing harmonics. (Most of the recent computers and communication devices are rectifier loads that generate harmonic currents, so there is an increasing demand for low distortion of the output voltage of power converters that support this.)

【0011】本発明は、以上の点に鑑みなされたもので
あって、電力変換装置の出力を電源容量増大または冗長
のために相互に連系するシステムにおいて、装置間の相
互の制御信号の授受がなく、異容量、異構成の電力変換
装置の連系を可能にすると共に、並列出力母線電圧の波
形歪みの改善も可能にした高性能でフレキシブルな電力
変換装置を提供することを目的とする。
The present invention has been made in view of the above points, and in a system in which the outputs of power conversion devices are interconnected for increasing power supply capacity or for redundancy, exchange of control signals between devices is performed. It is an object of the present invention to provide a high-performance and flexible power conversion device that enables interconnection of power conversion devices having different capacities and different configurations, and that can also improve waveform distortion of parallel output bus voltage. ..

【0012】[0012]

【課題を解決するための手段】本発明は、上記の目的を
達成するために、電力変換装置の基本波出力電圧または
基本波出力位相を変化させた時の基本波出力電流の変化
から電力変換装置の定格に応じた出力電力分担とする制
御パタ―ンを求めて電力変換装置の基本波出力電圧、基
本波出力位相を最適制御する手段と、電力変換装置の各
次高調波出力電圧、または各次高調波出力位相を変化さ
せた時の並列出力母線電圧の波形歪みの各次高調波成分
ごとの変化から並列出力母線電圧の波形歪み改善のため
の各次高調波出力電圧または各次高調波出力位相の制御
パラメ―タを求めて最適制御する手段を、電力変換装置
の制御部に設けたものである。
SUMMARY OF THE INVENTION In order to achieve the above object, the present invention performs power conversion from a change in the fundamental wave output current when the fundamental wave output voltage or the fundamental wave output phase of the power converter is changed. A means for optimally controlling the fundamental wave output voltage and fundamental wave output phase of the power converter by obtaining a control pattern that shares the output power according to the rating of the equipment, and each harmonic output voltage of the power converter, or Each harmonic output voltage or each harmonic for improving the waveform distortion of the parallel output bus voltage from the change of each harmonic component of the waveform distortion of the parallel output bus voltage when the output phase of each harmonic is changed. The control unit of the power converter is provided with means for optimally controlling the wave output phase control parameters.

【0013】[0013]

【作用】このような構成の電力変換装置にあっては、基
本波出力を制御するための最適制御パラメ―タは基本波
出力電圧、基本波出力位相を変化させた時の基本波出力
電流の変化のデ―タから推定され、高調波出力を制御す
るための最適制御パラメ―タは、高調波出力電圧、高調
波出力位相を変化させた時の並列出力母線電圧の各次高
調波成分の変化のデ―タから推定され、常に出力電力分
担と並列出力母線電圧の波形歪み改善の最適制御状態を
学習しながら制御動作を行うようにしている。
In the power converter having such a configuration, the optimum control parameters for controlling the fundamental wave output are the fundamental wave output voltage and the fundamental wave output current when the fundamental wave output phase is changed. The optimum control parameter for controlling the harmonic output, which is estimated from the change data, is the harmonic output voltage and each harmonic component of the parallel output bus voltage when the harmonic output phase is changed. The control operation is performed while learning the optimum control state, which is estimated from the change data, and the output power sharing and the waveform distortion improvement of the parallel output bus voltage are always learned.

【0014】[0014]

【実施例】以下本発明の一実施例を図1を参照して説明
する。図1において、図3と同一番号を付した構成要素
は図3と同一機能のものであり、その説明は省略する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, the components denoted by the same reference numerals as those in FIG. 3 have the same functions as those in FIG. 3, and the description thereof will be omitted.

【0015】図1において、2は図3の1a,1bに対
応する電力変換装置としてのUPS、21はインバ―
タ、13aを並列出力母線13に連系するための連系イ
ンピ―ダンス、(図3の構成の14aと14bと同様な
構成としてもよい)、121は基本波制御パラメ―タ演
算器、122は基本波出力基準制御器、123は並列出
力母線電圧の各次高調波成分を検出する高調波成分検出
器、124は高調波制御パラメ―タ演算器、125は高
調波出力基準制御器である。次に、上記のように構成さ
れた本発明の実施例の動作について説明する。
In FIG. 1, 2 is a UPS as a power conversion device corresponding to 1a and 1b of FIG. 3, and 21 is an inverter.
, 13a is an interconnection impedance for connecting the parallel output bus 13 to the parallel output busbar 13 (may have a configuration similar to that of 14a and 14b in FIG. 3), 121 is a fundamental wave control parameter calculator, 122 Is a fundamental wave output reference controller, 123 is a harmonic component detector that detects each harmonic component of the parallel output bus voltage, 124 is a harmonic control parameter calculator, and 125 is a harmonic output reference controller. .. Next, the operation of the embodiment of the present invention configured as described above will be described.

【0016】基本波制御パラメ―タ演算器121は基本
波出力基準器122から電圧制御器116a,位相同期
制御器118aへ与えた基本波出力電圧、基本波出力位
相の変化の指令に基づいて基本波出力電圧、基本波出力
位相が変化した際に、変動する出力電流を検出し、変化
の指令を変えてこれを繰り返しながら検出された複数の
デ―タに基づき系統の基本波電圧、基本波位相、インピ
―ダンス等のパラメ―タを演算して推定する。
The fundamental wave control parameter calculator 121 is based on the fundamental wave output voltage and the fundamental wave output phase change command given from the fundamental wave output reference device 122 to the voltage controller 116a and the phase synchronization controller 118a. Wave output voltage, fundamental wave When the output phase changes, the output current that fluctuates is detected, the command of change is changed, and this is repeated while repeating this, and the fundamental wave voltage and fundamental wave of the system are detected. Parameters such as phase and impedance are calculated and estimated.

【0017】出力基準制御器122はこの基本波制御パ
ラメ―タ演算器121によって演算された系統パラメ―
タ推定デ―タから、基本波出力電圧、基本波出力位相の
最適制御デ―タを求め、このデ―タを電圧制御器116
a、位相同期制御器118aに基本波制御の基準として
与える。
The output reference controller 122 is a system parameter calculated by the fundamental wave control parameter calculator 121.
The optimum control data of the fundamental wave output voltage and the fundamental wave output phase is obtained from the data estimation data, and this data is calculated by the voltage controller 116.
a as a reference for fundamental wave control to the phase synchronization controller 118a.

【0018】例えば、系統の未知のパラメ―タが無負荷
端子電圧ex ,インピ―ダンスX,負荷電流IL の3つ
とすれば、基準を変えて基本波出力電圧ek1,ek2,e
k3の3種に変化させた際の基本波出力電流のデ―タの変
化をIk1,Ik2,Ik3をとれば、下記の関係式を解くこ
とにより、推定パラメ―タが演算できる。通常系統の容
量はインピ―ダンスに関係したものであるから、系統の
インピ―ダンスと負荷容量をこの手法で求めればUPS
2の出力電力分担を決めることができる。 (ek1−ex )/(K+X)=Ik1−IL (ek2−ex )/(K+X)=Ik2−IL (ek3−ex )/(K+X)=Ik3−IL 但し、Kは連系インピ―ダンス21 次に高調波の最適制御動作について述べる。図1の実施
例の高調波の最適制御動作のアルゴリズムを説明するた
めに、図2に高調波制御のフロ―チャ―トを示す。
For example, if the unknown parameters of the system are three, that is, the no-load terminal voltage ex, the impedance X, and the load current IL, the fundamental wave output voltages ek1, ek2, e are changed by changing the reference.
Estimating parameters can be calculated by solving the following relational expressions by taking Ik1, Ik2, and Ik3 of changes in the fundamental wave output current data when changing to three kinds of k3. Normally, the capacity of the system is related to impedance, so if the impedance and load capacity of the system are obtained by this method, UPS
The output power sharing of 2 can be determined. (Ek1−ex) / (K + X) = Ik1−IL (ek2−ex) / (K + X) = Ik2−IL (ek3−ex) / (K + X) = Ik3−IL where K is the interconnection impedance 21 The optimum control operation of harmonics is described in. In order to explain the algorithm of the optimum control operation of the harmonics in the embodiment of FIG. 1, a flowchart of the harmonics control is shown in FIG.

【0019】まず、並列出力母線電圧の各次高調波成分
を高調波成分検出器123により分析し、分析結果に基
づき最も成分の多いn次調波から制御動作をスタ―トす
る。高調波出力基準制御器125からPWM制御器11
5aへn次調波の出力位相を変化させる指令(例えば進
める指令)を与え、これに基づきPWM制御器115a
内の正弦波基準波形が補正されn次調波出力位相が変化
した結果、並列出力母線電圧のn次調波成分がどう変化
するかを検出し、高調波制御パラメ―タ演算器124に
よりn次調波位相基準を次にどう変化すべきか推定す
る。(出力位相を進めてn次調波成分が減れば、さらに
進めた方が良いとの推定をする)この動作を繰り返し並
列出力母線電圧のn次調波低減の為の最適位相基準を推
定し、次にn次調波電圧についての制御動作に移る。n
次調波電圧についても同様に、高調波出力基準制御器1
25からPWM制御器115aへ出力電圧を変化させる
指令(例えば上げる指令)を与え、これにより並列出力
母線電圧のn次調波成分がどう変化するかを検出しなが
ら高調波制御パラメ―タ演算器124でn次調波電圧基
準の変化の方向を推定する。(出力電圧を上げてn次調
波成分が減れば、さらに上げた方が良いと推定する)こ
の動作を繰り返しn次調波低減の改善の限界とインバ―
タ13aの出力電流許容限界等の条件からn次調波の最
適電圧基準を推定する。以下、同様にして異る次数の高
調波成分につていも最適位相基準→最適電圧基準を順次
推定し、この動作を所定の周期で行うことにより、系統
のパラメ―タの変化にも常に追従した最適制御で並列出
力母線電圧の波形歪みを改善することできる。
First, each harmonic component of the parallel output bus voltage is analyzed by the harmonic component detector 123, and the control operation is started from the nth harmonic having the largest component based on the analysis result. From the harmonic output reference controller 125 to the PWM controller 11
A command (for example, a command to advance) for changing the output phase of the nth harmonic is given to 5a, and the PWM controller 115a is based on this command.
As a result of the correction of the sine wave reference waveform in the inside and the change of the n-th harmonic output phase, it is detected how the n-th harmonic component of the parallel output bus voltage changes, and the harmonic control parameter calculator 124 Estimate how the next harmonic phase reference should change next. (If the output phase is advanced to reduce the nth harmonic component, it is estimated that it is better to proceed further.) Repeat this operation to estimate the optimum phase reference for reducing the nth harmonic of the parallel output bus voltage. Then, the control operation for the nth harmonic voltage is performed. n
Similarly for the next harmonic voltage, the harmonic output reference controller 1
A command to change the output voltage (for example, a command to increase) is given from 25 to the PWM controller 115a, and the harmonic control parameter calculator is detected while detecting how the nth harmonic component of the parallel output bus voltage changes. At 124, the direction of change of the nth harmonic voltage reference is estimated. (If the output voltage is increased and the n-th harmonic component is reduced, it is better to increase it further.) This operation is repeated.
The optimum voltage reference for the nth harmonic is estimated from the conditions such as the output current allowable limit of the switch 13a. Similarly, even for harmonic components of different orders, the optimum phase reference → the optimum voltage reference are sequentially estimated, and this operation is performed at a specified cycle to always follow the changes in the system parameters. The optimum control can improve the waveform distortion of the parallel output bus voltage.

【0020】このようにして、本実施例では、系統パラ
メ―タを学習しながら基本波出力電圧、基本波出力位相
を制御すると共に並列出力母線電圧の波形歪みを低減す
るように高調波出力電圧、高調波出力位相の最適制御パ
ラメ―タを学習して制御することにより、異容量、異構
成の電力変換装置の並列連系を可能とすると共に、既設
装置の出力高調波歪み補正性能が低いケ―スにおいても
並列出力母線電圧の波形歪みの改善を容易に行うことが
できる。
In this way, in this embodiment, the harmonic output voltage is controlled so as to control the fundamental wave output voltage and the fundamental wave output phase while learning the system parameters and reduce the waveform distortion of the parallel output bus voltage. , By learning and controlling the optimum control parameter of the harmonic output phase, it is possible to connect power converters of different capacities and different configurations in parallel, and the output harmonic distortion correction performance of existing equipment is low. Even in the case, the waveform distortion of the parallel output bus voltage can be easily improved.

【0021】尚、図1の実施例においては、UPSを引
用して説明したが、UPSに限定せず他の電力変換装置
であっても良い。又、コンバ―タとインバ―タの組合せ
に限定することなく、回路構成や方式は他のタイプの電
力変換装置であっても良い。更に、第2の電源である蓄
電池は、他のエネルギ源、例えば燃料電池等でもよい。
In the embodiment of FIG. 1, the UPS is cited and described, but the power converter is not limited to the UPS and may be another power converter. Further, the circuit configuration and method may be other types of power conversion devices without being limited to the combination of the converter and the inverter. Further, the storage battery, which is the second power source, may be another energy source such as a fuel cell.

【0022】[0022]

【発明の効果】以上説明のように、本発明によれば、電
力変換装置の出力を電源容量増大又は冗長化のために相
互に連系するシステムにおいて、装置間の相互の制御信
号の授受がなく、異容量、異構成の電力変換装置の連系
を可能にすると共に、出力並列母線電圧の波形歪みの改
善も可能にした高性能でフレキシブルな電力変換装置を
提供することができる。
As described above, according to the present invention, in a system in which the outputs of power converters are interconnected for increasing power supply capacity or for redundancy, mutual exchange of control signals between devices is possible. In addition, it is possible to provide a high-performance and flexible power conversion device that enables interconnection of power conversion devices having different capacities and different configurations and that can also improve waveform distortion of the output parallel bus voltage.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示すブロック図。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】[図1]の実施例の高調波の最適制御アルゴリ
ズムを説明するためのフロ―チャ―ト。
FIG. 2 is a flowchart for explaining an optimal control algorithm for harmonics in the embodiment shown in FIG.

【図3】従来の電力変換装置の並列運転シスイムの構成
例を示すブロック図。
FIG. 3 is a block diagram showing a configuration example of a parallel operation system of a conventional power conversion device.

【符号の説明】[Explanation of symbols]

1a,1b …UPS 2 …UPS 10 …交流入力電源 11a,11b …コンバ―タ 12 …負荷 12a,12b …蓄電池 13 …並列出力母線 13a,13b …インバ―タ 14a,14b …交流フィルタ 110a,110b…無効電力検出器 111a,111b…CT 115a,115b…PWM制御器 116a,116b…電圧制御器 117a,117b…発振器 118a,118b…位相同期制御器 119a,119b…有効電力検出器 21 …連系インピ―ダンス 121 …基本波制御パラメ―タ演算器 122 …基本波出力基準制御器 123 …高調波成分検出器 124 …高調波制御パラメ―タ演算器 125 …高調波出力基準制御器 1a, 1b ... UPS 2 ... UPS 10 ... AC input power supply 11a, 11b ... Converter 12 ... Load 12a, 12b ... Storage battery 13 ... Parallel output busbars 13a, 13b ... Inverter 14a, 14b ... AC filter 110a, 110b ... Reactive power detector 111a, 111b ... CT 115a, 115b ... PWM controller 116a, 116b ... Voltage controller 117a, 117b ... Oscillator 118a, 118b ... Phase synchronization controller 119a, 119b ... Active power detector 21 ... Interconnection impedance Dance 121 ... Fundamental wave control parameter calculator 122 ... Fundamental wave output reference controller 123 ... Harmonic component detector 124 ... Harmonic control parameter calculator 125 ... Harmonic output reference controller

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 商用電源等の第1の電源、又は、蓄
電池や燃料電池等をエネルギ源とする第2の電源を入力
として安定な交流電力を負荷へ供給する電力変換装置に
おいて、複数台の電力変換装置の出力を電源容量増大又
は冗長化のために相互に並列出力母線に連系するように
構成し、該電力変換装置の基本波出力電圧又は基本波出
力位相を変化させた時の基本波出力電流の変化に応じて
電力変換装置の基本波出力電圧、基本波出力位相を制御
する手段と、該電力変換装置の各次高調波出力電圧又は
各次高調波出力位相を変化させた時の前記並列出力母線
電圧の各次高調波成分の変化から前記並列出力母線電圧
の波形歪みを改善するために各次高調波出力電圧又は各
次高調波出力位相の制御パラメ―タを推定しする手段
と、この推定された制御パラメ―タに応じて前記電力変
換装置を制御する手段を具備した電力変換装置。
1. A power converter for supplying a stable AC power to a load by inputting a first power supply such as a commercial power supply or a second power supply using a storage battery, a fuel cell or the like as an energy source. The output of the power conversion device is configured to be interconnected with parallel output buses for increasing power supply capacity or redundancy, and the fundamental when the fundamental wave output voltage or the fundamental wave output phase of the power conversion device is changed Means for controlling the fundamental wave output voltage and the fundamental wave output phase of the power converter according to the change of the wave output current, and when changing each harmonic output voltage or each harmonic output phase of the power converter Estimating the control parameter of each harmonic output voltage or each harmonic output phase in order to improve the waveform distortion of the parallel output bus voltage from the change of each harmonic component of the parallel output bus voltage of Means and this estimated control pattern A power conversion device comprising means for controlling the power conversion device according to a lamella.
JP4048986A 1992-03-06 1992-03-06 Power converter Pending JPH05252668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4048986A JPH05252668A (en) 1992-03-06 1992-03-06 Power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4048986A JPH05252668A (en) 1992-03-06 1992-03-06 Power converter

Publications (1)

Publication Number Publication Date
JPH05252668A true JPH05252668A (en) 1993-09-28

Family

ID=12818562

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4048986A Pending JPH05252668A (en) 1992-03-06 1992-03-06 Power converter

Country Status (1)

Country Link
JP (1) JPH05252668A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013192330A (en) * 2012-03-13 2013-09-26 Toshiba Mitsubishi-Electric Industrial System Corp Uninterruptible power-supply system
JP2017070186A (en) * 2015-09-29 2017-04-06 株式会社日立製作所 Harmonic erasure unit and method of harmonic erasure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013192330A (en) * 2012-03-13 2013-09-26 Toshiba Mitsubishi-Electric Industrial System Corp Uninterruptible power-supply system
JP2017070186A (en) * 2015-09-29 2017-04-06 株式会社日立製作所 Harmonic erasure unit and method of harmonic erasure

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