JPH05241552A - Digital rgb interface for color lcd - Google Patents

Abstract

PURPOSE:To provide a digital RGB interface for connecting a color LCD displaying a high definition image. CONSTITUTION:This interface consists of a frame buffer memory 1, a cursor generator 2, a color palette 3, a color palette for a cursor 4 and a synthesizer circuit 5, and the frame buffer memory 1 outputs color code data according to display resolution. The cursor generator 2 generates cursol data and outputs a generative signal. The color palette 3 outputs RGB data according to a color code. The color palette 4 for the cursor outputs cursol RGB data selected by the cursor generative signal. The synthesizer circuit 5 synthesizes the cursor data to image data from the color palette and outputs it to the color LCD as digital RGB.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color LCD interface circuit in a workstation.

[0002]

2. Description of the Related Art Conventionally, a CRT is generally used as a display device of a workstation. As shown in FIG. 6, the structure of the CRT display interface is such that the frame buffer memory 1 having a capacity corresponding to the display resolution and the graphic cursor are set to the frame buffer memory data 50, 51 and 5.
Cursor generator 2 for overlay display on 2,53
And L that can be assigned any 2 ^N color among 2 ^M colors
It is composed of a UT (look-up table) and an LSI 22 having a digital / analog conversion circuit. Now, a case where M = 24 and N = 8 will be described as an example. The frame buffer memory 1 has data of a capacity corresponding to the display resolution for 8 planes. Color code data 50, 51, 5 from the frame buffer memory 1
2 and 53 and cursor generation signals 54, 55, 56 and 57 from the cursor generator 2 select 2 ⁸ color data from the LUT for 2 ²⁴ colors inside the LSI 22 to generate analog RGB signals 92, 93 and 94. Convert and CRT
Supply to.

[0003]

Although recent workstations have made it possible to display images with higher resolution, there is only a CRT having an analog RGB interface as a display device. In recent years, great expectations have been placed on color LCDs that can be made compact, and development has been advanced with the goal of larger screens and higher definition displays. However, the current workstation has only an interface for analog RGB CRT,
When trying to connect a color LCD compatible with high-definition display, there is a problem in that it cannot be connected because a digital RGB interface is required.

[0004]

According to the digital RGB interface for color LCD of the present invention, any 2 ^N colors (M and N are positive integers) of 2 ^M colors are stored in the color code stored in the frame buffer memory. ) Can be assigned, and a cursor color palette that can assign any 3 colors from 2 ^M colors,
The cursor data from the cursor color palette is overlaid on the data read from the color palette, and two lines of R are provided to the upper and lower drivers of the color LCD.
And a synthesizing circuit for outputting GB data.

[0005]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention. The configuration comprises a frame buffer memory 1, a cursor generator 2, a color palette 3, a cursor color palette 4, and a synthesizing circuit 5.

FIG. 2 shows a detailed block diagram of the color palette 3. The configuration is composed of latch circuits 6 and 9, a visual mask 7, and memories 8a, 8b, 8c and 8d rate conversion 10. Now, a case where M = 12 and N = 8 will be described as an example. The color code data 50, 51, 52, 53 read out from the frame buffer memory 1 is temporarily held by the latch circuit 6 and then the visual mask 7
Is output to. In the visual mask 7, the latch circuit 6
The signals 67, 68, 69, and 70 from can be masked by the mask signal 71. For example, "0" in case of low level and color code data 67, 68, 69, 70 in case of high level. Memory 8
a, 8b, 8c, 8d address signals 72, 73, 7
Supply as 4,75. Memories 8a, 8b, 8c, 8
d can store data of any 2 ⁸ colors out of 2 ¹² colors for each of R, G and B. Color codes 72, 7
RGB data 7 at the address specified by 3,74,75
6, 77, 78, 79 are output to the latch circuit 9. RGB data 80, 81, 8 latched by the latch circuit 9
2 and 83 are rate-converted from 4 pixels to 2 pixel data 58 and 59 in the rate conversion circuit 10 and output to the synthesis circuit 5. The operation timing of the rate conversion circuit 10 is shown in FIG. The 4-pixel data of the color pallet data 80, 81, 82, 83 from the latch circuit 9 is divided into two pixels when the selection signal 84 is at a high level and the remaining two pixels when it is at a low level, and then selected. Signal 2
The data held by the doubled CLK (not shown in FIG. 2) is output as the color palette data 58 and 59.

FIG. 4 is a detailed block diagram of the cursor color palette 4. The latch circuits 11 and 18, the cursor display controller 12, the rate converter 13, the cursor B14, the cursor C15, the cursor BC16, and the cursor color data selectors 17a and 17b. Cursor generation signals 54, 55, 56 from the cursor generator 2
57 is once held by the latch circuit 11 and then is rate-converted by the rate conversion 13 from 4 pixel data to 2 pixel data in the same manner as the timing shown in FIG. Are output as the selection signals 60 and 61. That is, a selection 60 for selecting an arbitrary color is output to the cursor color data selector 17a and the synthesizing circuit 5 in accordance with the values of the cursor generation signals 54 and 56, and an arbitrary color is selected in accordance with the values of the cursor generation signals 55 and 57. The selection signal 61 for selection is output to the cursor color data selector 17b and the synthesizing circuit 5. Each of the cursor color data selectors 17a and 17b has a selection signal 6
An arbitrary one color is selected from the three colors of the cursor B14, the cursor C15, and the cursor BC16 by 0 and 61, and is output to the latch circuit 18. The latch circuit 18 temporarily holds the input signals 86 and 87 and then outputs them as cursor data 62 and 63 to the synthesizing circuit 5. The cursor display control 12 can mask the cursor selection signals 60 and 61 by the control signal 85. For example, if the content of the control signal 85 is a signal for masking the cursor B14, the bit for selecting the cursor B14 of the selection signals 60, 61 for the selectors 17a, 17b is selected.
Is fixed at low level. Similarly, when the cursor C is masked, the cursor C15 selection b of the selection signals 60 and 61
Fix it at low level.

FIG. 5 shows a detailed block diagram of the synthesis circuit 5. It is composed of an overlay determiner 19, selectors 20a and 20b, and latch circuits 21a and 21b. The overlay determiner 19 is a circuit for determining whether the color palette data 58, 59 or the cursor data 62, 63 is determined by the value of the selection signal 60 from the cursor color palette 4. When either or both of the 2-bit signals of the selection signal 60 have a high level signal, the cursor data 62 is output to the selector 20a, and when both are low level, the signal 88 for selecting the color palette data 58 is output to the selector 20a. Similarly, a signal 89 for selecting either the cursor data 63 or the color pallet data 59 according to the value of the selection signal 61 is output to the selector 20b. Selector 2
0a and 20b are color palette data 58 and 59, respectively, according to selection signals 88 and 89 from the overlay determiner 19.
Alternatively, the cursor data 62 and 63 are selected and output to the latch circuits 21a and 21b. Latch circuits 21a, 21
After temporarily holding the input signals 90 and 91, b outputs 64 and 65 as digital RGB signals to the color LCD. The output 2-pixel digital RGB data 64 and 65 are sent to the driver ICs arranged above and below the color LCD panel.

In the description of this embodiment, the display of 2 ⁸ colors out of 2 ¹² colors has been described as an example. However, even if the display of 2 ⁸ colors out of 2 ²⁴ colors is made, the color palette 3 and the cursor color palette 4 are displayed. It is obvious that the color data bit width to be written and the bit width of the digital RGB interface from the synthesizing circuit 5 can be easily changed.

[0010]

As described above, according to the present invention,
It became possible to connect a color LCD by providing a digital RGB interface that can display any 2 ^N color among 2 ^M colors. Further, according to the present invention, two pixels of data are output as one data, which corresponds to a method of driving a panel from above and below, which is peculiar to a color LCD, and thus it is possible to easily connect. ..

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a detailed block diagram of a color palette part of the present invention.

FIG. 3 is a rate conversion timing chart of the present invention.

FIG. 4 is a detailed block diagram of a cursor color palette section of the present invention.

FIG. 5 is a detailed block diagram of a cursor synthesizing unit according to the present invention.

FIG. 6 is a conventional block diagram.

[Explanation of symbols]

 1 Frame Buffer Memory 2 Cursor Generator 3 Color Palette 4 Cursor Color Palette 5 Compositing Circuit 6, 9, 11, 18, 21 Latch Circuit 7 Visual Mask 8 Memory 10, 13 Rate Conversion 12 Cursor Display Control 14 Cursor B 15 Cursor C 16 Cursor BC 17,20 Selection circuit 19 Overlay judgment device

Claims (1)

[Claims] 1. An arbitrary 2 ^N colors (M, N) of 2 ^M colors are stored in a color code stored in a frame buffer memory.
Is a positive integer), a color palette for the cursor that can allocate any three colors from 2 ^M colors, and the color palette for the cursor to the data read from the color palette. Overlay the cursor data from and color L
A digital RGB interface for a color LCD, which is composed of a combination circuit that outputs RGB data of two systems to the upper and lower drivers of a CD.