JPH05234097A - Optical head speed detecting device - Google Patents

Abstract

PURPOSE:To provide the optical head speed detecting device which can detect a moving speed of an optical head with sufficient detection accuracy in both of a low speed range and a high speed range. CONSTITUTION:By the timing based on the number of clock pulses counted by a clock counting means 20, and the number of zero crossings counted by a zero crossing counting means 34, the number of clock pulses and the number of zero crossings are latched by a latching means 22, and also, the clock counting means 20 and the zero crossing counting means 34 are reset. A control part 26 derives a moving speed of an optical head 10, based on the number of clock pulses and the number of zero crossings latched by the latching circuit 22.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical head speed detecting device for detecting the speed at which an optical head moves in the radial direction of an optical disk.

[0002]

2. Description of the Related Art An optical disk drive device is an information storage device of a system in which a surface of a disk-shaped storage medium is irradiated with laser light to read recorded information depending on the intensity of reflected light. The optical disk used in the optical disk drive device includes a CD (compact disk) for audio, a LD (laser disk) for video, a read-only storage medium such as a CD-ROM using a CD for storing computer data, and a laser. A write-once optical disc that can record information by light but cannot be rewritten,
Magneto-optical discs and the like are known in which information can be recorded / reproduced / erased using a laser beam and a magnetic field.

In the case of any of the above optical discs,
Concentric or spiral tracks are formed on the optical disk, and the optical head is moved to a desired track to record / reproduce information. In general, since an extremely large number of tracks are formed on an optical disk, it is required to move between tracks in a short time in order to record / reproduce information at high speed. Therefore, when the optical head is moved between tracks, the servo head is controlled so that the optical head is rapidly accelerated / decelerated and moved in a short time. In order to perform servo control with high accuracy, an optical head speed detecting device that always accurately detects the moving speed of the optical head is required.

FIG. 5 shows a conventional optical head speed detecting device. The optical head 10 is provided with track error signal detection means 12. The track error detecting means 12 detects a track error signal indicating the amount of positional deviation of the optical head 10 from the track of the optical disk (not shown). A comparator 14 is connected to the track error signal detecting means 12. The comparator 14 compares the track error signal with a zero level and outputs a comparison result signal.

A zero cross detection circuit 16 is connected to the comparator 14. The zero-cross detection circuit 16 generates a pulse when the comparison result signal rises and falls, and outputs a zero-cross pulse signal at which the track error signal crosses the zero level. A clock counter 20 is connected to the clock generation circuit 18 that outputs a clock pulse of a predetermined frequency, and counts the clock pulses from the clock generation circuit 18. A latch circuit 22 for latching the count value is connected to the clock counter 20.

The zero-cross pulse signal from the zero-cross detection circuit 16 is output to the latch circuit 22 and the clock counter 20, and the count value of the clock counter 20 is latched by the latch circuit 22 at the rising edge of the zero-cross pulse signal, and at the same time, the zero-cross signal is output. The clock counter 20 is reset by the fall of the pulse signal. As a result, the latch circuit 22 latches the time interval at which the track error signal crosses the zero level, that is, the time for which one track is crossed.

On the other hand, a track crossing number counter 24 is connected to the comparator 14, and the track crossing number counter 24 is connected.
Counts the comparison result signal from the comparator 14 to count the number of tracks traversed by the optical head 10. This number of tracks indicates the moving distance of the optical head 10. The control unit 26 calculates the moving speed v of the optical head 10 based on the count value from the latch circuit 22. The control unit 22 obtains the target moving speed vo as a function of the moving distance on the basis of a predetermined speed profile, compares the calculated moving speed v with the target moving speed vo, and outputs the optical head 1
A deviation signal for bringing 0 closer to the target moving speed vo is output.

The deviation signal from the control unit 26 is converted into an analog signal by the D / A converter 28, amplified by the power amplifier 30, and supplied as a control signal to the optical head moving means 32 such as a linear motor. The optical head moving means 32 moves the optical head 10 so as to accelerate or decelerate according to the control signal. However, the conventional optical head speed detection device has a problem that it is difficult to obtain similar detection accuracy in the low speed region and the high speed region of the optical head 10. Each signal in the high speed range of the optical head 10 is shown in FIG. 6, and each signal in the low speed range is shown in FIG.

When the moving speed of the optical head 10 is high,
The track error signal becomes a sine wave having a short cycle as shown in FIG. 6A, and accordingly, both the comparison result signal from the comparator 14 and the zero cross pulse signal from the zero cross detection circuit 16 are shown in FIG. It becomes a short cycle as shown in b) and (c). Therefore, as shown in FIG. 6D, the clock counter 20 is reset before its count value increases, and the latch circuit 22 latches a small count value.

On the other hand, when the moving speed of the optical head 10 is slow, the track error signal becomes a sine wave having a long cycle as shown in FIG. 7A, and accordingly, the comparison result signal from the comparator 14 is also generated. The zero-cross pulse signal from the zero-cross detection circuit 16 also has a long cycle as shown in FIGS. 7B and 7C. Therefore, as shown in FIG. 7D, the clock counter 20 is not reset until the count value becomes very large, and the latch circuit 22 latches the very large count value.

When the moving speed is detected by this method, the moving speed detection error Δv is given by the following expression Δv to 2v ² / a · f, where f is the clock frequency of the clock generation circuit 18 and a is the track pitch. , Largely depends on the clock frequency f.

[0012]

Therefore, in order to secure the detection accuracy in the high speed range of the optical head 10 in which the cycle of the track error signal becomes short, it is necessary to select a sufficiently high clock frequency f. However, if a high clock frequency f is selected, the count value of the clock counter 20 in the low speed range of the optical head 10 becomes enormous, and the number of bits of the clock counter 20 and the latch circuit 22 must be very large. there were.

On the other hand, the high-speed detection of the track error signal at the zero crossing degree has a problem that the speed detection is performed more frequently than necessary in order to secure the band for the high-speed control. An object of the present invention is to provide an optical head speed detecting device capable of detecting the moving speed of the optical head with necessary and sufficient detection accuracy in both the low speed range and the high speed range.

[0014]

In the optical head speed detecting device for detecting the speed at which the optical head moves in the radial direction of the optical disc, the clock generating means for generating a clock pulse and the clock pulse are counted. Clock counting means, zero-cross counting means for counting the number of zero-crosses where the track error signal output from the optical head crosses zero level, latch means for latching the clock pulse number and the zero-cross number, and The latch means latches the clock pulse number and the zero-cross number at a timing based on the clock pulse number counted by the clock counting means and the zero-cross number counted by the zero-cross counting means. Reset means for resetting the clock counting means and the zero-cross counting means; Is achieved by an optical head speed detecting apparatus characterized by comprising a speed calculation means on the basis of the number of clock pulses and the zero cross number that are latched to the means obtaining the moving speed of the optical head.

[0015]

According to the present invention, the clock pulse number and the zero-cross number are latched in the latch means at the timing based on the clock pulse number counted by the clock counting means and the zero-cross number counted by the zero-cross counting means. At the same time, the clock counting means and the zero cross counting means are reset, and the moving speed of the optical head is obtained based on the latched clock pulse number and zero cross number.
The moving speed of the optical head can be detected with sufficient detection accuracy and detection frequency in both the low speed range and the high speed range.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical head speed detecting device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram of the optical head speed detecting device, and FIGS. 2 and 3 are time charts showing the operation of the optical head speed detecting device. The same or similar components as those in FIG. 1 are designated by the same reference numerals to omit or simplify the description.

The track error signal detecting means 12 provided in the optical head 10 detects the track error signal of the optical head 10, and the comparator 14 compares the track error signal with the zero level and outputs a comparison result signal. A zero cross counter 34 is connected to the comparator 14. The zero-cross counter 34 counts the rising and falling of the comparison result signal and counts the number of zero-crosses at which the track detection signal crosses the zero level, and the number of zero-crosses is 2 ⁿ times (n = 0, 1,
2, 3, ...) That is, once, twice, four times, eight times, ...
A timing signal is output every time when. Further, the zero-cross counter 34 is "n" when the number of zero-cross is 2 ⁿ times.
Is output to the latch circuit 22.

The reset pulse generating circuit 36 resets the clock counter 20 and the zero-cross counter 34 based on the count value of the clock counter 20 and the timing signal of the zero-cross counter 34, and also latches the circuit 22.
Control the latch timing of. That is, assuming that the count value x of the clock counter 20 is f, the clock frequency, and T is the time constant whose lower limit is determined by the processing speed of the control unit 26, the timing signal from the zero-cross counter 34 is not output until the zero cross counter 34 exceeds x = f · T. When output, the latch circuit 22 causes the count value "x" of the clock counter 22 to be output.
And "n" of the zero cross counter 2 ⁿ of the zero cross counter 34 are latched. At the same time, a reset pulse signal is output to the clock counter 20 and the zero cross counter 34 to reset them.

On the other hand, a track crossing number counter 24 is connected to the comparator 14, and counts the comparison result signal from the comparator 14 to count the number of tracks crossed by the optical head 10. This number of tracks indicates the moving distance of the optical head 10. The control unit 26 calculates the moving speed v of the optical head 10 by the following equation based on “n” latched by the latch circuit 22 and “x” which is the count value.

V = 2 ⁿ⁻¹ · a / (x / f) = 2 ⁿ⁻¹ · a · f / x where a is the track pitch of the optical disc. The moving speed v may be calculated by n and x in each case by the above formula, or by calculating n and x as addresses from a ROM table in which the calculated value of the moving speed v is stored in advance. Good.

Then, the control unit 26 obtains the target moving speed vo at the present position based on a predetermined speed profile, compares the calculated moving speed v with the target moving speed vo, and moves the optical head 10 to the target moving speed. A deviation signal for approaching vo is output. The deviation signal from the control unit 26 is D
The signal is converted into an analog signal by the / A converter 28, amplified by the power amplifier 30, and supplied as a control signal to the optical head moving means 32 such as a linear motor. The optical head moving means 32 moves the optical head 10 so as to accelerate or decelerate according to the control signal.

Speed detection error Δ by the detection method of the present embodiment
v is given by the following equation Δv to v ² / (2 ^n-1 · a · f), and n is obtained every time the range of moving speed is doubled.
Δv is lowered by increasing by 1. As a result, the clock frequency f is much lower than before, and the clock counter 20 and the latch circuit 22
The bit number of is also small.

Next, the operation of this embodiment will be described with reference to FIGS. When the moving speed of the optical head 10 is high, the track error signal becomes a sine wave with a short cycle as shown in FIG. 2A, and accordingly, the comparison result signal from the comparator 14 is also shown in FIG. 2B. It becomes a short cycle as shown in.
The timing signal from the zero cross counter 34 is also shown in FIG.
As shown in (c), the timing signal is output each time the number of zero crosses reaches 2 ⁿ times (n = 0, 1, 2, 3, ...) At short intervals according to the comparison result signal. In FIG. 2C, n
Since the count value x of the clock counter 20 exceeds f · T after the output of the timing signal of = 2, the reset pulse generation circuit 36 operates when the timing signal of n = 3 is output from the zero cross counter 34. , The latch circuit 22 by the reset pulse (latch pulse) of FIG.
Then, the count value x of the clock counter 22 and n (= 3) of the zero cross number 2 ⁿ of the zero cross counter 34 are latched.
At the same time, the clock counter 20 is reset as shown in FIG. 2 (e), and the zero cross counter 34 is reset as shown in FIG. 2 (f). The count value x latched by the latch circuit 22 changes according to the moving speed of the optical head 10, as shown in FIG. The “n” value latched by the latch circuit 22 indicates “3” as shown in FIG.

As is apparent from FIG. 2, even if the moving speed of the optical head 10 is high, the count value x is not updated as frequently as in the prior art, so that the clock frequency f of the clock generation circuit 18 is set to ensure sufficient detection accuracy. There is no need to raise it. On the other hand, when the moving speed of the optical head 10 is slow, the track error signal becomes a sine wave having a long cycle as shown in FIG. 3A, and accordingly, the comparison result signal from the comparator 14 is also shown in FIG. It becomes a long cycle as shown in b). As shown in FIG. 3C, the timing signal from the zero-cross counter 34 is also timed each time the number of zero-crosses reaches 2 ⁿ times (n = 0, 1, ...) At long intervals according to the comparison result signal. Output a signal. In FIG. 3C, the clock counter 2
Since the timing signal of n = 0 is output after the count value xf · T of 0 is exceeded, the zero cross counter 34 outputs n.
When the timing signal of = 0 is output, the reset pulse generation circuit 36 causes the reset pulse (latch pulse) of FIG. 3D to cause the latch circuit 22 to count the count value x of the clock counter 20 and zero of the zero cross counter 34. Latch n (= 0) of the number of crosses 2 ⁿ . At the same time, the clock counter 20 is reset as shown in FIG. 3 (e), and the zero cross counter 34 is reset as shown in FIG. 3 (f). The count value x latched by the latch circuit 22 changes according to the moving speed of the optical head 10, as shown in FIG. The “n” value latched by the latch circuit 22 is 0 as shown in FIG.

As is clear from FIGS. 2 and 3, the optical head 1
The speed can be detected at a substantially constant frequency (cycle) regardless of whether the moving speed of 0 is low or high. The effect of this embodiment will be verified using specific numerical values. In the seek control of the optical disk drive device, normally 5 mm / sec to 500 mm / se
Speed control is performed in the range of about c. At this time, the interval at which the track error signal crosses the zero level is 160 μsec when the track pitch a of the optical disc is 1.6 μm.
Over 0.8 μsec. 1 mm / se in all speed ranges
In order to suppress the detection error below c, the conventional detection error Δ
In the case of the expression v of Δv to 2v ² / a · f, the clock frequency f requires 300 MHz. If the clock frequency f is 300 MHz, 5 mm
The clock count value x in the low speed range of about / sec is
480 which is a value obtained by multiplying 300 MHz by 160 μsec
It will reach 0.

On the other hand, in the case of the present embodiment, as shown in FIG. 4, the span length for counting the clock is automatically switched according to each speed range so that it becomes longer in the high speed range. Therefore, the most severe 500 mm / s
In order for Δv = v ² / (2 ^n-1 · a · f) <1 mm / sec to be satisfied even in the high speed range of ec, the clock frequency f> 5 MHz should be satisfied. Therefore, the count value x of the clock counter 20 is at most about 800 in each range, and it is not necessary to increase the number of bits of the clock counter 20 and the latch circuit 22.

The present invention is not limited to the above embodiment, but various modifications are possible. For example, although the speed range is divided by the power of 2 in the above embodiment, the speed range may be divided by the power of another numerical value such as 3 or 4. Alternatively, the moving speed may be calculated by latching the number of clock pulses and the number of zero crosses at the timing when the track error signal first crosses the zero level after a predetermined time has elapsed.

Further, a read-only storage medium such as a CD, LD, and CD-ROM, a write-once optical disc, and an optical disc drive device for handling all types of optical discs such as a magneto-optical disc capable of recording / reproducing / erasing information. The present invention can be applied to a head speed detection device.

[0029]

As described above, according to the present invention, the number of clock pulses is counted in the latch means by the timing based on the number of clock pulses counted by the clock counting means and the number of zero crosses counted by the zero cross counting means. And the number of zero crosses are latched, the clock counting means and the zero cross counting means are reset, and the moving speed of the optical head is obtained based on the latched clock pulse number and the zero cross number. Even in the area, the moving speed of the optical head can be detected with sufficient detection accuracy.

[Brief description of drawings]

FIG. 1 is a block diagram of an optical head speed detecting device according to an embodiment of the present invention.

FIG. 2 is a time chart showing an operation in a high speed range of the optical head speed detecting device according to the embodiment of the present invention.

FIG. 3 is a time chart showing an operation in a low speed range of the optical head speed detecting device according to the embodiment of the present invention.

FIG. 4 is a diagram showing a moving span length and a numerical value “n” in a speed range of an optical head speed detecting device according to an embodiment of the present invention.

FIG. 5 is a block diagram of a conventional optical head speed detection device.

FIG. 6 is a time chart showing an operation of a conventional optical head speed detection device in a high speed range.

FIG. 7 is a time chart showing the operation of a conventional optical head speed detection device in a low speed range.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Optical head 12 ... Track error signal detection means 14 ... Comparator 16 ... Zero cross detection circuit 18 ... Clock generation circuit 20 ... Clock counter 22 ... Latch circuit 24 ... Track crossing number counter 26 ... Control section 28 ... D / A converter 30 ... Power amplifier 32 ... Optical head moving means 34 ... Zero cross counter 36 ... Reset pulse generation circuit

Claims (1)

[Claims] 1. An optical head speed detecting device for detecting a speed at which an optical head moves in a radial direction of an optical disk, a clock generating means for generating a clock pulse, a clock counting means for counting the clock pulse, and the optical head. A zero-cross counting means for counting the number of zero-crosses where the track error signal outputted from the zero-level crosses, a latch means for latching the clock pulse number and the zero-cross number, and a clock counted by the clock counting means. The latch means latches the clock pulse number and the zero-cross number at a timing based on the pulse number and the zero-cross number counted by the zero-cross counting means. Resetting means for resetting means, and the latching means latched by the latching means An optical head speed detecting device comprising: speed calculating means for calculating the moving speed of the optical head based on the number of clock pulses and the number of zero crossings.