JPH0522583A - Image processor - Google Patents

Abstract

PURPOSE:To perform a normal picture processing, to make it possible to easily control the ink transfer amount of a solid part, especially, in an output picture and to clearly output thin lines and lean characters. CONSTITUTION:A thin line recognition processing circuit 21 detecting the picture signal of a prescribed picture element width and a thinning out processing circuit 20 adding white signals compulsorily with a prescribed picture element interval for the continuous black signals corresponding to the continuous high density part in an original to be read when the picture signal detected by the thin line recognition processing circuit 21 is more than the prescribed picture element width are provided. A photograph processing circuit 12, a simple binarization circuit 13, a thin line recognition processing means 21, a thinning out processing means, etc., are provided as mode selection means for selecting picture processing modes, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus which reads a document image by photoelectric conversion means, processes the read image data and outputs binary data.

[0002]

2. Description of the Related Art In conventional copying machines, plate-making machines, facsimile machines, and the like, an image of an original is read by a reading means such as a CCD sensor, and multivalued image data of the read original, that is, the original density is simply binary. By using an image processing device that binarizes or binarizes by a known halftone reproduction method such as an error diffusion method, the image of the original is clearly output.

The overall operation of the stencil printing apparatus using the above image processing apparatus will be described below with reference to FIG. 7, and the basic circuit configuration of the image processing system of the stencil printing apparatus will be described with reference to FIG. A block diagram is shown.

As shown in FIG. 7, this type of stencil printing apparatus has an image input section 1 having a CCD sensor 7 for picking up an image of an original X, and an original X picked up by the CCD sensor 7 of the image input section 1. Image processing apparatus 2 for processing the image signal of the image, and a heat-sensitive stencil sheet Z (hereinafter referred to as a master sheet) made of a thermoplastic synthetic resin film and an ink-permeable support based on the image data processed by the image processing apparatus 2. Plate making means 3 including a thermal head 3a for forming a perforated image, a drum 4 to which ink is supplied to the outer peripheral surface from the inside around which the master Z is wound, and the drum 4
The printing paper P is sandwiched between the press roller 5 and the press roller 5, and the ink passing through the perforated image portion formed on the master Z is transferred to the printing paper P and the printing paper P is conveyed. It is roughly configured from a part 6.

As for the circuit configuration of the stencil printing apparatus as a whole, as shown in FIG. 8, the image input unit 1 is an A / D converter for converting the CCD sensor 7 and an analog video signal into an 8-bit multivalued video signal. The image processing apparatus 2 is composed of a converter 8 and is connected to the image processing apparatus 2 downstream of the image input unit 1.

The image processing apparatus 2 inverts the image data input from the image input section 1 for each bit by the inverter 9 so as to be suitable for image recording of the stencil printing apparatus, and the read signal from the brightest section is 0. , So that the read signal from the darkest part becomes 255.

Reference numeral 10 denotes a conventionally known shading correction circuit, which performs shading correction for normalizing the white level of the read signal to 0. The normalized video signal is density converted according to the output characteristics of the stencil printing machine. Table 1
After being converted at 1, it is inputted to the photographic processing circuit 12 and the simple binarization circuit 13, which are halftone processing circuits, respectively, as video data such as photographic output such as halftone dots and silver halide photographs, and character output. Input to the A input terminal and the B input terminal of the selector 14.

With respect to each video data input to the selector 14, either a photographic image or a character image is selected by the signal "SEL" from the CPU (not shown) in the selector 14 and input to the mask processing circuit 15. ..

The mask processing circuit 15 limits the printing surface in accordance with the size of the sheet to be transferred. The masked video signal is a perforated image signal in the TPH address conversion circuit 16 which meets the driving conditions of the thermal head 13a. And the perforated image is formed on the thermoplastic synthetic resin film of the master Z by the thermal head 3a of the plate making means 3.

The master Z, in which the punched image is formed on the thermoplastic synthetic resin film, is wound around the drum 4 as described above, and the ink is transferred to the printing paper P via the press roller 5 to obtain an output image. Stencil printers were common.

[0011]

However, when the master Z on which the perforated image is formed as described above is printed by using the above-mentioned conventional stencil printing apparatus, especially when the image of the original X has a solid portion. There is a phenomenon of so-called “show-through” in which the amount of ink transferred to the printing paper P becomes larger than that of other image parts, and the ink is transferred to the back surface of the printing paper P to be printed and stacked next. There was a problem that it became remarkable.

When it is attempted to control the print density, that is, the transfer amount of ink in order to eliminate such a "show-through" phenomenon, the print speed is controlled or the pressure between the drum 4 and the press roller 5 is controlled. Since a mechanism for controlling the above must be provided, and a complicated and large-scale mechanism is required, there is a problem that it causes a cost increase and requires adjustment thereof, which is troublesome.

Under these circumstances, it is possible to easily control the amount of ink transferred to the printing paper,
An image processing device capable of outputting a clear image has been desired.

The present invention has been made in view of the above circumstances, and an object of the present invention is to perform normal image processing and easily control the amount of ink transfer, particularly in a solid portion in an output image. The present invention provides an image processing device that can output a fine line and fine characters clearly.

[0015]

In order to achieve the above-mentioned object, the present invention has a photographic processing circuit, a simple binarization circuit, and the like, and an original read by a photoelectric conversion means has two pixels for each pixel. In an image processing device for processing as an image signal of binarized data, a fine line recognition processing means for detecting an image signal having a predetermined pixel width, and when the image signal detected by the fine line recognition processing means has a predetermined pixel width or more, A thinning-out processing means for converting a continuous black signal image signal corresponding to a continuous high density portion of a read document into an image signal by forcibly adding a white signal at a predetermined pixel interval; And a mode selection unit for selecting each image processing mode such as a simple binarization circuit, a thin line recognition processing unit, and a thinning processing unit.

[0016]

According to the present invention, by selecting an image processing mode such as a photographic processing circuit or a simple binarization circuit, it is possible to perform image processing of a halftone original such as a halftone dot or silver halide photograph, and character image processing. In addition to being able to perform, it is possible to clearly output an image of thin lines and fine characters by selecting the image processing mode of the thin line recognition processing means, and in the solid portion by selecting the image processing mode of the thinning processing means. It is possible to obtain a high quality image output without show-through.

[0017]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of an image processing apparatus according to the present invention. Since the same members as those shown in FIG. 8 operate in the same manner, the same reference numerals are given and detailed description thereof will be omitted.

In FIG. 1, the image signal of the original X picked up by the CCD sensor 7 of the image input unit 1 is converted from an analog video signal to an 8-bit multivalued video signal by the A / D converter 8 and image processing is performed. Inverter 9 of device 2
The data inversion is performed for each bit so that the read signal from the brightest portion becomes 0 and the read signal from the darkest portion becomes 255, which is suitable for image recording of the stencil printing apparatus.

Further, the shading correction circuit 10 normalizes the white level of the read signal to 0, and the normalized video signal is converted to an 8-bit video by the density conversion table 11 so as to match the output characteristics of the stencil printing apparatus. A photographic processing circuit 12 that is converted into a signal and performs photographic processing that is halftone processing such as halftone dot and silver salt photography, simple binarization circuit 1
3 and the thinning processing circuit 20 according to the gist of the present invention.

Although not shown, the video signal for each pixel input to each of the circuits 12, 13 and 20 is in a direction perpendicular to the arrangement direction (main scanning direction) of the light receiving elements of the CCD 7 by a timing generation circuit. The three types of binary signals PH, TX, G input to the selector 14 are completely synchronized with the direction in which the document relatively moves and scans (sub-scanning direction).
R is a video signal at the same coordinate position on the original.

Next, the thinning-out processing circuit 2 will be described with reference to FIG.
The operation of 0 will be described. FIG. 2 is a conceptual diagram of the thinning-out processing circuit 20, in which the main scanning CNT 103 is synchronized by the video signal, HSYNC which is a horizontal synchronizing signal, and CK which is a video clock signal, and by a preset value from a CPU (not shown). The counter value is output via the signal line 105 at a certain cycle, and the output counter value is stored in the ROM.
It is input to the lower address of 102.

Further, the sub-scanning CNT 104 has a vertical synchronizing signal VSYNC and a horizontal synchronizing signal HSYNC.
The counter value is synchronized with the signal line 106 at a certain cycle by a preset value from a CPU (not shown).
The output counter value is output via the ROM 102.
Is input to the higher address of.

On the other hand, the main scanning CNT is stored in the ROM 102.
The output of 103 and the sub-scanning CNT 104 describes the threshold value corresponding to the video signal in hexadecimal.

The output from the ROM 102 is input to the B input terminal of the two A and B input terminals of the comparator 101, and an 8-bit video signal is input to the other A input terminal of the comparator 101. , The video signal and the threshold value from the ROM 102 are compared in the comparator 101.

In this case, when the video signal input from the A input terminal is larger than the threshold value input from the B input terminal (A> B), "1" representing a black signal is output from the comparator 101. It

Conversely, when the video signal input from the A input terminal is smaller than the threshold value input from the B input terminal (A <B), "0" representing a white signal is output from the comparator 101. The comparator 101
Outputs a binarized signal.

The outline of the thinning-out processing operation has been described above based on the circuit diagram of FIG. 2. Next, the relationship with the output image will be concretely described with reference to FIG. FIG. 3A is a conceptual diagram of the thinning-out process. As shown in FIG. 3, the main scanning direction and the sub-scanning direction have a 4 × 4 matrix window, and the matrix unit corresponds to one pixel in this embodiment. is doing.

Further, the matrix has a circuit configuration capable of setting a threshold value corresponding to each matrix, and this circuit configuration is set in the table of the ROM 102 as described above. The threshold value is set as 80H, FFH, etc. shown in hexadecimal as shown in FIG.

Here, in the main scanning direction and the sub scanning direction, the threshold value in the main scanning direction is periodically changed in the order of A → B → C → D → A ... When the period ends, the line W is changed to A → B ... By doing this, B of the comparator 101
As shown in Fig. 3 (a), the input terminal is hexadecimal 8
0, 80, FF, FF are input.

If, for example, a video signal of hexadecimal number C0 is continuously input as the video signal, a white signal is forcibly added every two pixels according to the present embodiment. A black and white pattern as shown in 3 (b) is output.

This means that when the original 201 as shown in FIG. 4 is subjected to the thinning processing according to the present embodiment, a solid portion such as the I portion is enlarged when the portion is viewed in an arrow direction. As in 201a pulled out in step 2, the master Z is punched in a small grid pattern.

Therefore, since the solid portion is thinned out every two pixels, the ink permeates through the perforated portion and is transferred to the printing paper P, and as described above, the water in the ink disperses quickly and the ink The transfer amount is also limited, and high-quality printed matter with less show-through can be obtained.

However, if this is left as it is, the fine line as shown in the part II of FIG. 6 may lack the image information depending on the cycle of the matrix, so that only the output image as shown at 201b is obtained, which may cause inconvenience. is there.

Therefore, the means for eliminating the disadvantages caused in the case of such a thin wire will be described below with reference to FIGS. 5 and 6. The signal binarized by the simple binary circuit 10 in FIG. 1 is input to the selector 14 and also to the thin line recognition processing circuit 21 as the signal TVD. FIG. 5 is a block diagram of the thin line recognition processing circuit 21.
1, 302, 303, 304 are memories for one line,
1 line, 2 lines, 3 for the binarized signal TVD
Signals D1, D2, D3, D4 delayed by 4 lines
Is output.

Reference numerals 305 to 316 denote latches for one pixel, for example, 309 to 312 hold signals obtained by delaying the D1 signal by one pixel delay, two pixel delay, three pixel delay, and four pixel delay, respectively. L5 at L3, L6 at 312
The L7 and L8 signals are continuous 4 pixel image signals.

Therefore, by the memory output signals D1, D2, D3, D4 and DO signals of the four lines described above and the signals L5 to L8 in the D2 signal and the latches 309 to 312, 5 in the main scanning direction and the sub scanning direction. X5 Figure 6
A cross pattern 401 as shown in FIG.

Therefore, the patterns A, B, C in the main scanning direction and the patterns D, E, in the sub scanning direction shown in FIG.
F is detected independently. It should be noted that, in the figure, a black circle indicates a black binarized signal, and a white circle indicates a white binarized signal.

Next, the fine line detection direction will be described by taking the pattern A as an example, and three consecutive pixels, that is, L5, L6, L.
When the seven signals are white for L5, black for L6, and white for L7, the arithmetic circuit 317 forcibly outputs the black signal "1" on LINE which is an output signal.

At that time, it is judged that the dot is a thin line of one dot continuous in the sub-scanning direction, and the "1" signal output on LINE is thinned out by the OR gate 22 shown in FIG.
Regardless of the output from 0, the black signal "1" is always input to the selector 14. Similarly, a thin line continuous in the main scanning direction is detected by the pattern D.

Further, the pattern B. In C, a line signal for two pixels continuous in the sub-scanning direction is detected and a black signal for two pixels is output.

Further, the pattern E. At F, a line signal for two pixels continuous in the main scanning direction is detected and a black signal for two pixels is output.

As described above, the thin line recognition processing circuit 21 image-processes based on the video signal image-processed by the thinning-out processing circuit 20 and the TVD signal from the simple binarization circuit 13 in this embodiment. The video signal is input to the C input terminal of the selector 14 as the video signal GR which is ORed by the OR gate 22.

When the thinning processing mode is selected by the mode selecting means 30 provided on the panel of the stencil printing machine, the select signal SEL from the CPU 40 is selected.
With the combination of 1 and SEL2, the GR video signal is sent to the mask processing circuit 15 and is formed as a punched image on the master Z by the thermal head 3a of the plate making means 3.

Therefore, when the image of the original X has the solid portion of the high density portion and the image processing is performed as it is, the ink amount is excessively supplied to the output image side, and the next image is printed and stacked. When the show-through occurs in which the ink of the image formed by the previous printing is transferred to the back side of the printing paper P, the thinning-out processing circuit 20 forcibly outputs a white signal with a predetermined pixel interval. An image signal obtained by performing a thinning process on the added and continuous black signal can be obtained.

When a fine line or a fine character is read out and output instead of the solid portion of the document X, when the fine line recognition processing mode is selected by the mode selecting means 30 provided on the panel of the stencil printing machine, the CPU 40 is selected. Since the thin line recognition processing circuit 21 detects that the pixel width is within the predetermined pixel width by the combination of the select signals SEL1 and SEL2 from the above, in this case, the OR gate 22 calculates the logical sum and the thin line recognition processing circuit 21 outputs the logical sum. Since the signal can be preferentially output and the white signal that is forcibly added in the thinning processing circuit 20 can be forcibly converted to the black signal,
It is possible to output thin lines or fine characters as clear fine lines or fine characters without missing a part thereof.

Further, by selecting an image processing mode such as the photographic processing circuit 12 or the simple binarization circuit 13 in the mode selection means 30 provided on the panel of the stencil printing machine, a normal halftone dot or silver halide photograph is obtained. It is possible to perform image processing of halftone originals, character image processing, and the like.

[0047]

As described above, according to the present invention,
By selecting an image processing mode such as a photographic processing circuit or a simple binarization circuit, it is possible to perform image processing of ordinary halftone originals such as halftone dots and silver halide photographs and character image processing, and fine line recognition. By selecting the image processing mode of the processing means, fine lines and fine characters can be output clearly, and by selecting the image processing mode of the thinning-out processing means, the transfer amount of ink in the solid part can be suppressed. It is possible to obtain a printed matter that does not appear in the image. Therefore, a high-quality output product can be easily provided according to the image state of the document.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an image processing apparatus according to the present invention.

FIG. 2 is a conceptual diagram of a thinning processing circuit.

FIG. 3 is an explanatory diagram showing a relationship with an output image in thinning processing.

FIG. 4 is an explanatory diagram showing an example of a thinned printed matter.

FIG. 5 is a block diagram of a thin line recognition processing circuit.

FIG. 6 is a thin line recognition pattern diagram of thin line recognition processing.

FIG. 7 is a schematic explanatory diagram of a stencil printing apparatus.

FIG. 8 is a basic block diagram of an image processing system of the stencil printing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 image input unit 2 image processing device 3 plate making means 12 photo processing circuit 13 single paper binarization circuit 20 thinning processing circuit 21 fine line recognition processing circuit 22 OR gate 30 mode selection means

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] October 1, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0034

[Correction method] Change

[Correction content]

Therefore, the means for eliminating the disadvantages caused in the case of such a thin wire will be described below with reference to FIGS. 5 and 6. In FIG. 1, the signal binarized by the simple binary circuit 13 is input to the selector 14 and also to the thin line recognition processing circuit 21 as the signal TVD. FIG. 5 is a block diagram of the thin line recognition processing circuit 21.
1, 302, 303, 304 are memories for one line,
1 line, 2 lines, 3 for the binarized signal TVD
Signals D1, D2, D3, D4 delayed by 4 lines
Is output.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0043

[Correction method] Change

[Correction content]

When the thinning processing mode is selected by the mode selecting means (not shown) provided on the panel of the stencil printing machine, the GR video signal is masked by the combination of the select signals SEL1 and SEL2 from the CPU (not shown). It is sent to the processing circuit 15 and is formed as a punched image on the master Z by the thermal head 3a of the plate making means 3.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0045

[Correction method] Change

[Correction content]

When a fine line or a fine character is read out and output instead of the solid portion of the document X, when the fine line recognition processing mode is selected by the mode selecting means (not shown) provided on the panel of the stencil printing machine, A combination of select signals SEL1 and SEL2 from a CPU (not shown) detects that the thin line recognition processing circuit 21 is within a predetermined pixel width. In this case, the OR gate 22 performs a logical OR to obtain the thin line recognition processing circuit. Since the signal from 21 can be preferentially output and the white signal forcibly added in the thinning-out processing circuit 20 can be forcibly made into a black signal, a thin line or a thin character is partially omitted. However, it is possible to output as clear fine lines or fine characters.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0046

[Correction method] Change

[Correction content]

Further, by selecting an image processing mode such as the photographic processing circuit 12 or the simple binarization circuit 13 in the mode selection means (not shown) provided on the panel of the stencil printing machine, a normal halftone dot or silver salt is selected. Image processing of a halftone original such as a photograph and character image processing can be performed.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] Explanation of code

[Correction method] Change

[Correction content]

[Explanation of reference symbols] 1 image input unit 2 image processing device 3 plate making means 12 photo processing circuit 13 simple binarization circuit 20 thinning processing circuit 21 fine line recognition processing circuit 22 OR gate 30 mode selection means ───────── ─────────────────────────────────────────────

[Procedure amendment]

[Submission date] October 6, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

Next, the thinning-out processing circuit 2 will be described with reference to FIG.
The operation of 0 will be described. FIG. 2 is a conceptual diagram of the thinning-out processing circuit 20, in which the main scanning CNT 103 is synchronized by a video signal, HSYNC which is a horizontal synchronizing signal, and CK which is a video clock signal, and is countered at a certain cycle by a preset value from the CPU 40. The value is output via the signal line 105, and the output counter value is input to the lower address of the ROM 102.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0022

[Correction method] Change

[Correction content]

Further, the sub-scanning CNT 104 has a vertical synchronizing signal VSYNC and a horizontal synchronizing signal HSYNC.
The counter value is output via the signal line 106 at a certain cycle according to the preset value from the CPU 40 , and the output counter value is input to the upper address of the ROM 102.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0043

[Correction method] Change

[Correction content]

When the thinning processing mode is selected by the mode selecting means 30 provided on the panel of the stencil printing machine, the select signal SEL from the CPU 40 is selected.
With the combination of 1 and SEL2, the GR video signal is sent to the mask processing circuit 15 and is formed as a punched image on the master Z by the thermal head 3a of the plate making means 3.

[Procedure amendment 4]

[Document name to be amended] Statement

[Name of item to be corrected] 0045

[Correction method] Change

[Correction content]

When a thin line or a fine character is read and output instead of the solid portion of the original X, when the thin line recognition processing mode is selected by the mode selection means 30 provided on the panel of the stencil printing machine, the CPU 40 Since the thin line recognition processing circuit 21 detects that the pixel width is within the predetermined pixel width by the combination of the select signals SEL1 and SEL2 from the above, in this case, the OR gate 22 calculates the logical sum and the thin line recognition processing circuit 21 outputs Since the signal can be preferentially output and the white signal that is forcibly added in the thinning processing circuit 20 can be forcibly converted to the black signal,
It is possible to output thin lines or fine characters as clear fine lines or fine characters without missing a part thereof.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0046

[Correction method] Change

[Correction content]

Further, by selecting an image processing mode such as the photographic processing circuit 12 or the simple binarization circuit 13 in the mode selection means 30 provided on the panel of the stencil printing machine, a normal halftone dot or silver halide photograph is obtained. It is possible to perform image processing of halftone originals, character image processing, and the like.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] Explanation of code

[Correction method] Change

[Correction content]

[Description of Reference Signs] 1 image input unit 2 image processing device 3 plate making means 12 photo processing circuit 13 simple binarization circuit 20 thinning processing circuit 21 fine line recognition processing circuit 22 OR gate 30 mode selection means 40 CPU

[Procedure Amendment 7]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 1

[Correction method] Change

[Correction content]

[Figure 1]

Claims (1)

Claim: What is claimed is: 1. An image processing apparatus comprising a photographic processing circuit, a simple binarization circuit and the like, and processing an original read by a photoelectric conversion unit as an image signal of binary data for each pixel. , A thin line recognition processing means for detecting an image signal of a predetermined pixel width, and, if the image signal detected by the thin line recognition processing means is a predetermined pixel width or more, a continuous line corresponding to a high density portion of the read original Thinning processing means for forcibly adding a white signal to a black signal image signal at a predetermined pixel interval, and the above-mentioned photo processing circuit, simple binarization circuit, thin line recognition processing means, thinning processing An image processing apparatus comprising: a mode selection unit that selects each image processing mode such as a unit.