JPH05225274A - Circuit diagram generation and display device - Google Patents

Circuit diagram generation and display device

Info

Publication number
JPH05225274A
JPH05225274A JP4028640A JP2864092A JPH05225274A JP H05225274 A JPH05225274 A JP H05225274A JP 4028640 A JP4028640 A JP 4028640A JP 2864092 A JP2864092 A JP 2864092A JP H05225274 A JPH05225274 A JP H05225274A
Authority
JP
Japan
Prior art keywords
circuit diagram
lower layer
layer circuit
display
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4028640A
Other languages
Japanese (ja)
Inventor
Ayumi Ochi
あゆみ 越智
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4028640A priority Critical patent/JPH05225274A/en
Publication of JPH05225274A publication Critical patent/JPH05225274A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide the circuit diagram generation and display device which can displays a low-layer circuit diagram on a hierarchically designed high-order circuit diagram. CONSTITUTION:This device is provided with a low-layer circuit diagram display specifying means 5 for specifying a symbol for displaying the low-layer circuit diagram on the hierarchically designed high-order circuit diagram, a low-layer circuit retrieving means 7 which retrieves the specified low-layer circuit diagram, an area means 4 which reads the area of the retrieved low-layer circuit, a hierarchic display circuit diagram generating means 8 which varies the size of the symbol so that the low-layer circuit diagram can be displayed and arranges the low-layer circuit diagram therein, and a circuit diagram display means 10 which displays the hierarchic display circuit diagram on a CRT display device 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、回路設計に使用する
回路図作成表示装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit diagram creation and display device used for circuit design.

【0002】[0002]

【従来の技術】図7は、従来の回路図作成表示装置の構
成を示すブロック図であり、図において、1は回路図作
成手段、2は下層回路図データ、3は上位回路図デー
タ、5は下層回路図表示指定手段、7は下層回路図検索
手段、10は回路図表示手段、11はCRT表示装置であ
る。
2. Description of the Related Art FIG. 7 is a block diagram showing the structure of a conventional circuit diagram preparation display device. In the figure, 1 is circuit diagram preparation means, 2 is lower layer circuit diagram data, 3 is upper circuit diagram data, and 5 is circuit diagram data. Is a lower layer circuit diagram display designating means, 7 is a lower layer circuit diagram retrieval means, 10 is a circuit diagram display means, and 11 is a CRT display device.

【0003】次に動作について説明する。回路図作成手
段1を用いて作成された下層回路図2を階層的に持つ上
位回路図3が、CRT装置11上に回路表示手段10により
表示されている。表示された上位回路図3上の下層回路
図を表示させたい下層回路図を持っているシンボルを、
下層回路図表示指定手段5を用いて指定する。指定され
たシンボルの下層回路図を、下層回路検索手段7を用い
て下層回路図データの中より検索し、表示指定下層回路
図2を、回路図表示手段10を用いてCRT表示装置11の
画面いっぱいに表示する。
Next, the operation will be described. The upper circuit diagram 3 having the lower layer circuit diagram 2 hierarchically created by the circuit diagram creating means 1 is displayed on the CRT device 11 by the circuit display means 10. I want to display the lower layer schematic on the displayed upper circuit diagram 3.
It is designated using the lower layer circuit diagram display designating means 5. The lower layer circuit diagram of the designated symbol is searched from the lower layer circuit diagram data by using the lower layer circuit retrieval means 7, and the display designated lower layer circuit diagram 2 is displayed by the circuit diagram display means 10 on the screen of the CRT display device 11. Full display.

【0004】[0004]

【発明が解決しようとする課題】従来の回路図作成表示
装置は以上のように構成されているので、下層回路図が
上位回路図上に表示されないため、全体の構成が確認で
きないという問題点があった。
Since the conventional circuit diagram making and displaying apparatus is constructed as described above, the lower layer circuit diagram is not displayed on the upper circuit diagram, so that there is a problem that the entire configuration cannot be confirmed. there were.

【0005】この発明は上記のような問題点を解消する
ためになされたもので、階層設計された上位回路図上
に、検索指定した下層回路図を表示することができる回
路図作成表示装置を得ることを目的とする。
The present invention has been made to solve the above problems, and provides a circuit diagram creation and display device capable of displaying a lower layer circuit diagram designated for retrieval on a hierarchically designed upper circuit diagram. The purpose is to get.

【0006】[0006]

【課題を解決するための手段】この発明に係わる回路図
作成表示装置は、階層設計された上位回路図上で下層回
路図を表示させたいシンボルを指定することができる下
層回路図表示指定手段と、指定された下層回路図を検索
する下層回路検索手段と、検索された下層回路の領域を
読みとる領域読みとり手段と、上記回路図上のシンボル
を下層回路図が表示できる大きさに変更しそのなかに下
層回路図を配置する改組表示回路作成手段と、階層表示
回路図をCRT表示装置上に表示する回路図表示手段を
設けたものである。
A circuit diagram creation / display device according to the present invention comprises a lower layer circuit diagram display designating means capable of designating a symbol for which a lower layer circuit diagram is to be displayed on a hierarchically designed upper circuit diagram. , Lower layer circuit searching means for searching the specified lower layer circuit diagram, area reading means for reading the searched lower layer circuit area, and changing the symbol on the above circuit diagram to a size capable of displaying the lower layer circuit diagram. Further, a reorganized display circuit creating means for arranging a lower layer circuit diagram and a circuit diagram display means for displaying a hierarchical display circuit diagram on a CRT display device are provided.

【0007】[0007]

【作用】この発明における回路図作成表示装置は、階層
設計された上位回路図上で下層回路図を表示するシンボ
ルを指定すると、上位回路図上のシンボルを下層回路が
表示できる大きさに変更し、そのなかに下層回路図を表
示する。
When the symbol for displaying the lower layer circuit diagram is designated on the hierarchically designed upper circuit diagram, the circuit diagram preparing and displaying apparatus according to the present invention changes the symbol on the upper circuit diagram to a size that can be displayed by the lower layer circuit. , Display the lower layer circuit diagram in it.

【0008】[0008]

【実施例】【Example】

実施例1.以下、この発明の実施例1を図について説明
する。図1は回路図作成表示装置をブロック図、図2は
階層的に作成された上位回路図上に下層回路を表示する
動作を示すフローチャート、図3は階層設計された上位
回路を示す回路図、図4は表示する下層回路の回路図、
図5は上位回路図を下層回路図が表示できるようにした
回路図、図6は上位回路図上に下層回路図を表示した回
路図である。図1において、1は回路図作成手段、2は
下層回路図データ、3は上位回路図データ、4は領域読
みとり手段、5は下層回路図表示手段、6は下層回路図
領域データ、7は下層回路図検索手段、8は階層表示回
路図作成手段、9は階層表示回路図データ、10は回路図
表示手段、11はCRT表示装置である。
Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a circuit diagram creation / display device, FIG. 2 is a flowchart showing an operation of displaying a lower layer circuit on a hierarchically created upper circuit diagram, and FIG. 3 is a circuit diagram showing a hierarchically designed upper circuit. 4 is a circuit diagram of the lower layer circuit to be displayed,
5 is a circuit diagram in which a lower layer circuit diagram can be displayed on the upper circuit diagram, and FIG. 6 is a circuit diagram in which the lower layer circuit diagram is displayed on the upper circuit diagram. In FIG. 1, 1 is circuit diagram creating means, 2 is lower layer circuit diagram data, 3 is upper layer circuit diagram data, 4 is area reading means, 5 is lower layer circuit diagram display means, 6 is lower layer circuit diagram area data, and 7 is lower layer. Reference numeral 8 is a circuit diagram search means, 8 is a hierarchy display circuit diagram creating means, 9 is hierarchy display circuit diagram data, 10 is a circuit diagram display means, and 11 is a CRT display device.

【0009】次に動作について図1〜図6を用いて説明
する。ユーザが回路図作成手段1を用いて、下層回路図
2とそれを下層にもつ上位回路図データ3を作成する
(図2のS1)と、作成した上位回路図データ3が、回
路図表示手段10によりCRT表示装置11に表示される
(図2のS2)。CRT表示装置11に表示された上位回
路図(図3)上の、下層回路図を表示させたいシンボル
(図3のa)を下層回路表示指定手段5を用いて指定す
る(図2のS3)。指定されたシンボルの下層回路図を
下層回路図データ2より、下層回路図検索手段7を用い
て検索する(図2のS4)。検索された下層回路図(図
4)の回路図領域を領域読みとり手段4より、下層回路
図領域データ6を読みとる(図2のS5)。階層表示回
路作成手段8が上位回路図データ3上の指定されたシン
ボルの大きさを、下層回路図領域データ6と同じ大きさ
に変更し(図5)、シンボル(図5のa)上に下層回路
図データ2を配置(図6)した階層表示回路図データ9
を作成する。(図2のS6)。階層表示回路図データ9
を回路図表示手段10を用いてCRT表示装置11に表示す
る(図2のS7)。
Next, the operation will be described with reference to FIGS. When the user uses the circuit diagram creating means 1 to create the lower layer circuit diagram 2 and the upper layer circuit diagram data 3 having it as the lower layer (S1 in FIG. 2), the created upper layer circuit diagram data 3 is the circuit diagram displaying means. It is displayed on the CRT display device 11 by 10 (S2 in FIG. 2). On the upper circuit diagram (FIG. 3) displayed on the CRT display device 11, the symbol (a in FIG. 3) for which the lower layer circuit diagram is to be displayed is designated using the lower layer circuit display designating means 5 (S3 in FIG. 2). . The lower layer circuit diagram of the designated symbol is searched from the lower layer circuit diagram data 2 using the lower layer circuit diagram retrieval means 7 (S4 in FIG. 2). The lower layer circuit diagram area data 6 is read by the area reading means 4 from the searched circuit layer area of the lower layer circuit diagram (FIG. 4) (S5 in FIG. 2). The hierarchical display circuit creating means 8 changes the size of the designated symbol on the upper circuit diagram data 3 to the same size as the lower layer circuit diagram area data 6 (FIG. 5), and changes it to the symbol (a in FIG. 5). Hierarchical display circuit diagram data 9 in which lower layer circuit diagram data 2 is arranged (FIG. 6)
To create. (S6 in FIG. 2). Hierarchical display circuit diagram data 9
Is displayed on the CRT display device 11 using the circuit diagram display means 10 (S7 in FIG. 2).

【0010】[0010]

【発明の効果】以上のようにこの発明によれば、階層設
計された上位回路図上で下層回路図を表示させたいシン
ボルを指定することができる下層回路図表示指定手段
と、指定された下層回路図を検索する下層回路検索手段
と、検索された下層回路の領域を読みとる領域読みとり
手段と、上記回路図上のシンボルを下層回路図が表示で
きる大きさに変更しそのなかに下層回路図を配置する改
組表示回路作成手段と、階層表示回路図をCRT表示装
置上に表示する回路図表示手段を設けた構成としたの
で、作成する回路図全体の構成を確認することができる
という効果がある。
As described above, according to the present invention, the lower layer circuit diagram display designating means capable of designating the symbol for which the lower layer circuit diagram is to be displayed on the hierarchically designed upper circuit diagram, and the designated lower layer. Lower layer circuit searching means for searching the circuit diagram, area reading means for reading the searched lower layer circuit area, and the symbol on the above circuit diagram are changed to a size capable of displaying the lower layer circuit diagram, and the lower layer circuit diagram is included therein. Since the reorganized display circuit creating means to be arranged and the circuit diagram displaying means for displaying the hierarchical display circuit diagram on the CRT display device are provided, it is possible to confirm the entire configuration of the created circuit diagram. .

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例1による回路図作成表示装置
を示すブロック図である。
FIG. 1 is a block diagram showing a circuit diagram creation / display device according to a first embodiment of the present invention.

【図2】この発明の実施例1の動作を説明するフローチ
ャート図である。
FIG. 2 is a flow chart for explaining the operation of the first embodiment of the present invention.

【図3】この発明の実施例1の動作を説明する階層設計
された上位回路図である。
FIG. 3 is a hierarchically designed upper circuit diagram for explaining the operation of the first embodiment of the present invention.

【図4】この発明の実施例1の動作を説明する表示希望
の下層回路図である。
FIG. 4 is a lower layer circuit diagram of a display request for explaining the operation of the first embodiment of the present invention.

【図5】この発明の実施例1の動作を説明する下層回路
図のシンボルを表示した上位回路図である。
FIG. 5 is an upper circuit diagram showing the symbols of the lower layer circuit diagram for explaining the operation of the first embodiment of the present invention.

【図6】この発明の実施例1の動作を説明する下層回路
図を組入れ表示した上位回路図である。
FIG. 6 is an upper circuit diagram incorporating and displaying a lower layer circuit diagram for explaining the operation of the first embodiment of the present invention.

【図7】従来の回路図作成表示装置の構成を示すブロッ
ク図である。
FIG. 7 is a block diagram showing a configuration of a conventional circuit diagram creation / display device.

【符号の説明】[Explanation of symbols]

1 回路図作成手段 2 下層回路図データ 3 上位回路図データ 4 領域読みとり手段 5 下層回路図表示指定手段 6 下層回路図領域データ 7 下層回路図検索手段 8 階層表示回路図作成手段 9 階層表示回路図データ 10 回路図表示手段 11 CRT表示装置 1 circuit diagram creating means 2 lower layer circuit diagram data 3 upper layer circuit diagram data 4 area reading means 5 lower layer circuit diagram display designating means 6 lower layer circuit diagram area data 7 lower layer circuit diagram retrieving means 8 layer display circuit diagram creating means 9 layer display circuit diagram Data 10 Circuit diagram display means 11 CRT display device

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 階層設計された上位回路図を作成できる
回路図作成手段と、上記上位回路図上で表示させたい下
層回路図を持つシンボルを指定できる下層回路図表示指
定手段と、指定された下層回路図を検索する下層回路図
検索手段と、下層回路の領域を読みとる領域読みとり手
段と、上記の情報を用いて上位回路図上に表示させたい
下層回路図を表示させた回路図を作成する階層表示回路
図作成手段と、回路図をCRT表示装置に表示する回路
図表示手段を備えたことを特徴とする回路図作成表示装
置。
1. A circuit diagram creating means capable of creating a hierarchically designed upper circuit diagram, and a lower layer circuit diagram display designating means capable of designating a symbol having a lower layer circuit diagram to be displayed on the upper circuit diagram. A lower layer circuit diagram searching means for searching the lower layer circuit diagram, a region reading means for reading the region of the lower layer circuit, and a circuit diagram displaying the lower layer circuit diagram to be displayed on the upper circuit diagram by using the above information A circuit diagram creation and display device comprising: a hierarchical display circuit diagram creation device; and a circuit diagram display device for displaying a circuit diagram on a CRT display device.
JP4028640A 1992-02-15 1992-02-15 Circuit diagram generation and display device Pending JPH05225274A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4028640A JPH05225274A (en) 1992-02-15 1992-02-15 Circuit diagram generation and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4028640A JPH05225274A (en) 1992-02-15 1992-02-15 Circuit diagram generation and display device

Publications (1)

Publication Number Publication Date
JPH05225274A true JPH05225274A (en) 1993-09-03

Family

ID=12254127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4028640A Pending JPH05225274A (en) 1992-02-15 1992-02-15 Circuit diagram generation and display device

Country Status (1)

Country Link
JP (1) JPH05225274A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0785099A (en) * 1993-09-20 1995-03-31 Fujitsu Ltd System for displaying hierarchy
US7143375B2 (en) 2002-11-15 2006-11-28 Fujitsu Limited Logical equivalence verifying device, method and computer readable medium thereof
JPWO2007108061A1 (en) * 2006-03-17 2009-07-30 富士通株式会社 Network design processing apparatus, network design processing method, and network design processing program

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0785099A (en) * 1993-09-20 1995-03-31 Fujitsu Ltd System for displaying hierarchy
US7143375B2 (en) 2002-11-15 2006-11-28 Fujitsu Limited Logical equivalence verifying device, method and computer readable medium thereof
US7337414B2 (en) 2002-11-15 2008-02-26 Fujitsu Limited Logical equivalence verifying device, method, and computer-readable medium thereof
JPWO2007108061A1 (en) * 2006-03-17 2009-07-30 富士通株式会社 Network design processing apparatus, network design processing method, and network design processing program
JP4746091B2 (en) * 2006-03-17 2011-08-10 富士通株式会社 Network design processing apparatus, network design processing method, and network design processing program

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