JPH05218196A - Manufacture of semiconductor chips - Google Patents

Abstract

PURPOSE:To prevent cracks and nicks in dividing a semiconductor substrate into a plurality of chips by growing a polycrystalline silicon in thickness of more than 2mum after grinding a back side of the semiconductor substrate, and obtaining semiconductor chips through scribing. CONSTITUTION:The manufacture comprises a process of grinding a back side of a semiconductor substrate 1, and a process of growing a polycrystal silicon on the back side of the semiconductor substrate 1 in thickness of more than 2mum. Subsequently, the semiconductor substrate 1 is scribed along a scribe line formed on a top side 2 of the semiconductor substrate 1. As a result, semiconductor chips 9 become to be obtained. On one hand, the polycrystal silicon cuts into the fine rugged part of a crushed layer 5 composed of single crystal silicon. The polycrystalline silicon has good bonding performance with the single crystal silicon. A film thickness T4 of the polycrystalline silicon layer 6 is worth to reinforce satisfactorily the strength of the semiconductor substrate 1. As a result, semiconductor chips having no cracks of a wafer and nicks of a chip can be obtained by a simple process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor chip, and more particularly to a method for manufacturing a semiconductor chip in which the strength of a semiconductor substrate is increased to obtain a semiconductor chip.

[0002]

2 (a) to 2 (e) are process sectional views showing a conventional method for manufacturing a semiconductor chip. The conventional technique will be described with reference to this figure.

First, as shown in FIG. 2A, the semiconductor substrate 2
After forming the semiconductor element on the surface 22 of No. 1, the scribe line 23 is formed. At this time, the thickness T ₁ of the semiconductor substrate 21
Is generally about 625 μm for a 5-inch wafer and a 6-inch wafer, and 725 μm for an 8-inch wafer. The semiconductor substrate is mounted as a semiconductor chip in a subsequent process, and the thickness of the semiconductor chip is 150 when mounting.
It is preferably about 400 μm.

Therefore, as shown in FIG. 2B, a protective tape 24 is adhered to the surface 22 of the semiconductor substrate 21. afterwards,
The semiconductor substrate 21 is ground from the back surface to obtain the thickness T of the semiconductor substrate.
₂ is 150 to 400 μm. Since mechanical grinding is generally used in this grinding step, the crush layer 25 is formed on the back surface of the semiconductor substrate.

After that, the protective tape 24 is removed (see FIG. 2).
(C)) Then, the dicing tape 26 is adhered to the crush layer 25. Further, a diamond blade is used to scribe along the scribe line 231 of the semiconductor substrate 21. By this scribing, the semiconductor substrate 21 is divided into a plurality of semiconductor chips 28 by the grooves 27 (FIG. 3).
(D)).

Finally, as shown in FIG. 3 (e), the dicing tape 26 is peeled off to obtain a semiconductor chip 28.

[0007]

However, since the back surface of the semiconductor has the fractured layer 25, cracks 30 and chips 31 are generated as shown in FIG.
It has been a cause of defects as an IC for cards. Further, also in the electric characteristic measuring step before scribing, the wafer conveying step and the dicing tape adhering step, there is a problem that a wafer crack occurs due to a thin wafer thickness (150 to 400 μm) and a crush layer.

In order to solve such a problem, it has been proposed as disclosed in Japanese Patent Laid-Open No. 63-37612 that the wafer has a mirror-finished surface and an organic material layer is formed on the back surface for reinforcing the strength. However, the process of mirror finishing is complicated, and formation of the organic material layer also requires spin coating baking and many steps.

An object of the present invention is to provide a method of manufacturing a semiconductor chip which is free from wafer cracking, chipping and the like and which can be obtained by a simple process.

[0010]

Therefore, in the present invention, after the back surface of the semiconductor substrate is ground, polycrystalline silicon of 2 μm is applied to the ground surface.
It was grown thicker than m and scribed to obtain a semiconductor chip.

[0011]

Function The polycrystalline silicon grown on the ground surface contributes to the improvement of the strength of the semiconductor substrate.

[0012]

1 (a) to 1 (c) are process sectional views showing an embodiment of the present invention. Embodiments of the present invention will be described below with reference to this drawing.

FIG. 1 (a) is the same as the conventional one shown in FIG. 2 (b). The N-type semiconductor substrate 1 made of single crystal silicon is
It has a scribe line 3 on its surface 2 and a protective tape 4
Are bonded and the semiconductor substrate 1 is ground from the back surface. The crush layer 5 is formed on the back surface, and has a thickness T _{3 of the} semiconductor substrate 1.
Is as thin as 140 to 390 μm.

Next, as shown in FIG. 1B, after peeling off the protective tape 4, a polycrystalline silicon layer 6 is grown so as to cover the entire surface of the crushed layer 5. Polycrystalline silicon is generally SiH
₄ can be obtained by a thermal decomposition reaction at about 600 ° C. However, Al, which is a low melting point metal, is generally often used for wiring of semiconductor elements. When Al wiring is formed on the surface 2 of the semiconductor substrate 1, Al cannot withstand the heat treatment of about 600 ° C. Therefore, in this embodiment, the polycrystalline silicon layer 6 is grown at a temperature of about 400 ° C. by thermally decomposing SiH ₄ in plasma. Since the polycrystalline silicon layer 6 is grown by bringing the surface 2 of the semiconductor substrate 1 which is the element forming surface into close contact with the electrode surface, the polycrystalline silicon layer is selectively formed only on the fracture layer 5 which is the rear surface of the semiconductor substrate 1. grow up.

The polycrystalline silicon also penetrates into the fine irregularities of the crush layer 5 made of single crystal silicon, and the polycrystalline silicon and the single crystal silicon have good adhesion. The film thickness T ₄ of the polycrystalline silicon layer 6 is set to about 5 to 10 μm, which is a value that sufficiently bonds silicon molecules to each other and sufficiently reinforces the strength of the semiconductor substrate 1.

Further, the polycrystalline silicon layer 6 is formed on the semiconductor substrate 1
An N-type impurity having the same conductivity type as that of is introduced at a high concentration. Specifically, PH ₃ is introduced as a doping material during the growth of the polycrystalline silicon layer 6, and the polycrystalline silicon layer 6 finally has a higher concentration of 10 ¹⁵ to 10 ²¹ cm than the semiconductor substrate 1.
It has become a degree. This has the advantage that the resistance between the die pad and the chip can be reduced during die bonding, and the substrate potential in the chip can be kept uniform.

Thereafter, as shown in FIG. 1C, a dicing tape 7 is adhered on the polycrystalline silicon layer 6 and scribed along the scribe line 3. As a result, the semiconductor substrate 1 is divided into the plurality of chips 9 by the groove 8.

FIG. 4 is a perspective view of the divided chip 9. As can be seen from the figure, since the back surface of the chip 9 is covered with the polycrystalline silicon layer 6, the crush layer 5 in the grinding step is confined inside the chip 9. Therefore, it is possible to suppress the crack chipping that has occurred in the cutout surface from the crushed layer 5 as the starting point due to the diamond blade pressure at the time of scribing.

[0019]

In order to compare the chip of the present invention described above with the conventional chip, the strength of the chip shown in FIG. 5 was measured. In this strength measuring method, the measuring chip 50 is placed on the sample table 51. Then, the chip strength was measured by pressing the pressing needle 52 from the surface of the measuring chip in the direction of arrow A and reading the pressure when the measuring chip 50 was broken.

The measurement was carried out by changing the chip strength of 260 μm thick 7 mm × 7 mm square while changing the film thickness of the polycrystalline silicon formed on the back surface. The result is shown in FIG.

As can be seen from FIG. 6, the chip without a polycrystalline silicon layer (polycrystalline silicon growth thickness 0 μm) as in the prior art has a chip strength of 1.0 kg or less, while the polycrystalline silicon has a thickness of 5 μm. The grown chip shows a chip strength of 7.5 kg. Generally, a chip strength of 6 to 7 kg is sufficient, so that the polycrystalline silicon layer having a value of more than 2 μm can achieve the object of the present invention.

[Brief description of drawings]

FIG. 1 is a process sectional view of an embodiment of the present invention.

FIG. 2 is a diagram showing a conventional method for manufacturing a semiconductor chip.

FIG. 3 is a perspective view of a conventional semiconductor chip.

FIG. 4 is a perspective view of a chip of an example.

FIG. 5 is a diagram showing the measurement of chip strength.

FIG. 6 is a diagram showing the relationship between chip strength and polycrystalline silicon film thickness.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Surface 3 Scribe Line 4 Protective Tape 5 Crush Layer 6 Polycrystalline Silicon Layer 7 Dicing Tape 8 Groove 9 Chip

Claims (1)

[Claims] 1. A step of grinding a back surface of a semiconductor substrate, a step of growing polycrystalline silicon to a thickness of more than 2 μm on the ground back surface of the semiconductor substrate, and thereafter, a scribe line formed on the front surface of the semiconductor substrate. By scribing the semiconductor substrate along
A method of manufacturing a semiconductor chip, comprising the step of obtaining a semiconductor chip.