JPH0521539A - Semiconductor device and computer - Google Patents

Abstract

PURPOSE:To obtain a means wherein a silicon device and a different kind device are bonded by a method wherein an interconnection layer on an insulating film and an interconnection layer near the surface of a semiconductor chip are connected, in a desired part, by a connecting conductor which has been formed so as to pass the insulating film. CONSTITUTION:One part of a silicon substrate 3 is removed; a different kind device (GaAs or the like) 1 is buried as a semiconductor chip; a plastic resin 2 is filled between them. The silicon substrate 3 is constituted of a silicon-on- insulator. When silicon is removed from the silicon substrate 3 by a chemical etching operation or the like, an oxide film 6 by the silicon-on-insulator stops the chemical etching operation. A silicon device and an interconnection layer 5 are constituted on the oxide film 6; they can come into contact with the different kind device 1. The silicon device and the interconnection layer 5 can be connected to the different kind device 1 at a low temperature by making a hole by means of a focused ion beam and by filling the hole with a metal conductor by means of a photoassisted CVD operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a computer, and more particularly to a highly functional and highly integrated semiconductor device and a computer using the same. More specifically, the present invention relates to a semiconductor device in which different semiconductor chips are integrated and a computer using the same.

[0002]

2. Description of the Related Art Conventionally, semiconductor wafers (silicon substrates, etc.)
As a technique for incorporating a semiconductor chip (a semiconductor chip made of the same material as the semiconductor wafer or a device chip made of a different material, etc.) into the device, (publicly known example 1) Earl W. Johnson et al., “Silicon Hybrid Wafer Scale Package Technology” , IEE Journal of Solid State Circuit, ESC 21 Vol. 5, No. 5, 1986, 845-851 (RWJohnson et.al. "S
ilicon Hybrid Wafer-Scale Package Techonology, ”
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.SC-2
1, No. 5, OCT. 1986, pp. 845-851) and (Publication 2) in JP-A-62-147746.

In these methods, a chip-sized hole is formed in a semiconductor wafer, a tested semiconductor chip is fitted into the hole, the gap is filled with a filling material (plastic resin, etc.) to be flat, and wiring is carried out across the chips. The technology is disclosed.

A similar technique is described in Japanese Patent Laid-Open No. 55-95338 (known example 3). Here, in a semiconductor wafer in which the wiring portion is formed on the wafer surface, the wiring portion on the surface is not cut, but only the lower semiconductor portion is hollowed out,
There is disclosed a method in which a wired chip is fitted in and the upper and lower wires are brought into contact with each other to be connected.

[0005]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention Known examples 1 and 2 above
Then, a semiconductor chip is embedded in a semiconductor wafer, a groove is filled with a filling material, and then wiring is formed thereon by photolithography. For this reason, firstly, there is a problem that unevenness easily occurs on the surface portion of the filling material in the gap or a step is generated between the semiconductor wafer and the chip, and the wiring on this tends to be disconnected. Secondly, high temperature treatment is required in the steps such as annealing for forming wirings and contacts. For this reason, there is a problem that the wiring is likely to be broken due to temperature stress. Thirdly, in order to ensure the heat resistance of the filling material, there is a problem that the selection of the filling material is restricted. Therefore, there is a problem that the yield and reliability in manufacturing the device are insufficient.

In the above-mentioned known example 3, in order to connect the wiring on the surface of the semiconductor wafer and the wiring on the semiconductor chip,
Both wires of the connection part are exposed and crimped. For this reason, there is a problem that the wiring metal of the connection portion remains exposed, and reliability and durability are still insufficient even if a resin or the like is filled later.

It is therefore an object of the present invention to provide a semiconductor device and a computer having an embedded chip which is excellent in manufacturing yield, reliability and durability.

[0008]

A first means of the present invention for achieving the above object is to deposit an insulating film (6) on the surface of a semiconductor wafer (3), and deposit the insulating film (6) on the insulating film (6). A wiring layer (5) is formed, and a semiconductor portion under the insulating film (6) is hollowed out at a desired portion of the wafer to form a recess, and the upper surface of the recess is formed before the formation of the recess. Is covered with the insulating film (6), and in the recess,
A semiconductor chip (1) having a wiring layer near the surface is fitted with the surface facing upward, and the wiring layer (5) on the insulating film (6) and the wiring layer near the surface of the semiconductor chip (1). The space between them is the insulating film (6) at a desired position.
The semiconductor device is characterized by being connected by a connection conductor (4) provided by penetrating. (See FIGS. 1 and 2).

The second means of the present invention is to provide one or more instruction processors (202), one or more input / output processors (203), one or more expansion memories (204), and One or more main memories (20
5) and a signal including data and address information in the computer is sent to each processor (202, 20).
3) and each memory (204, 205), and comprises a system control (201) for controlling the above-mentioned transmission of the above-mentioned signal, and each processor (20)
2, 203), each memory (204, 205), and at least one of the system controls (201) are formed by using the semiconductor device according to claim 1 (Fig. 13).

[0010]

According to the first means of the present invention, the upper surface of the recess formed in the semiconductor wafer is covered with the insulating film formed before the formation of the recess. Therefore, no step is formed at the boundary between the fitted semiconductor chip and the semiconductor wafer. Therefore, the wiring that connects the semiconductor wafer and the semiconductor chip does not break.

When the silicon back surface is removed to form the recess, the insulating film serves as a stopping layer to protect the wiring on the main surface and the silicon device. Therefore, it becomes possible to form all the silicon devices and wirings on the semiconductor wafer before forming the recesses. For this reason, it is not necessary to form wiring by a high temperature process after incorporating a semiconductor chip or a different type of device. Therefore, stress or the like does not occur in the embedded portion.

Further, the wiring layer on the semiconductor wafer is formed on the insulating film, and the connection with the semiconductor chip is made by the connecting conductor penetrating the insulating film. Therefore, the connection portion of the wiring layer on the semiconductor wafer is not exposed. Therefore, a highly reliable semiconductor device can be obtained.

As described above, a highly reliable semiconductor device in which various semiconductor chips and semiconductor device chips made of different materials are embedded can be obtained with a high manufacturing yield.

According to the second means of the present invention, by using an integrated circuit in which different kinds of semiconductor chips are embedded, a computer using optical transmission / reception or the like can be easily constructed with a small number of integrated circuit chips.

[0015]

FIG. 1 shows an embodiment in which the present invention is applied. A part of the silicon substrate 3 which is a semiconductor wafer is removed, a heterogeneous device 1 is embedded as a semiconductor chip, and a plastic resin 2 is filled between the silicon substrate 3 and the heterogeneous device 1. The silicon substrate 3 is composed of silicon-on-insulator, and the oxide film 6 of the silicon-on-insulator functions as a layer for stopping the chemical etching when the silicon is removed from the silicon substrate 3 by chemical etching or other means. A silicon device and a wiring layer 5 are formed on the oxide film 6,
It is possible to make contact with a heterogeneous device 1 sufficiently close.
The silicon device and the wiring layer 5 can be connected to the heterogeneous device 1 at a low temperature by making a hole by a focused ion beam and filling a metal conductor by photo CVD. FIG. 2 is a plan view of the embodiment of the present invention described in FIG. The wiring 5 is connected to another silicon device on silicon and is connected to a heterogeneous device.

According to this embodiment, the focused ion beam and the light C are used to connect the semiconductor wafer and the semiconductor chip.
Use VD. Therefore, it becomes possible to connect the wiring of the semiconductor wafer and the wiring of the semiconductor chip or a different type of device in a low temperature process. FIG. 3 shows another embodiment when the present invention is applied. The case where a laser light emitting element is selected as a different type device is shown.
When a laser beam 8 from a different type of device incorporated in the laser exits vertically from the main surface of the silicon substrate 3, the silicon on the oxide film 6 of the silicon-on-insulator does not have a good light transmittance, and the silicon is opened by an etching technique. Improve the light transmittance. At this time, the oxide film 6 is etched so as to remain, and laser light passes through the oxide film 6.

FIG. 4 is a plan view of the embodiment of the present invention described with reference to FIG. Opening 7 is used to connect different types of devices 1 and wires 5.
The focused ion beam and the photo-CVD are used to connect with each other.

FIG. 5 shows another embodiment when the present invention is applied. The end surface of the silicon substrate 3 is removed by chemical etching, a different type of device 1 is incorporated, and a plastic resin is filled. The heterogeneous device of this embodiment is a laser diode, which emits laser light from the end face. It is possible to emit light from the end face of a fusion device incorporating different types of devices and bring an optical fiber close to the end face for optical interconnection. From the upper surface of a different type of device, it is possible to connect to the wiring 4 by a focused ion beam and photo CVD.

FIG. 6 shows another embodiment to which the present invention is applied, in which the structure of FIG. 5 incorporating an edge emitting laser diode is developed in a plane. It shows that the silicon substrate 3 is partially U-shaped and the periphery is filled with the plastic resin 2.

FIG. 7 shows another embodiment to which the present invention is applied. A part of the silicon substrate 3 is removed by chemical etching to incorporate a different type device 1, a plastic resin is filled, the focused ion beam and photo-CVD are used to connect by a connecting conductor 4, and the upper surface of the silicon is removed. Form an optical waveguide. The heterogeneous device may be a surface emitting laser diode, in which laser light is emitted from the fused device surface and reflected at the tip of the waveguide to transmit the light. This waveguide is formed before removing the silicon, but since the silicon is not etched by the oxide film of the silicon-on-insulator, the waveguide is not broken or it does not interfere with other devices. FIG. 8 is a plan view of the embodiment shown in FIG. 7, showing an example of wirings and waveguides. Since the wiring and the waveguide are separate layers, they may be laid out in a cross manner.

FIG. 9 shows a circuit for converting the output of a different type of embedded device (photodetector) by a circuit formed by elements on a silicon substrate at high speed and low power consumption.
An example is shown. The phototransistor 101 has a function of passing a current when receiving light, and is generally formed of an element different from silicon. The collector side and the emitter side of this element are embedded in silicon, and holes are formed in the device surface of the phototransistor through the silicon surface part by focused ion beam processing, and the phototransistor and the silicon device are wire-connected by laser CVD. The collector terminal 114 of the phototransistor 101 is connected to the resistance element 102 in the same part as the silicon device, and the emitter terminal 115 of the phototransistor is connected to the resistance element 103. Terminal 1
14 is the base of the transistor 109 and terminal 115
Is connected to the base of transistor 110. at the same time,
The base of the transistor 110 is connected to the resistive element 107, the resistive element 111, and the transistor 10 via the capacitive element 104.
8 and the voltage generated by the current mirror type reference voltage generating circuit formed by the diode 105 and the diode 106 is applied. This circuit is connected as a power supply terminal to the ground terminal 112 and the power supply terminal 113 of about −2 volts. The output terminal 116 of this circuit can be designed so that a potential of -1.4 V is generated when the phototransistor 101 is on, and a potential of -0.8 V is generated when the phototransistor 101 is off. Further, since the push-pull circuit is formed by the transistor 109 and the transistor 110, the parasitic capacitance and the wiring capacitance added to the output terminal 116 can be driven at high speed, and the photoelectric conversion circuit can operate at high speed. .

FIG. 10 is a sectional view showing the process flow of the embodiment of the present invention. Step A of FIG. 10 shows a state where different types of silicon devices and wirings are completed on a substrate made of silicon on insulator (SOI). Step B of FIG. 10 shows a state where the back surface of the silicon substrate is removed by chemical etching. Since the silicon-on-insulator substrate is used, the silicon etch is stopped by the upper oxide film, so the silicon device and the wiring 5 on the main surface side of the silicon substrate are protected from the silicon etch. Step C of FIG. 10 is a cross-sectional view in which the different type of device 1 is incorporated and the space between the different type of device and the silicon substrate is filled with plastic resin. Step D of FIG. 10 is a sectional view in which the silicon device and the wiring on the upper layer of the silicon substrate are connected by the focused ion beam and the photo-CVD.

FIG. 11 is a flow chart showing the process flow shown in FIG. In step A, an SOI wafer with device wiring complete silicon is shown, and in step B, a SiO ₂ deposit required in a later step is shown on the back surface of this wafer. In step C, in order to align with a silicon device formed on the main surface side of silicon, a double-sided exposure aligner apparatus is used to form a necessary pattern in a subsequent step by a mask or EB direct writing technique. The resist pattern on the part is removed. In step D, according to the pattern formed in step C, SiO ₂ in a portion where different types of devices are embedded is removed in a subsequent step. Next, in step E, step D
In using the SiO ₂ pattern formed, SiO ₂
Is used as a mask to perform Si etching. Si etching progresses from the back surface of the silicon wafer to the main surface side,
Since the SOI wafer is used, the etching stops at the SiO ₂ film near the main surface. Next, in step F, a different type of device is inserted into the silicon etched portion formed in step E. Next, step G
Then, a step of filling an epoxy resin between silicon and a different type of device is shown. Then, in step H, a hole is formed by a focused ion beam (FIB) to reach the surface of the silicon main surface side and the surface of the different type device. Finally, in step I, the wiring metal is deposited by laser CVD to electrically connect the silicon device and the dissimilar device.

Next, another embodiment of the present invention will be described with reference to the computer block diagram of FIG. This embodiment is an example in which the semiconductor device according to the present invention is applied to a high-speed large-scale computer in which a plurality of processors 500 for processing instructions and operations are connected in parallel. In this embodiment, since the high-speed fusion type semiconductor integrated circuit to which the present invention is applied has a high degree of integration, one side of the processor 500 for processing instructions and operations, the storage control device 501, the main storage device 502, etc. It could be composed of a fusion type semiconductor chip of 10 to 30 mm. A processor 500 that processes these commands and operations, a storage controller 501, and a data communication interface 503 composed of a compound semiconductor integrated circuit are mounted on the same ceramic substrate 506. In addition, the data communication interface 503 and the data communication control device 504.
Were mounted on the same ceramic substrate 507. The ceramic substrates 506 and 507 and the ceramic substrate on which the main memory device 502 is mounted are mounted on a substrate having a side of about 50 cm or less, and a central processing unit 508 of a large-scale computer is formed. Data communication within the central processing unit 508, data communication between a plurality of central processing units, or data communication between the data communication interface 503 and the board 509 on which the input / output processor 505 is mounted is indicated by double-ended arrow lines in the figure. This was done via the optical fiber 510 shown. In this computer, a processor 500 that processes instructions and operations, and a storage controller 50
1 and the silicon semiconductor integrated circuits such as the main memory device 502 operate in parallel at high speed, and data communication is performed using light as a medium, so that the number of instruction processings per second can be significantly increased. It was

FIG. 13 shows an embodiment of an optical interconnect in a mainframe to which the present invention is applied. The system control 201 is connected to a plurality of instruction processors 202. The system control 201 is connected to the other system control 201, the input / output processor 203, the expansion memory 204, and the main memory 205. Generally, these are composed of data and address signals and a large number of signal lines, and are transferred at high speed. In the present invention, these signals are transmitted through a plurality of optical fiber lines 206, and optical transmitter / receiver devices 207 are provided at the sending end and the receiving end, each of which is embedded in a silicon device chip. System control 20
In general, since a large number of signals are concentrated on 1, the number of pins becomes a physical limitation and the number of pins is physically limited. However, since the present invention is connected at high speed by light, only a small number of signal lines are required.
It does not become a pin neck. The system control 201 is a central part for connecting the instruction processor 202 and other units at high speed, and a function of electrically exchanging data at high speed is required. By paying attention to this part and using a semiconductor in which the optical interconnect and the heterogeneous device of the present invention are fused, an extremely compact and high-performance system can be formed.

FIG. 14 shows an embodiment in which the present invention is applied to a large scale LSI. As such a typical LSI, a microprocessor chip having an optical interconnect, a workstation chip, a mainframe instruction processor chip, a system control chip, etc. can be considered. In this example, a heterogeneous device 401 is embedded in a silicon chip portion, and optical fibers 402 are arranged side by side for transmitting and receiving light from the end face. The heterogeneous device 401 is electrically connected to an opto-electric conversion circuit block 403 having a conversion circuit formed by an electric circuit element in silicon. The silicon chip 409 includes an instruction processing block 405, a floating point processing block 408, a high speed buffer memory 404, a control memory 407, a bonding pad 408 and the like. Block 403 and block 404
Are closely connected to each other, and the data received by the light from the different type device 401 is converted into an electric signal in the memory 401 in the block 401 and stored at high speed. Similarly, memory 4
The contents of 04 drive a laser diode in a different type of device by a drive circuit in a block 401 to convert it into light and send it to an optical fiber.

FIG. 15 shows an embodiment in which the fused semiconductor chip according to the present invention is mounted in a package. In this example, an example of mounting on a pin grid array package 605 with a radiation fin 604 is shown. The fused semiconductor chip 601 of the present invention is mounted on a package 605 and then connected by a bonding wire 602. In a portion for transmitting and receiving light, an optical fiber penetrates through the package and a fiber end is in contact with a device surface. . Electrical signals can be routed from the package pins 606 through the printed circuit board.

[0028]

According to the present invention, after all the silicon devices and wiring on the silicon substrate are completed, a silicon etch is performed to fill the gap between the silicon substrate and the heterogeneous device in order to incorporate the heterogeneous device. A material that does not require heat resistance can be selected for the plastic resin to be used, and reliability can be improved. Also, compared with the conventional method of punching a silicon substrate and making a hole to the surface,
Since the surface is not processed at all, the wiring is protected, it is not necessary to consider the alignment accuracy when forming the wiring, and it is not necessary to flatten the groove. In addition, different types of devices and silicon devices are vertically connected by a connecting conductor formed by a focused ion beam and photo-CVD etc., so that they are connected in the shortest distance, wiring resistance and wiring capacitance are minimized, and conventional wire bonding or soldering is used. Compared with flip-chip connection, the electrical load is lightest and high speed operation is possible.

By using the fusion type semiconductor device according to the present invention, an optical fiber connecting between the semiconductor devices can be connected to another chip or a communication line to exchange data at a very high speed. For example, if it is connected to a local area network, an optical signal can be directly input without any intervention on the chip, and the system can be mounted extremely compactly. Since the integrated device can be mounted on the back side of the package like a conventional silicon chip, the conventional large-scale, large-power silicon chip mounting technology can be used as it is. For example, it can fit well into a package with cooling fins or a package for water cooling. Therefore, no special mounting method is required, and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a plan view showing an embodiment of the present invention.

FIG. 3 is a sectional view showing an embodiment of the present invention.

FIG. 4 is a plan view showing an embodiment of the present invention.

FIG. 5 is a sectional view showing an embodiment of the present invention.

FIG. 6 is a plan view showing an embodiment of the present invention.

FIG. 7 is a sectional view showing an embodiment of the present invention.

FIG. 8 is a plan view showing an embodiment of the present invention.

FIG. 9 is a diagram showing a photodetector-electric conversion circuit of the present invention.

FIG. 10 is a sectional view showing a process flow of an example of the present invention.

FIG. 11 is a flowchart of a process flow of an example of the present invention.

FIG. 12 is a diagram showing an example of the computer of the present invention.

FIG. 13 is a diagram showing an optical interconnect in a mainframe according to an embodiment of the present invention.

FIG. 14 is a large-scale integrated LSI according to an embodiment of the present invention.
FIG.

FIG. 15 is a diagram showing an implementation example according to an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Different type device, 2 ... Plastic resin, 3 ... Silicon substrate, 4 ... Connection conductor, 5 ... Silicon device and wiring, 6 ... Oxide film, 7 ... Silicon removal part, 8 ... Laser beam, 9 ... Waveguide, 101 … Phototransistor, 102
... collector connecting resistance element, 103 ... emitter connecting resistance element, 104 ... capacitance element, 105 ... diode, 10
6 ... Diode, 107 ... Current mirror power circuit resistance element, 108 ... Silicon transistor, 109 ... Silicon transistor, 110 ... Silicon transistor, 1
11 ... Current mirror power supply circuit resistance element, 112 ... Ground terminal, 113 ... Power supply terminal, 201 ... System control chip, 202 ... Instruction chip,
203 ... I / O processor chip, 204 ... Expansion memory, 205 ... Main memory, 206 ... Optical fiber, 207 ...
Optical transmitting / receiving device, 401 ... Optical transmitting / receiving device, 402
... optical fiber, 403 ... conversion circuit, 404 ... buffer memory, 405 ... instruction processing block, 406 ... floating point block, 408 ... control memory, 408 ... bonding pad, 409 ... silicon chip, 500 ... instruction consisting of fused semiconductor integrated circuit And a processor for processing operations, 501 ... System control device composed of integrated semiconductor integrated circuit, 502 ... Main memory device composed of silicon semiconductor integrated circuit, 503 ... Data communication interface composed of compound semiconductor integrated circuit, 504 ... Data communication control device, 5
05 ... I / O processor, 506 ... Ceramic substrate, 5
07 ... Ceramic substrate, 508 ... Central processing unit, 5
09 ... Input / output processor mounting substrate, 510 ... Data communication optical fiber, 601 ... Device integrated chip, 602 ...
Bonding wire, 603 ... Optical fiber, 604 ... Radiating fin, 605 ... Package body, 606 ... Package pin.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/82 // H01L 21/285 C 7738-4M 21/3205 27/15 8934-4M

Claims (8)

[Claims] 1. An insulating film is deposited on the surface of a semiconductor wafer,
A wiring layer is formed on the insulating film, and a semiconductor portion under the insulating film is hollowed to form a recess at a desired portion of the wafer, and an upper surface of the recess is formed before the formation of the recess. A semiconductor chip having a wiring layer near the surface is fitted into the recess with the surface facing upward, and the wiring layer on the insulating film and the vicinity of the surface of the semiconductor chip are covered with the insulating film. A semiconductor device is characterized in that the wiring layer is connected to a wiring layer by a connection conductor provided through the insulating film at a desired position. 2. The connection between the wiring layer on the insulating film and the wiring layer near the surface of the semiconductor chip is connected by the connection conductor formed after the semiconductor chip is fitted into the recess. The semiconductor device according to claim 1, wherein the semiconductor device is provided. 3. The semiconductor device according to claim 1, wherein the connection conductor is formed by using a focused ion beam method or a laser CVD method. 4. The semiconductor device according to claim 1, wherein the recess is formed by chemical etching. 5. The semiconductor device according to claim 1, wherein a light emitting element is formed on the semiconductor chip. 6. The semiconductor device according to claim 1, wherein an optical waveguide is formed on the insulating film on the surface of the semiconductor wafer. 7. A photo-detecting device is formed on the semiconductor chip, and an active pull-down circuit including a transistor, a resistor, and a capacitive element is formed on the semiconductor wafer, and a collector terminal of the photo-detecting device and The semiconductor device according to claim 1, wherein an emitter terminal is taken out by the connection conductor and is connected to the active pull-down circuit. 8. Data in a computer, comprising one or a plurality of instruction processors, one or a plurality of input / output processors, one or a plurality of extended memories, and one or a plurality of main memories. And a signal containing address information,
The system control system comprises: a system control, which is transmitted between each processor and each memory, and controls the transmission of the signal; and at least one of each processor, each memory, and a system control. A computer which is formed using a semiconductor device.