JPH05206520A - Manufacture of p-type ii-vi compound semiconductor - Google Patents

Manufacture of p-type ii-vi compound semiconductor

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Publication number
JPH05206520A
JPH05206520A JP4028092A JP4028092A JPH05206520A JP H05206520 A JPH05206520 A JP H05206520A JP 4028092 A JP4028092 A JP 4028092A JP 4028092 A JP4028092 A JP 4028092A JP H05206520 A JPH05206520 A JP H05206520A
Authority
JP
Japan
Prior art keywords
compound semiconductor
type
group
doped
electron beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4028092A
Other languages
Japanese (ja)
Inventor
Shuji Nakamura
修二 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Original Assignee
Nichia Chemical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP4028092A priority Critical patent/JPH05206520A/en
Priority to US07/970,145 priority patent/US5306662A/en
Priority to EP92310132A priority patent/EP0541373B2/en
Priority to DE1992627170 priority patent/DE69227170T3/en
Publication of JPH05206520A publication Critical patent/JPH05206520A/en
Priority to US08/180,326 priority patent/US5468678A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To manufacture a low resistance P-type light-emitting element of purple color from blue color by a method wherein, after a P-impurity-doped II-VI compound semiconductor has been formed by a vapor growth method, an annealing treatment is conducted thereon at specific temperature or higher, or an electron beam irradiation is performed, and a cap layer is formed. CONSTITUTION:After P-impurity-doped II-VI compound semiconductor layer has been formed by a vapor growth method, it is annealed at the temperature higher than 300 deg.C. Also, after P-impurity-doped II-VI compound semiconductor layer has been formed, an electron beam is applied to the compound semiconductor layer. Besides, when an annealing treatment or an electron beam irradiation is conducted at 300 deg.C or higher, a cap layer may be formed on the P-impurity- doped II-VI compound semiconductor layer before conducting the above- mentioned treatment or operation for the purpose of suppressing the decomposition by heat of the II-VI compound semiconductor. The cap layer is a protective layer, and it can be formed into P-type of low resistance in reduced pressure or normal pressure.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は紫外、青色発光レーザー
ダイオード、紫外、青色発光ダイオード等の発光デバイ
スに利用されるp型II−VI族系化合物半導体の製造
方法に係り、詳しくは、気相成長法によりp型不純物を
ドープして形成したII−VI族化合物半導体層を低抵
抗なp型にする方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a p-type II-VI group compound semiconductor used in light emitting devices such as ultraviolet light emitting diodes, blue light emitting laser diodes, ultraviolet light emitting diodes, blue light emitting diodes, and the like. The present invention relates to a method for making a II-VI group compound semiconductor layer formed by doping a p-type impurity by a growth method into a p-type having a low resistance.

【0002】[0002]

【従来の技術】青色発光素子の候補の材料としてZnS
e、ZnS、CdS、CdSeなどのII−VI族化合
物半導体がある。従来、これらII−VI族材料はp型
を示す結晶を得ることが非常に困難なため、青色発光素
子を作る上で大きな問題であった。
2. Description of the Related Art ZnS is a candidate material for blue light emitting devices.
There are II-VI group compound semiconductors such as e, ZnS, CdS, and CdSe. Conventionally, it has been very difficult to obtain a p-type crystal from these II-VI group materials, which has been a major problem in producing a blue light emitting device.

【0003】II−VI族化合物半導体を積層する方法
として、有機金属化合物気相成長法(以下MOCVD法
という。)等の気相成長法がよく知られている。例え
ば、MOCVD法によりZnSeを成長する場合につい
て簡単に説明すると、この方法は、GaAs基板を設置
した反応容器内に反応ガスとして有機金属化合物ガス
{ジエチルジンク(DEZ)、セレン化水素(H2
e)等}を供給し、結晶成長温度をおよそ350℃の温
度に保持して、基板上にZnSeを成長させ、また必要
に応じて他の不純物ガスを供給しながらZnSe半導体
をn型、あるいはp型に積層する方法である。基板には
GaAs、ZnSeなどが一般的に用いられている。n
型不純物としてはClが良く知られており、p型不純物
としてはNが最もよく知られている。
As a method of stacking II-VI group compound semiconductors, a vapor phase growth method such as a metal organic compound vapor phase growth method (hereinafter referred to as MOCVD method) is well known. For example, the case of growing ZnSe by the MOCVD method will be briefly described. In this method, an organometallic compound gas {diethyl zinc (DEZ), hydrogen selenide (H 2 S) is used as a reaction gas in a reaction container in which a GaAs substrate is installed.
e) or the like}, the crystal growth temperature is maintained at a temperature of about 350 ° C. to grow ZnSe on the substrate, and other impurity gases are supplied as necessary to supply the ZnSe semiconductor with n-type or This is a p-type stacking method. GaAs, ZnSe, etc. are generally used for the substrate. n
Cl is well known as the type impurity, and N is most well known as the p type impurity.

【0004】しかしながら、II−VI族化合物半導体
を有する青色発光デバイスは未だ実用化には至っていな
い。なぜなら、II−VI族化合物半導体が低抵抗なp
型にできないため、ダブルへテロ、シングルへテロ等の
数々の構造の発光素子ができないからである。気相成長
法でp型不純物をドープしたII−VI族化合物半導体
を成長しても、得られたII−VI族化合物半導体は低
抵抗なp型とはならずに、抵抗率が約100Ω・cm以上
の高抵抗なp型となってしまうのが実状であった。
However, a blue light emitting device having a II-VI group compound semiconductor has not yet been put to practical use. Because the II-VI group compound semiconductor has a low resistance p
This is because it cannot be formed into a mold, and thus light emitting elements having various structures such as double hetero and single hetero cannot be formed. Even if a II-VI group compound semiconductor doped with a p-type impurity is grown by a vapor phase growth method, the obtained II-VI group compound semiconductor does not have a low resistance p-type, but has a resistivity of about 100 Ω. The reality is that the p-type has a high resistance of cm or more.

【0005】[0005]

【発明が解決しようとする課題】従って、本発明の目的
は、p型不純物をドープしたII−VI族化合物半導体
をさらに低抵抗なp型とし、実用的な発光素子を製作可
能とするp型II−VI族化合物半導体の製造方法を提
供するものである。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to make a II-VI group compound semiconductor doped with a p-type impurity into a p-type having a further lower resistance, thereby making it possible to manufacture a practical light-emitting device. The present invention provides a method for manufacturing a II-VI group compound semiconductor.

【0006】[0006]

【課題を解決するための手段】まず、本発明のp型II
−VI族化合物半導体の製造方法は、気相成長法によ
り、p型不純物をドープしたII−VI族化合物半導体
層を形成した後、300℃以上の温度でアニーリングを
行うを特徴とするものである。
First, the p-type II of the present invention is used.
A method of manufacturing a group-VI compound semiconductor is characterized in that after a II-VI group compound semiconductor layer doped with a p-type impurity is formed by a vapor phase growth method, annealing is performed at a temperature of 300 ° C. or higher. ..

【0007】アニーリング(Annealing:焼きなまし)
はp型不純物をドープしたII−VI族化合物半導体層
を形成した後、反応容器内で行ってもよいし、ウエハー
を反応容器から取り出してアニーリング専用の装置を用
いて行ってもよい。アニーリング雰囲気は真空中、
2、He、Ne、Ar等の不活性ガス、またはこれら
の混合ガス雰囲気中で行い、最も好ましくは、アニーリ
ング温度におけるII−VI族化合物半導体の分解圧以
上で加圧したII族ガス、VI族ガス、またはこれらの
混合ガス素雰囲気中で行う。なぜなら、II族またはV
I族ガス雰囲気として加圧することにより、アニーリン
グ中にII−VI族化合物半導体が分解することを防止
することができるからである。
Annealing
After forming the II-VI group compound semiconductor layer doped with the p-type impurity, the step may be performed in the reaction vessel, or the wafer may be taken out of the reaction vessel and used in an apparatus dedicated to annealing. The annealing atmosphere is in vacuum,
It is carried out in an inert gas atmosphere of N 2 , He, Ne, Ar or the like, or a mixed gas atmosphere thereof, and most preferably, a Group II gas or VI which is pressurized at a decomposition pressure of the II-VI group compound semiconductor or higher at the annealing temperature. It is performed in an atmosphere of a group gas or a mixed gas thereof. Because group II or V
This is because pressurization as a Group I gas atmosphere can prevent the II-VI group compound semiconductor from decomposing during annealing.

【0008】また、本発明はp型不純物をドープしたI
I−VI族化合物半導体層を形成した後、その化合物半
導体層に電子線照射をすることを特徴とするものであ
る。電子線照射は通常、加速電圧1kV〜30kVの範
囲で例えばSEM、EPMA等の電子線照射装置を用い
て行うことができる。
Further, the present invention is based on I doped with p-type impurities.
After forming the I-VI group compound semiconductor layer, the compound semiconductor layer is irradiated with an electron beam. The electron beam irradiation can usually be performed using an electron beam irradiation device such as SEM or EPMA within an acceleration voltage range of 1 kV to 30 kV.

【0009】さらに、300℃以上でアニーリング、ま
たは電子線照射をする場合、II−VI族化合物半導体
の熱による分解を抑える手段として、p型不純物をドー
プしたII−VI族化合物半導体層の上に、さらにキャ
ップ層を形成した後行ってもよい。キャップ層とは、即
ち保護膜であって、それをp型不純物をドープしたII
−VI族化合物半導体の上に形成することにより、加圧
下はいうまでもなく、減圧、常圧中においても、II−
VI族化合物半導体を分解させることなく低抵抗なp型
とすることができる。
Furthermore, when annealing or electron beam irradiation is performed at 300 ° C. or higher, as a means for suppressing thermal decomposition of the II-VI compound semiconductor, it is formed on the II-VI compound semiconductor layer doped with p-type impurities. Alternatively, it may be performed after forming the cap layer. The cap layer is a protective film which is doped with p-type impurities II
-By forming it on a Group VI compound semiconductor, not only under pressure but also under reduced pressure and normal pressure, II-
The group VI compound semiconductor can be made to have a low resistance p-type without being decomposed.

【0010】キャップ層を形成するには、p型不純物を
ドープしたII−VI族化合物半導体層を形成した後、
続いて反応装置内で形成してもよいし、また、ウエハー
を反応装置から取り出し、他の結晶成長装置、例えばプ
ラズマCVD装置等で形成してもよい。キャップ層の材
料としては、II−VI族化合物半導体の上に形成でき
る材料で、300℃以上で安定な材料であればどのよう
なものでもよく、好ましくはII−VI族化合物半導
体、Si34、SiO2を挙げることができ、アニーリ
ング温度により材料の種類を適宜選択する。また、キャ
ップ層の膜厚は通常0.01〜5μmの厚さで形成す
る。0.01μmより薄いと保護膜としての効果が十分
に得られず、また5μmよりも厚いと、アニーリング
後、キャップ層をエッチングにより取り除き、p型II
−VI族化合物半導体層を露出させるのに手間がかかる
ため、経済的ではない。
To form the cap layer, after forming a II-VI group compound semiconductor layer doped with p-type impurities,
Subsequently, it may be formed in the reaction apparatus, or the wafer may be taken out from the reaction apparatus and formed by another crystal growth apparatus such as a plasma CVD apparatus. The material of the cap layer may be any material that can be formed on a II-VI group compound semiconductor and is stable at 300 ° C. or higher, and is preferably a II-VI group compound semiconductor, Si 3 N 2. 4 , SiO 2 can be used, and the type of material is appropriately selected depending on the annealing temperature. The thickness of the cap layer is usually 0.01 to 5 μm. If it is thinner than 0.01 μm, the effect as a protective film is not sufficiently obtained, and if it is thicker than 5 μm, the cap layer is removed by etching after annealing, and p-type II
It is uneconomical because it takes time to expose the group VI compound semiconductor layer.

【0011】[0011]

【作用】図1は、p型不純物として窒素原子(N)をド
ープしたZnSe化合物半導体層が、アニーリングによ
って低抵抗なp型に変わることを示す図である。これ
は、MOCVD法を用いて、GaAs基板上にp型不純
物としてNH3を流しながらNをドープしてZnSe層
を4μmの膜厚で形成した後、ウエハーを取り出し、窒
素雰囲気中でアニーリング温度を変化させて、10分間
アニーリングを行った後、ウエハーのホール測定を行
い、抵抗率をアニーリング温度の関数としてプロットし
た図である。
FIG. 1 is a diagram showing that a ZnSe compound semiconductor layer doped with nitrogen atoms (N) as a p-type impurity is changed to a low-resistance p-type by annealing. This is done by using the MOCVD method to form a ZnSe layer with a film thickness of 4 μm by doping N on a GaAs substrate while flowing NH 3 as a p-type impurity, then taking out the wafer and setting the annealing temperature in a nitrogen atmosphere. FIG. 6 is a diagram in which the holes are measured on the wafer after being changed and annealed for 10 minutes, and the resistivity is plotted as a function of the annealing temperature.

【0012】この図からわかるように、300℃を越え
るあたりから急激にNをドープしたZnSe層の抵抗率
が減少し、400℃以上からはほぼ一定の低抵抗なp型
特性を示し、アニーリングの効果が現れている。なお、
アニーリングしないZnSe層と400℃以上でアニー
リングしたZnSe層のホール測定結果は、アニーリン
グ前のZnSe層は抵抗率600Ω・cm、ホールキャリ
ア濃度1×1015/cm3であったのに対し、アニーリン
グ後のZnSe層は抵抗率0.8Ω・cm、ホールキャリ
ア濃度1×1018/cm3であった。また、この図はZn
Seについて示した図であるが、同じくp型不純物をド
ープしたZnS、CdS、CdSeあるいはこれらの混
晶においても同様の結果が得られることが確かめられ
た。
As can be seen from this figure, the resistivity of the ZnSe layer doped with N sharply decreases from above 300 ° C., and from 400 ° C. or above, it shows a substantially constant p-type characteristic of low resistance, and the annealing The effect is appearing. In addition,
The hole measurement results of the ZnSe layer not annealed and the ZnSe layer annealed at 400 ° C. or higher showed that the ZnSe layer before annealing had a resistivity of 600 Ω · cm and a hole carrier concentration of 1 × 10 15 / cm 3 , but after annealing. ZnSe layer had a resistivity of 0.8 Ω · cm and a hole carrier concentration of 1 × 10 18 / cm 3 . This figure also shows Zn
Although it is a diagram showing Se, it was confirmed that similar results were obtained also in ZnS, CdS, CdSe similarly doped with p-type impurities, or a mixed crystal thereof.

【0013】さらに、400℃でアニーリングした上記
4μmのZnSe層をエッチングして2μmの厚さに
し、ホール測定を行った結果、ホールキャリア濃度1×
1018/cm3、抵抗率0.7Ω・cmであり、エッチング前
とほぼ同一の値であった。即ちp型不純物をドープした
ZnSe層がアニーリングによって、深さ方向均一に全
領域にわたって低抵抗なp型となっていた。
Further, the above ZnSe layer of 4 μm annealed at 400 ° C. was etched to a thickness of 2 μm, and hole measurement was performed. As a result, the hole carrier concentration was 1 ×.
The value was 10 18 / cm 3 and the resistivity was 0.7 Ω · cm, which were almost the same values as before etching. That is, the ZnSe layer doped with the p-type impurity was p-type with low resistance throughout the entire region uniformly in the depth direction by annealing.

【0014】また、上記のMOCVD法によって成長し
たNドープZnSe半導体膜を電子線照射装置に入れ、
加速電圧10kVで電子線照射を行った。電子線照射前
は、ZnSe層の抵抗率600Ω・cm、ホールキャリア
濃度1×1015/cm3であったのに対し、電子線照射後
のZnSe層の抵抗率0.8Ω・cm、ホールキャリア濃
度1×1018/cm3であった。
Further, the N-doped ZnSe semiconductor film grown by the MOCVD method is put in an electron beam irradiation apparatus,
The electron beam irradiation was performed at an acceleration voltage of 10 kV. Before the electron beam irradiation, the ZnSe layer had a resistivity of 600 Ω · cm and a hole carrier concentration of 1 × 10 15 / cm 3 , whereas the ZnSe layer after the electron beam irradiation had a resistivity of 0.8 Ω · cm and a hole carrier concentration. The density was 1 × 10 18 / cm 3 .

【0015】アニーリングまたは電子線照射により低抵
抗なp型II−VI族化合物半導体が得られる理由は以
下のとおりであると推察される。
The reason why a low resistance p-type II-VI compound semiconductor can be obtained by annealing or electron beam irradiation is presumed to be as follows.

【0016】即ち、II−VI族化合物半導体層の成長
において、p型ドーパントとしてのN源として、一般に
NH3が用いられており、成長中にこのNH3が分解して
原子状水素ができると考えられる。この原子状水素がア
クセプター不純物としてドープされたNと結合すること
により、Nがアクセプターとして働くのを妨げていると
考えられる。このため、反応後のN不純物をドープした
II−VI族化合物半導体は高抵抗を示す。
That is, in the growth of the II-VI group compound semiconductor layer, NH 3 is generally used as the N source as the p-type dopant, and during the growth, NH 3 is decomposed to form atomic hydrogen. Conceivable. It is considered that this atomic hydrogen binds with N doped as an acceptor impurity to prevent N from acting as an acceptor. Therefore, the II-VI group compound semiconductor doped with N impurities after the reaction has high resistance.

【0017】ところが、成長後アニーリングまたは電子
線照射を行うことにより、N−Hの形で結合している水
素が、アニーリングによる熱、あるいは電子線照射によ
る電子線誘起により解離されて、N不純物をドープした
II−VI族化合物半導体層から出て行き、正常にNが
アクセプターとして働くようになるため、低抵抗なp型
II−VI族化合物半導体が得られるのである。従っ
て、アニーリング雰囲気中にNH3、H2等の水素原子を
含むガスを使用することは好ましくない。
However, by performing annealing or electron beam irradiation after growth, hydrogen bonded in the form of NH is dissociated by heat by annealing or electron beam induction by electron beam irradiation to remove N impurities. The p-type II-VI group compound semiconductor having a low resistance can be obtained because it comes out of the doped II-VI group compound semiconductor layer and N normally functions as an acceptor. Therefore, it is not preferable to use a gas containing hydrogen atoms such as NH 3 and H 2 in the annealing atmosphere.

【0018】一方、電子線照射においても、加速電圧を
通常1kV〜30kVの範囲にして行う方が最も再現性
良く低抵抗化することができ、その効果も大きい。1k
Vよりも小さいと電子線のエネルギーが小さくなり、水
素原子を分離するのに十分なエネルギーが得られず解離
効果が不十分となる傾向にある。また30kVよりも大
きいと電子のエネルギーが非常に大きくなり、低いエミ
ッション電流でも試料温度が高くなりすぎて試料が分解
してしまい、これをコントロールすることが非常に難し
い。
On the other hand, also in the case of electron beam irradiation, it is most reproducible and the resistance can be lowered with the accelerating voltage usually in the range of 1 kV to 30 kV, and the effect is large. 1k
If it is smaller than V, the energy of the electron beam becomes small, and sufficient energy for separating hydrogen atoms cannot be obtained, and the dissociation effect tends to be insufficient. If it is higher than 30 kV, the energy of electrons becomes very large, and the sample temperature is too high even if the emission current is low, and the sample is decomposed, which is very difficult to control.

【0019】[0019]

【実施例】以下実施例で本発明を詳述する。The present invention will be described in detail with reference to the following examples.

【0020】[実施例1]まず、良く洗浄したGaAs
基板を反応容器内のサセプターに設置する。容器内を真
空排気した後、水素ガスを流しながら基板を600℃
で、10分間加熱し、表面の酸化物を除去する。その
後、温度を350℃にまで冷却し、350℃においてZ
n源としてDEZガスを4.0×10-6モル/分、Se
源としてH2Seガスを100×10-6モル/分、p型
ドーパントとしてN源としてNH3ガスを200×10
-6モル/分、キャリアガスとして水素ガスを2.0リッ
トル/分で流しながら、Nドープp型ZnSe層を60
分間で4μmの膜厚で成長させる。成長後p型ZnSe
のホール測定を行った結果は、抵抗率600Ω・cm、ホ
ールキャリア濃度1×1015/cm3と高抵抗であった。
[Example 1] First, GaAs cleaned well
Place the substrate on the susceptor in the reaction vessel. After the chamber is evacuated, the substrate is heated to 600 ° C while flowing hydrogen gas.
Then, heat for 10 minutes to remove the oxide on the surface. After that, the temperature is cooled to 350 ° C., and Z
DEZ gas as an n source is 4.0 × 10 −6 mol / min, Se
H 2 Se gas as a source is 100 × 10 −6 mol / min, and NH 3 gas is 200 × 10 as a N source as a p-type dopant.
-6 mol / min, while flowing hydrogen gas as a carrier gas at 2.0 liters / min, the N-doped p-type ZnSe layer 60
Grow with a film thickness of 4 μm per minute. After growth p-type ZnSe
The result of the hole measurement was that the resistivity was 600 Ω · cm and the hole carrier concentration was 1 × 10 15 / cm 3 , which was a high resistance.

【0021】次に、成長させたウエハーを反応容器から
取り出し、アニーリング装置に入れ、常圧、窒素雰囲気
中で400℃で20分間保持してアニーリングを行う。
アニーリングして得られたp型ZnSeのホール測定を
行った結果は、抵抗率0.8Ω・cm、ホールキャリア濃
度1×1018/cm3と優れたp型特性を示した。
Next, the grown wafer is taken out of the reaction container, placed in an annealing apparatus, and annealed by holding it at 400 ° C. for 20 minutes in a nitrogen atmosphere at atmospheric pressure.
The results of hole measurement of p-type ZnSe obtained by annealing showed excellent p-type characteristics with a resistivity of 0.8 Ω · cm and a hole carrier concentration of 1 × 10 18 / cm 3 .

【0022】[実施例2]実施例1において、成長させ
たウエハーを反応容器から取り出し、電子線照射装置に
入れ、加速電圧10kVで電子線照射を行った。電子線
照射をして得られたp型ZnSeのホール測定を行った
結果は、抵抗率0.7Ω・cm、ホールキャリア濃度1×
1018/cm3と優れたp型特性を示した。
Example 2 In Example 1, the grown wafer was taken out of the reaction container, placed in an electron beam irradiation apparatus, and irradiated with an electron beam at an acceleration voltage of 10 kV. Hole measurement of p-type ZnSe obtained by electron beam irradiation showed that the resistivity was 0.7 Ω · cm and the hole carrier concentration was 1 ×.
It exhibited excellent p-type characteristics of 10 18 / cm 3 .

【0023】[実施例3]実施例1において、Nドープ
ZnSe層を成長させた後、続いてキャップ層としてZ
nSe層を0.1μmの膜厚で成長させる。
[Embodiment 3] In Embodiment 1, after growing an N-doped ZnSe layer, Z is subsequently used as a cap layer.
The nSe layer is grown to a thickness of 0.1 μm.

【0024】実施例1と同様にアニーリング装置でアニ
ーリングを行う。その後、エッチングにより、表面から
0.2μmの層を取り除き、キャップ層を除去してp型
ZnSe層を露出させ、同様にホール測定を行った結
果、抵抗率0.6Ω・cm、キャリア濃度3×1018/cm3
と優れたp型特性を示した。
Annealing is performed by an annealing apparatus as in the first embodiment. Then, by etching, a layer of 0.2 μm was removed from the surface, the cap layer was removed to expose the p-type ZnSe layer, and hole measurement was performed in the same manner. 10 18 / cm 3
And showed excellent p-type characteristics.

【0025】[実施例4]実施例1において、Nドープ
ZnSe層を成長させた後、ウエハーを反応容器から取
り出し、プラズマCVD装置を用い、その上にキャップ
層としてSiO2層を0.2μmの膜厚で形成する。
Example 4 In Example 1, after the N-doped ZnSe layer was grown, the wafer was taken out of the reaction vessel and a SiO 2 layer of 0.2 μm was formed as a cap layer on the wafer using a plasma CVD apparatus. It is formed with a film thickness.

【0026】その後、実施例2と同じく加速電圧15k
Vで、電子線を走査しながらウエハー全体に電子線照射
を行う。その後、フッ酸でSiO2キャップ層を取り除
き、p型ZnSe層を露出させ、同様にホール測定を行
った結果、抵抗率0.6Ω・cm、キャリア濃度2.0×
1018/cm3と優れたp型特性を示した。
Thereafter, the acceleration voltage is 15 k as in the second embodiment.
At V, electron beam irradiation is performed on the entire wafer while scanning the electron beam. After that, the SiO 2 cap layer was removed with hydrofluoric acid, the p-type ZnSe layer was exposed, and the hole measurement was performed in the same manner. As a result, the resistivity was 0.6 Ω · cm and the carrier concentration was 2.0 ×.
It exhibited excellent p-type characteristics of 10 18 / cm 3 .

【0027】[0027]

【発明の効果】以上述べたように本発明の方法による
と、従来p型不純物をドープしても低抵抗なp型となら
なかったII−VI族化合物半導体を低抵抗なp型とす
ることができるため、数々の構造の青色から紫色発光素
子をII−VI族化合物半導体を使用して製造すること
が可能となり産業上メリットは計り知れない。
As described above, according to the method of the present invention, a II-VI group compound semiconductor which has not been a p-type having a low resistance even when doped with a p-type impurity is made a p-type having a low resistance. Therefore, it is possible to manufacture blue to violet light emitting devices having various structures using II-VI group compound semiconductors, and the industrial advantage is immeasurable.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の一実施例によるアニーリング温度と
抵抗率の関係を示す図。
FIG. 1 is a diagram showing a relationship between an annealing temperature and a resistivity according to an embodiment of the present invention.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 気相成長法により、p型不純物をドープ
したII−VI族化合物半導体を形成した後、300℃
以上の温度でアニーリングを行うことを特徴とするp型
II−VI族化合物半導体の製造方法。
1. A II-VI group compound semiconductor doped with a p-type impurity is formed by a vapor phase epitaxy method, and then 300 ° C.
A method for manufacturing a p-type II-VI group compound semiconductor, which comprises performing annealing at the above temperature.
【請求項2】 気相成長法により、p型不純物をドープ
したII−VI族化合物半導体を形成した後、電子線照
射を行うことを特徴とするp型II−VI族化合物半導
体の製造方法。
2. A method for producing a p-type II-VI compound semiconductor, which comprises irradiating an electron beam after forming a II-VI compound semiconductor doped with a p-type impurity by a vapor phase growth method.
【請求項3】 前記アニーリングは、そのアニーリング
温度におけるII−VI族化合物半導体の分解圧以上に
加圧したII族またはV族ガスまたはII族とV族ガス
の混合ガス雰囲気中で行うことを特徴とする請求項1に
記載のp型窒化ガリウム系化合物半導体の製造方法。
3. The annealing is performed in a group II or group V gas or a mixed gas atmosphere of group II and group V gas pressurized at a pressure equal to or higher than the decomposition pressure of the group II-VI compound semiconductor at the annealing temperature. The method for producing a p-type gallium nitride compound semiconductor according to claim 1.
【請求項4】 前記p型不純物をドープしたII−VI
族化合物半導体の上に、さらにキャップ層を形成するこ
とを特徴とする請求項1ないし2に記載のp型II−V
I族化合物半導体の製造方法。
4. II-VI doped with the p-type impurity
The p-type II-V according to claim 1 or 2, further comprising a cap layer formed on the group compound semiconductor.
Method of manufacturing group I compound semiconductor.
【請求項5】 前記キャップ層はII−VI族化合物半
導体、Si34、SiO2より選択されたいずれか一種
の材料よりなることを特徴とする請求項4に記載のp型
II−VI族化合物半導体の製造方法。
5. The p-type II-VI according to claim 4, wherein the cap layer is made of a material selected from the group consisting of II-VI group compound semiconductors, Si 3 N 4 and SiO 2. Group compound semiconductor manufacturing method.
JP4028092A 1991-11-08 1992-01-29 Manufacture of p-type ii-vi compound semiconductor Pending JPH05206520A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP4028092A JPH05206520A (en) 1992-01-29 1992-01-29 Manufacture of p-type ii-vi compound semiconductor
US07/970,145 US5306662A (en) 1991-11-08 1992-11-02 Method of manufacturing P-type compound semiconductor
EP92310132A EP0541373B2 (en) 1991-11-08 1992-11-05 Method of manufacturing p-type compound semiconductor
DE1992627170 DE69227170T3 (en) 1991-11-08 1992-11-05 Process for the production of P-type compound semiconductors
US08/180,326 US5468678A (en) 1991-11-08 1994-01-12 Method of manufacturing P-type compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4028092A JPH05206520A (en) 1992-01-29 1992-01-29 Manufacture of p-type ii-vi compound semiconductor

Publications (1)

Publication Number Publication Date
JPH05206520A true JPH05206520A (en) 1993-08-13

Family

ID=12576207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4028092A Pending JPH05206520A (en) 1991-11-08 1992-01-29 Manufacture of p-type ii-vi compound semiconductor

Country Status (1)

Country Link
JP (1) JPH05206520A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6897138B2 (en) 2001-06-25 2005-05-24 Toyoda Gosei Co., Ltd. Method and apparatus for producing group III nitride compound semiconductor
US7029939B2 (en) 2001-06-18 2006-04-18 Toyoda Gosei Co., Ltd. P-type semiconductor manufacturing method and semiconductor device
US7112243B2 (en) 2001-07-23 2006-09-26 Toyoda Gosei Co., Ltd. Method for producing Group III nitride compound semiconductor
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
US7029939B2 (en) 2001-06-18 2006-04-18 Toyoda Gosei Co., Ltd. P-type semiconductor manufacturing method and semiconductor device
US6897138B2 (en) 2001-06-25 2005-05-24 Toyoda Gosei Co., Ltd. Method and apparatus for producing group III nitride compound semiconductor
US7112243B2 (en) 2001-07-23 2006-09-26 Toyoda Gosei Co., Ltd. Method for producing Group III nitride compound semiconductor

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