JPH05205055A - Image recognizing device - Google Patents

Abstract

PURPOSE:To detect an identification pattern at real time by judging whether a graphic to which picture elements belong is suitable for the condition of a pattern to be identified or not based on distance data corresponding to plural measuring directions decided with picture elements as origins. CONSTITUTION:Video signals SI are converted to binary data S4 through an A/D conversion circuit 3 and a binarizing circuit 4 and supplied to a distance measuring part 6 by directions, and the binary data S4 are inputted to distance measuring circuit 6A-6H. These circuits 6A-6H count and output how many picture elements are continued in an area concerning the respective measuring directions of attention picture elements from an encoder. Namely, the circuits 6A-6H weight encoder outputs, correct the gaps between adjacent picture elements in the measuring directions and supply the results to a condition judge part 7 as distance data S6A-S6H. When distances from the attention picture element to the adjacent measuring directions are coincident, as a write enable signal, a candidate picture element detecting signal S10 is outputted from the judge part 7 to a buffer circuit 14.

Description

Detailed Description of the Invention

[0001]

[Table of Contents] The present invention will be described in the following order. Field of Industrial Application Conventional Technology Problem to be Solved by the Invention Means for Solving the Problem (FIGS. 1, 4 and 6) Action (FIGS. 2, 3 and 5) Example (FIGS. 1 to 1) 9) Effect of the invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image recognition device, and is suitable for application to, for example, a device for recognizing an image matching the shape of a fingertip from a binary image.

[0003]

2. Description of the Related Art Conventionally, for example, when it is desired to identify a circular object or fingertip from an image pickup screen imaged by a video camera, a binary image obtained by binarizing a video signal is compared with a specific template figure, The position of the figure designated by the user is determined based on the degree of similarity.

Here, the template figure is function data determined in correspondence with a predetermined size and a predetermined direction with respect to a certain shape. For example, in the case of a circular shape, a plurality of template functions are set for different radii. It is done like this.

In the case of the same fingertip shape, a plurality of template functions given by different function data are set corresponding to the finger size and the direction in which the fingertip faces.

In the conventional image recognition processing, a plurality of template figures corresponding to the shape designated by the user are sequentially compared with the binary image to determine whether they match the template figure, and to what extent if they do not match. The image is recognized by determining whether they overlap, and an image that substantially matches the template figure is recognized as the designated image.

[0007]

However, if the number of objects to be recognized or the search range is expanded by this image recognition method, the number of template functions, the search range, and the like increase accordingly, and therefore it is necessary to determine whether or not there is a match. There is a problem that the amount of calculation increases and the recognition process is delayed.

Similarly, if the orientation of the template graphic is increased to improve the search capability, the number of template functions increases correspondingly, and the amount of calculation required to determine the match / mismatch increases, resulting in a delay in processing. It was As a result, there is a problem that the processing apparatus using the image recognition method becomes large in size, especially when the image recognition processing needs to be executed in real time.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose an image recognition apparatus capable of performing real-time image recognition processing with a simpler structure than conventional ones.

[0010]

In order to solve such a problem, according to the present invention, a binarization circuit 4 for converting an input image S1 into binary data S4 for each pixel and outputting the binary data S4, and a binary data S4. Each time it is sequentially input, the distance d from the target pixel P0 corresponding to the binary data S4 to the boundary of the figure including the target pixel P0 is set to a plurality of preset measurement directions V1 to V8 with the target pixel P0 as a starting point. For each,
Distance measuring means 6 for outputting distance data d1 to d8
And determination means 7 for determining whether or not the figure to which the target pixel P0 belongs conforms to the conditions of the pattern to be identified based on the distance data d1 to d8 in the respective measurement directions V1 to V8.

[0011]

The distances d1 to d8 from the target pixel P0 to the boundaries of the plurality of measurement directions V1 to V8 set in advance are sequentially obtained for each target pixel P0, and the distances are set to the predetermined conditions determined for each pattern to be identified. When the data d1 to d8 match, it is determined that the figure to which the pixel of interest P0 belongs matches the pattern to be identified, so that the pattern is matched from the input image S1 to the pattern to be identified in a much simpler configuration and in a much shorter time than before. Can recognize figures.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail with reference to the drawings.

In FIG. 1, reference numeral 1 denotes an image recognizing device as a whole, which sequentially converts a video signal S1 of a picked-up image picked up by a video camera 2 into an analog / digital conversion circuit (hereinafter referred to as A).
/ D conversion circuit) 3.

The A / D conversion circuit 3 sequentially converts the video signal S1 into digital data S2 and outputs the digital data S2 to the binarization circuit 4, and at the same time, a sync signal S3 including vertical and horizontal sync signals.
Is output to the coordinate generation circuit 5.

Upon receiving the digital data S2, the binarization circuit 4 determines whether or not the pixel is an ARI pixel in the graphic area based on whether or not the brightness level is higher than a predetermined reference level, and the pixel data in the area is determined. Is set to the logic "1", and the pixel data outside the graphic area (that is, the background area) ARO is set to the logic "0".
4 is output (FIG. 2).

Here, the coordinate generation circuit 5 determines the x-coordinate and the y-coordinate of the pixel corresponding to the digital data S2 based on the synchronization signal S3, and outputs it as coordinate data S5.

The direction-dependent distance measuring unit 6 has eight distance measuring circuits 6A, 6B, ... 6H respectively corresponding to eight measuring directions V (V1, V2 ... V8), and has an ARI in the graphic area.
From the pixel of interest P0 of
(D1, d2 ... d8) is obtained for each measurement direction V and is output to the condition determination unit 7 as distance data S6 (FIG. 3).

That is, the distance measuring circuit 6A measures the distance d1 in the measuring direction V1 which coincides with the positive direction of the y-axis with the distance data S6.
The distance measurement circuit 6B outputs the distance d2 to the measurement direction V2 having an angle of 45 ° with the positive directions of the x-axis and the y-axis as distance data S6B. ...... 6H is the measurement direction V
The distances d3, d4 ... d8 to 3, V4 ... V8 are output as distance data S6C, S6D ... S6H.

Here, each distance measuring circuit 6A, 6B ... 6H
As shown in FIG. 4, when the binarized data S4 is inverted via the inverter circuit 8 (8A, 8B ... 8H), the inverted signal S70 which has been inverted is delayed by the delay unit 9 (9A, 9B ... 9H).
H), and delay signals S71 to S77
Is supplied to the encoder 10 (10A, 10B ... 10H).

The delay unit 9 (9A, 9B ... 9H) is composed of 7 stages of delay circuits 91, 92 ... 97 connected in series, and each of the delay circuits 91, 92 ... 97 has an input signal S7.
0, S71 ... S76 are delayed by the time required for scanning between adjacent pixels in the measurement direction V, and delay signals S71, S
72 ... Outputs as S77.

As a result, the encoder 10 (10A, 10A, 10A
The input port of B ... 10H) has eight pixels P (P0, P1 ...) Located on the intersection of each measurement direction V and the scanning line.
Digital data of P7) is simultaneously recorded by encoder 10 (1
0A, 10B ... 10H) (Fig. 5).

Incidentally, the inversion signal S70 corresponds to the pixel value of the pixel of interest P0 which is currently attracting attention, and the delay signals S71 to S71.
Reference numerals 77 correspond to the pixel values of the pixels P1, P2, ... P7 arranged in order in the measurement direction V, respectively.

Encoder 10 (10A, 10B ... 10)
H) is a logical value of the digital data corresponding to the pixels P0, P1, ... P7, which have a higher priority in the order of the pixel P1, P2, ... The number of consecutive logic "0" s is calculated, and the number of pixels is calculated by the weighting circuit 11 (11A, 11B ... 1).
1H).

Incidentally, since the logical value of the digital data corresponding to the pixels P0, P1 ... P7 is inverted via the inverter circuit 8, the logic "0" means the pixel of the ARI in the graphic area and the logic "1". Means a pixel outside the graphic area ARO.

When the pixel value of the target pixel P0 is logical "0", the encoder 10 outputs "0" as the output value of the encoder output S8, and the pixel value of the target pixel P0 is logical "1". When the pixel value of the adjacent pixel P1 is logical “0”, “1” is output as the output value of the encoder output S8, and when the pixel of interest P0 is set as the starting point, the pixel value is continuously logical. The number of pixels that become "0" is counted and output as an encoder output S8.

Weighting circuit 11 (11A, 11B ... 11)
H) is the encoder 10 obtained for each measurement direction V
The encoder output S8 of (10A, 10B ... 10H) is converted into a distance d (d1, d2 ... d8) by multiplying the encoder output S8 by a constant based on the ratio of the adjacent pixel intervals between the measurement directions V, and the distance data S6. (S6A, S6B ... S6H) is output to the condition determination unit 7.

The condition judging section 7 judges from the eight distance data S6 whether or not the pixel of interest P0 which is currently focused on is a candidate of a representative point or a characteristic point of a specific pattern to be discriminated at the video rate, The determination result is output. That is, the condition determination unit 7 outputs a logic "1" when the distance data S6 matches the conditions adapted to the specific pattern, and outputs a logic "0" when the distance data S6 does not match.

In the case of this embodiment, the specific pattern is assumed to be a semicircular pattern, and the condition judging section 7 recognizes a figure that substantially matches the semicircular pattern from the image on the screen.

Here, as shown in FIG. 6, the condition judging section 7 starts from the pixel of interest P0 and measures eight measuring directions V (V1, V2 ...
Each distance d (d1, d2 ... d to the boundary to V8)
8) The distance data S6A, S6B ... S6H representing four adjacent measuring directions (V1 to V4), (V2 to V4)
5), (V3 to V6) ... Distance data (S6A to S6D) and (S6B to S6) representing the distance d to (V8 to V3).
E), (S6C to S6F) ... (S6H to S6C) 8
It is supplied to each of the logic circuits 12A, 12B ... 12H.

Here, the logic circuits 12A, 12B ... 12H
Are four adjacent measurement directions (V1 to V4), (V2 to
V5), (V3 to V6) ... Distance d to (V8 to V3)
Output signals S9A of logic "1" when
S9B ... S9H is output and supplied to the OR circuit 13.

The OR circuit 13 is a logic circuit 12A, 12B.
... When any one of 12H rises to a logic "1", that is, when an image matching the semicircle pattern in any direction around the pixel of interest P0 is recognized, the logic output rises to a logic "1". As a result, the OR circuit 13
Is a candidate pixel detection signal S which rises to logic "1" when the target pixel P0 near the center pixel of the semicircle pattern is discriminated.
10 is output to the buffer circuit 14.

The buffer circuit 14 is adapted to store the candidate coordinates of the representative point of the specific pattern detected by the scanning of the screen every time, and to supply the candidate coordinate data S11 to the representative point detecting circuit 15. There is. Here, the buffer circuit 14 uses the candidate pixel detection signal S10 as a write enable signal, and when it rises to the logic "1", the coordinate data S5 provided from the coordinate generation circuit 5 is counted by the counter 16.
It is designed to write to the address given more.

Incidentally, the counter 16 counts the input candidate pixel detection signal S10 as a clock pulse,
The address signal S12 is supplied to the buffer circuit 14. When the representative point detection circuit 15 reads out the candidate coordinates from the address given by the read enable signal S13 and the address signal S14, the centers of the plurality of candidate coordinates are obtained and the coordinates of the center are represented by the representative point coordinate data S1.
It is designed to output as 5.

Here, the candidate coordinate data S11 of the candidate points input to the representative point detection circuit 15 is significantly compressed in comparison with the number of pixels of the entire screen, and thus is centered in a much shorter time than in the conventional case. The coordinates can be detected.

In the above configuration, when the center of the semicircular pattern of the semicircular shape is searched from the image pickup screen imaged by the video camera 2, the image recognition device 1 outputs the video signal S1 as A /
The D conversion circuit 3 and the binarization circuit 4 are sequentially converted into binarized data S4 and supplied to the direction-dependent distance measuring unit 6.

The direction-dependent distance measuring unit 6 uses the binarized data S4.
Is input to each of the distance measuring circuits 6A, 6B ... 6H. At this time, the distance measuring circuits 6A, 6B ...
From 0A, 10B ... 10H, the number of consecutive pixels in the area from the pixel of interest P0 for each measurement direction V1, V2, ... V8 (that is, the number of consecutive points of logic “0”) is counted, The count value is output as the encoder output S8.

The distance measuring circuits 6A, 6B, ... 6H are provided with encoders 10 by weighting circuits 11A, 11B, ... 11H.
The distances S6A, S6B ... S between the adjacent pixels between the measurement directions V are corrected by weighting the encoder outputs S8 from A, 10B.
6H is supplied to the condition determination unit 7.

At this time, the condition determining section 7 determines that the four adjacent measurement directions, for example, the measurement directions V1, V2, V3, and V4, when the distances from the target pixel P0 are substantially equal to each other, the logic circuit 1 is detected.
The output of 2A is set to logic "1", and the candidate pixel detection signal S10 is output to the buffer circuit 14 as a write enable signal. Therefore, compared to the case where the input image is applied to the template function one by one, it can be configured with simple hardware,
The input image can be processed in real time.

Here, the buffer circuit 14 determines the target pixel P0.
A candidate pixel detection signal S10 which rises to logic "1" every time a figure having a substantially equal distance d from the boundary to the boundary is detected is input to the write enable signal input end, and the address searched by the counter 16 is searched as a candidate pixel. The coordinate data S5 of the pixel P0 is stored.

At this time, the buffer circuit 14 detects a plurality of candidate data for one corresponding pattern and stores it as a candidate data group at a predetermined address. Further, the buffer circuit 14 stores a plurality of candidate data groups for a plurality of corresponding patterns at the addresses corresponding to the respective candidate coordinates. As a result, the buffer circuit 14 stores the candidate data that is significantly compressed with respect to the number of input pixels.

When the representative point detecting circuit 15 finds the center of gravity for each of the plurality of candidate data groups, it outputs the coordinate data as the representative point coordinate data S15 as the representative point of the figure having the semicircular pattern.

According to the above configuration, the distance to the figure boundary of each pixel input as a binary image is sequentially obtained in eight measurement directions V1 to V8 due to the pixel of interest P0, and
When the distances to the four adjacent measurement directions among the distances d1 to d8 in the one measurement direction V1 to V8 are substantially the same, the target pixel P0 is set as the center of gravity candidate point of the candidate figure that matches the semicircle pattern, and these center of gravity candidates are set. By outputting the barycentric coordinates of the points as the coordinates of the representative points of each semicircular pattern, it is possible to easily obtain an image recognition device that can recognize the semicircular pattern included in the screen in real time with a simple configuration.

In the above embodiment, the case where the semicircular pattern is detected as the detection pattern to be detected from the input image has been described, but the present invention is not limited to this, and the direction opposite to the semicircular pattern (P4 to P7). Only the measurement distance d1 to (P1) is longer than the distances d4 to d7 to the circumference (FIG. 7), and the measurement distances d1 to d8 from the target pixel P0 to each measurement direction V1 to V8 are It can be widely applied to the case of recognizing a figure such as a pattern of circles (FIG. 8) that all match.

Further, in the above embodiment, the case where the condition judging section 7 is configured as shown in FIG. 6 has been described.
The present invention is not limited to this, and may be configured by a read only memory as shown in FIG. In this case, if the measured distances d1 to d8 in the eight measuring directions V1 to V8 are expressed by the distance data of 3 bits, the input can be completed with 24 bits, and the read only memory of 16 [Mbit] having 2 ²⁴ bit cells. Can be configured as.

Further, in the above-described embodiment, the case where eight measurement directions V1 to V8 radially arranged at equal intervals are used as the measurement directions measured by the direction-dependent distance measuring unit 6 have been described. The present invention is not limited to this, and can be widely applied to the case of using eight measurement directions V1 to V8 that are unevenly arranged.

Further, in the above-described embodiment, the case where eight measurement directions V1 to V8 radially arranged at equal intervals are used as the measurement directions measured by the direction-dependent distance measuring unit 6 have been described. The number of measurement directions is not limited to this, and can be widely applied when four measurement directions V1 to V4 are used or when 16 measurement directions V1 to V16 are used.

Further, in the above-described embodiment, the coordinate generation circuit 5 obtains the coordinate value of the pixel of the pixel of interest P0 corresponding to the currently input digital data S2 and outputs the coordinate value as the coordinate data S5. However, the present invention is not limited to this, and in the case where a delay corresponding to a plurality of video clocks occurs in the processing in the binarization circuit 4, the direction-based distance measurement unit 6 and the condition determination unit 7, this delay time You may make it provide the delay means to compensate.

Further, in the above embodiment, the case where the binarization circuit 4 outputs the pixel value of the graphic area as the logic "1" and the pixel value of the background area as the logic "0" has been described. The present invention is not limited to this, and can be applied to the case of outputting with the opposite logical value.

Further, in the above-mentioned embodiment, the case where the barycentric coordinates of the candidate coordinate data S11 of the candidate points obtained by the condition judging section 7 are obtained by the representative point detecting circuit 15 has been described. The present invention can be widely applied even when the representative point detection circuit 15 is not used.

[0050]

As described above, according to the present invention, for each target pixel, distance data representing the distance to the figure boundary in each of a plurality of measurement directions determined from the target pixel is determined, and based on the distance data. By determining whether or not the figure to which the pixel of interest belongs matches the conditions of the pattern to be identified, it is possible to detect the desired identification pattern from the input image in real time with a simpler configuration than the conventional case. it can.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an image recognition apparatus according to the present invention.

FIG. 2 is a schematic diagram for explaining a graphic area and a background area.

FIG. 3 is a schematic diagram for explaining a measurement direction.

FIG. 4 is a schematic diagram for explaining a distance measuring circuit.

FIG. 5 is a schematic diagram for explaining a process of detecting a measurement distance in each measurement direction.

FIG. 6 is a logic circuit diagram showing a configuration of a condition determination unit.

FIG. 7 is a schematic diagram for explaining another embodiment.

FIG. 8 is a schematic diagram for explaining another embodiment.

FIG. 9 is a schematic diagram used to describe another embodiment of the condition determination unit.

[Explanation of symbols]

1 ... Image recognition device, 2 ... Video camera, 3 ... Analog / digital conversion circuit, 4 ... Binarization circuit, 5 ...
Coordinate generating circuit, 6 ... Distance measuring unit for each direction, 6A to 6H ...
... Distance measuring circuit, 7 ... Condition determination unit, 10 ... Encoder, 11 ... Weighting circuit, 12 ... Logic circuit, 14 ... Buffer circuit, 15 ... Representative point detection circuit.

Claims (1)

[Claims] 1. A binarization circuit for converting an input image into binary data for each pixel and outputting the binary data, and each time the binary data is sequentially input, the pixel of interest corresponding to the binary data is selected. The distance to the boundary of the figure including the pixel is obtained for each of a plurality of preset measurement directions starting from the pixel of interest, and is output as distance data based on distance measurement means and distance data in each of the measurement directions. And an image recognizing device to which the figure to which the pixel of interest belongs conforms to the condition of the pattern to be identified.