JPH05203977A - Electrooptical display device - Google Patents
Electrooptical display deviceInfo
- Publication number
- JPH05203977A JPH05203977A JP4230198A JP23019892A JPH05203977A JP H05203977 A JPH05203977 A JP H05203977A JP 4230198 A JP4230198 A JP 4230198A JP 23019892 A JP23019892 A JP 23019892A JP H05203977 A JPH05203977 A JP H05203977A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- active matrix
- polycrystalline silicon
- silicon film
- peripheral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明のソーダガラス、ホウケイ
酸ガラス、あるいは石英等の透明基板上に少なくとも多
結晶シリコンあるいはアモルファスシリコンを主構成部
材としてなるアクティブマトリクス基板に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate which comprises at least polycrystalline silicon or amorphous silicon as a main constituent member on a transparent substrate such as soda glass, borosilicate glass or quartz.
【０００２】[0002]
【従来の技術】近年平板型液晶ディスプレーは腕時計、
電卓、玩具を始めとして自動車、計測器、情報機器端末
へと応用分野が拡大されつつあり、特に最近においては
半導体集積回路技術によってｓｉ基板上へステッチング
用トランジスタ回路をマトリクス状に形成しこのｓｉ基
板と透明ガラス板間に液晶を封入したテレビ画像表示用
の液晶ディスプレーパネルが開発されている。2. Description of the Related Art In recent years, flat panel liquid crystal displays have been
The field of application is expanding to calculators, toys, automobiles, measuring instruments, and information equipment terminals. In particular, recently, semiconductor integrated circuit technology has been used to form stitching transistor circuits in a matrix on a si substrate. A liquid crystal display panel for displaying television images, in which liquid crystal is enclosed between a substrate and a transparent glass plate, has been developed.
【０００３】アクティブマトリクス方式で液晶パネルを
構成した例では前記単結晶ｓｉ基板を用いたものやガラ
ス基板上に薄膜トランジスタを形成したもの及びバリス
タ基板を用いたものなどが既に報告されているが中でも
大型パネル化ならびにコスト面から前記ガラス基板上に
薄膜トランジスタを形成してなるアクティブマトリクス
基板は将来有望な方式と考えられている。In the example of the liquid crystal panel constructed by the active matrix system, the one using the single crystal si substrate, the one having the thin film transistor formed on the glass substrate, and the one using the varistor substrate have been already reported. From the viewpoint of panelization and cost, an active matrix substrate formed by forming a thin film transistor on the glass substrate is considered to be a promising system in the future.
【０００４】従来ガラス基板上に多結晶シリコン等を堆
積して形成される薄膜トランジスタは基板に対する熱制
約から低温プロセスを用いざるを得ないことは周知の通
りである。しかし前記薄膜トランジスタを用いてのアク
ティブマトリクス基板の場合アクティブマトリクス回路
はともかくとして周辺駆動回路は高周波動作を要求され
るため少なくとも移動度は単結晶シリコンに近いもので
なくてはならない。そのため周辺駆動回路は単結晶シリ
コン基板上に形成し、アクティブマトリクス基板にいわ
ゆる外ずけすることが一般的である。It is well known that a thin film transistor conventionally formed by depositing polycrystalline silicon or the like on a glass substrate has to use a low temperature process due to thermal restrictions on the substrate. However, in the case of an active matrix substrate using the thin film transistor, the peripheral drive circuit is required to operate at high frequency, not to mention the active matrix circuit, so that at least the mobility must be close to that of single crystal silicon. Therefore, it is general that the peripheral drive circuit is formed on a single crystal silicon substrate and is so-called externally arranged on the active matrix substrate.
【０００５】[0005]
【発明が解決しようとする課題】しかし、従来の前記方
式では周辺駆動回路基板の製造費は勿論のことアクティ
ブマトリクス基板への外ずけ費用を含めると当然の事な
がら大幅なコストアップにつながることは言うまでもな
い。又基板材として石英基板のように耐熱性を有する材
を用いてアクティブマトリクス基板を形成した場合は１
０００℃以上の高温プロセスも可能となるため周辺駆動
回路を内蔵したアクティブマトリクス基板の製造は可能
となる。However, in the above-mentioned conventional method, not only the manufacturing cost of the peripheral drive circuit substrate but also the cost of the outlying of the active matrix substrate naturally leads to a significant cost increase. Needless to say. When the active matrix substrate is formed by using a heat resistant material such as a quartz substrate as the substrate material, 1
Since a high temperature process of 000 ° C. or higher is also possible, it becomes possible to manufacture an active matrix substrate incorporating a peripheral drive circuit.
【０００６】しかし、ここで一つ問題となるのは光リー
クについてである。本来平板液晶ディスプレーは携帯用
かつ野外用としての利用価値が大きく当然の事ながら太
陽光の下での使用頻度が多くなる。However, one problem here is the light leakage. Originally, the flat panel liquid crystal display has great utility value for both portable and outdoor use, and as a matter of course, it is frequently used in sunlight.
【０００７】アクティブマトリクスＩＣ基板は直接太陽
光が表示面を照射するためにＩＣ基板内にも光が入射す
る。ＩＣ基板内への入射光は電子と正孔を発生させ基板
内に拡散しＰ−Ｎ接合部に到達するとＰ−Ｎ接合部に電
流が流れてしまう。すなわちこの光起電力効果はトラン
ジスタのソースドレインのＰ−Ｎ接合部にリーク現象を
引き起こし、正しい画像表示が得られなくなり、画像が
ちらついたり消えたりする。このため前記光リーク現象
を押えるための一手段としては基板の移動度を小さくし
リーク電流の低減を計ることであり、前述の如くアクテ
ィブマトリクス回路においてはそれがある程度可能であ
るからである。[0007] In the active matrix IC substrate, sunlight directly illuminates the display surface, so that light also enters the IC substrate. The incident light into the IC substrate generates electrons and holes, diffuses into the substrate, reaches the PN junction, and a current flows through the PN junction. That is, this photovoltaic effect causes a leak phenomenon in the P-N junction portion of the source and drain of the transistor, a correct image display cannot be obtained, and the image flickers or disappears. Therefore, one means for suppressing the light leak phenomenon is to reduce the mobility of the substrate to reduce the leak current, which is possible to some extent in the active matrix circuit as described above.
【０００８】しかしながら前記高温プロセスは石英基板
上の多結晶シリコン全体を結晶化させることになり、当
然移動度が高くなり、光リークが増加し好ましい構造と
はいえない。However, the high temperature process causes the entire polycrystalline silicon on the quartz substrate to be crystallized, which naturally increases the mobility and increases the light leakage, which is not a preferable structure.
【０００９】又近来は周知の如くレーザー光あるいはＥ
Ｂ（エレクトロンビーム）を用いて無定型あるいは多結
晶のシリコン画に照射することにより、結晶化をはかっ
たり、あるいはイオン照射時のダメージを消去する技術
が開発されてきている。As is well known, laser light or E
A technique has been developed for irradiating an amorphous or polycrystalline silicon image with B (electron beam) for crystallization or eliminating damage at the time of ion irradiation.
【００１０】中でもレーザー加熱にはＣＷアルゴンレー
ザー、ＣＷクリプトンレーザー、パルスＹＡＧレーザ
ー、ＣＷ励起ＹＡＧレーザーなど種々の方式があり出
力、エネルギーあるいはスポット径をはじめとして生産
性安定性に至るまで構造上、動作上の本質的な違いを有
しており、目的による選択も重要な要素となる。Among them, there are various methods for laser heating such as CW argon laser, CW krypton laser, pulse YAG laser, and CW pumped YAG laser. Structurally, operation such as output, energy or spot diameter and stability of productivity are performed. It has the above essential differences, and selection by purpose is also an important factor.
【００１１】このレーザ光を利用してのレーザーアニー
ル技術を用いれば、例えばガラス基板上に周辺駆動回路
を内蔵したアクティブマトリクス基板にレーザーアニー
ルし全体に移動度を高めることは可能となる。しかしレ
ーザーアニール効果はスポット径と照射時間によりスル
ープットが決定されるため基板全体にレーザーアニール
加工を行なうと例えば１時間当たりの生産性は基板数枚
程度と小量であり効率の極めて悪い工程となってしま
う。If the laser annealing technique utilizing this laser light is used, it is possible to increase the overall mobility by laser annealing, for example, an active matrix substrate having a peripheral driving circuit built in on a glass substrate. However, since the throughput of the laser annealing effect is determined by the spot diameter and the irradiation time, if the laser annealing process is performed on the entire substrate, the productivity per hour is as small as several substrates, which is an extremely inefficient process. Will end up.
【００１２】以上述べた如く光リークに強くしかも低価
格アクティブマトリクス基板を製造するに当たっては従
来方式における種々の欠点を改善する必要がある。As described above, in manufacturing a low-price active matrix substrate which is resistant to light leakage and has a low price, it is necessary to improve various drawbacks in the conventional method.
【００１３】[0013]
【課題を解決するための手段】本発明は従来の欠点を除
去せしめるものであり、すなわちガラス等の透明基板上
に多結晶シリコンあるいはアモルファスシリコンを主構
成部材とするアクティブマトリクス回路を形成し、しか
も同一基板上に前記アクティブマトリクス回路を包み込
む形で周辺駆動回路を配置し、該周辺駆動回路領域のみ
をレーザーアニール加工等を行ないトランジスタの移動
度を高めるというものである。すなわち前述の如く周辺
駆動回路の内蔵化をはじめとし、移動度を高める一手段
としてレーザーアニールを基板周辺部の駆動回路のみに
照射するためスループットを向上ししかも内蔵のアクテ
ィブマトリクス回路の移動度を小さくしたため光リーク
防止の向上も計れるという特徴を備えたものである。DISCLOSURE OF THE INVENTION The present invention eliminates the conventional drawbacks, that is, an active matrix circuit having polycrystalline silicon or amorphous silicon as a main constituent member is formed on a transparent substrate such as glass, and A peripheral drive circuit is arranged on the same substrate so as to enclose the active matrix circuit, and only the peripheral drive circuit region is subjected to laser annealing processing or the like to increase the mobility of transistors. That is, as described above, the peripheral drive circuit is built in, and laser annealing is applied only to the drive circuit in the peripheral portion of the substrate as one means for increasing the mobility, so that the throughput is improved and the mobility of the built-in active matrix circuit is reduced. Therefore, it has a feature that the prevention of light leakage can be improved.
【００１４】[0014]
【実施例】次に本発明を下記に記す実施例に基づいて詳
細に説明する。EXAMPLES Next, the present invention will be explained in detail based on the examples described below.
【００１５】（実施例１）図１は本発明によるアクティ
ブマトリクス基板であり、ホウケイ酸ガラス基板１上に
アクティブマトリクス回路２を中心部に周辺駆動回路３
を外周部に配置したものである。(Embodiment 1) FIG. 1 shows an active matrix substrate according to the present invention, in which an active matrix circuit 2 is provided on a borosilicate glass substrate 1 and a peripheral drive circuit 3 is provided around the active matrix circuit 2.
Are arranged on the outer peripheral portion.
【００１６】図２（ａ）から（ｃ）は本発明のアクティ
ブマトリクス基板の製造過程を説明するための基板断面
図である。まず図２（ａ）の如くホウケイ酸ガラス基板
１上に６２５℃の減圧雰囲気中にて５０００Ａの第１の
多結晶シリコン膜４を形成後該多結晶シリコン膜４をホ
トエッチングし部分的に開孔せしめる。次に基板上の周
辺部すなわち図１の周辺駆動回路３の領域内のみ図３
（ａ）の如くＣＷ励起ＹＡＧレーザーを光源としたビー
ム径２００μｍ、線速度５０ｃｍ／ｓｅｃでビームを左
右の方向にスキャンさせながら、しかも１から４の順序
にてレーザーアニール加工を行なった。次に図２（ｂ）
の如くに全面にＣＶＤ−ＳｉＯ2 膜５を２０００Ａ堆積
した後、前記第１の多結晶シリコン膜と同一形成方法で
第２の多結晶シリコン膜６を形成した後、多結晶シリコ
ン膜６のソースドレイン部の開孔をホトエッチングにて
行なう。2 (a) to 2 (c) are cross-sectional views of substrates for explaining the manufacturing process of the active matrix substrate of the present invention. First, as shown in FIG. 2A, a first polycrystalline silicon film 4 of 5000 A is formed on a borosilicate glass substrate 1 in a reduced pressure atmosphere at 625 ° C., and then the polycrystalline silicon film 4 is photoetched and partially opened. Make a hole. Next, only the peripheral portion on the substrate, that is, the area of the peripheral drive circuit 3 in FIG.
Laser annealing was performed in the order of 1 to 4 while scanning the beam in the left and right directions at a beam diameter of 200 μm using a CW-excited YAG laser as a light source and a linear velocity of 50 cm / sec as shown in (a). Next, FIG. 2 (b)
After the CVD-SiO 2 film 5 is deposited to 2000 A on the entire surface as described above, the second polycrystalline silicon film 6 is formed by the same forming method as the first polycrystalline silicon film, and then the source of the polycrystalline silicon film 6 is formed. The opening of the drain portion is formed by photoetching.
【００１７】次に基板主面に１×１０／ｃｍ2 のリンイ
オンを照射し５５０℃１Ｈのフォーミングガス中にてア
ニールを行ない拡散層を形成する。次に図２（ｃ）の如
くＣＶＤ−ＳｉＯ2 膜７を形成した後コンタクトホール
を開孔し引き続き電極８の形成を行ないアクティブマト
リクス基板の形成を終了する。本実施例にもちいたアク
ティブマトリクス回路のゲート及びデータ線のライン数
は各々２００本であり、本基板を用いてデーター線は約
１ＫＭＨz 、又ゲート線も２５ＫＭＨz での動作が確認
され液晶表示ディスプレーとして充分な性能を有するこ
とが確認されている。又レーザーアニール加工の効果と
してアニールのスループットは従来に較べて数倍以上の
向上を見せており、さらに移動度はアクティブマトリク
ス回路中では約１０ｃｍ／Ｖ−ｓｅｃであり、周辺駆動
回路部では約１００ｃｍ／Ｖ−ｓｅｃが得られている。Then, the main surface of the substrate is irradiated with 1 × 10 / cm 2 of phosphorus ions and annealed in a forming gas at 550 ° C. and 1 H to form a diffusion layer. Next, as shown in FIG. 2C, a CVD-SiO 2 film 7 is formed, contact holes are opened, electrodes 8 are subsequently formed, and the formation of the active matrix substrate is completed. The number of gate lines and data lines of the active matrix circuit used in this embodiment is 200 each, and using this substrate, it was confirmed that the data lines were operating at about 1 KMHz and the gate lines were operating at 25 KMHz. It has been confirmed to have sufficient performance. As a result of the laser annealing process, the annealing throughput has been improved several times as compared with the conventional one, and the mobility is about 10 cm / V-sec in the active matrix circuit and about 100 cm in the peripheral drive circuit section. / V-sec is obtained.
【００１８】（実施例２）実施例１と同様に図１の多結
晶シリコン膜を形成後ホトエッチング２で部分的な開孔
を行なった後図３（ｂ）の如く実施例１と同一条件にて
周辺駆動回路の（１）と（３）の領域をレーザーアニー
ル加工した後周辺駆動回路の（２）と（４）を（１）及
び（３）に較べて低出力の約１Ｊ／ｃｍ2 のエネルギー
密度で照射した。すなわち周辺駆動回路の（２）と
（４）の領域はゲート線駆動用であり、（１）及び
（３）のデータ線用に較べて低周波動作が可能なため周
辺駆動回路部全体を同一エネルギー密度で照射する必要
性はなく本実施例の結果でもゲート線を動作させるため
に充分な移動度を得ることが確認され、しかも基板外周
部の二辺は低エネルギー密度照射のためスループットは
実施例１に較べてさらに向上している。(Embodiment 2) Similar to Embodiment 1, after forming the polycrystalline silicon film of FIG. 1 and partially opening holes by photoetching 2, as shown in FIG. 3B, the same conditions as Embodiment 1 are used. After laser annealing the areas (1) and (3) of the peripheral drive circuit, the peripheral drive circuits (2) and (4) have a low output of about 1 J / cm compared to (1) and (3). Irradiation with an energy density of 2 . That is, the areas (2) and (4) of the peripheral drive circuit are for driving the gate lines and can operate at a lower frequency than the data lines of (1) and (3), so that the entire peripheral drive circuit section is the same. It is not necessary to irradiate with energy density, and it is confirmed by the results of this embodiment that sufficient mobility can be obtained to operate the gate lines. Moreover, since the two sides of the substrate outer periphery are irradiated with low energy density, the throughput is high. It is further improved as compared with Example 1.
【００１９】（実施例３）実施例１と同様に第１の多結
晶シリコン膜を形成後ホトエッチングにて部分的な開孔
を行なった後図３（ｃ）の如く実施例１と同一条件にて
周辺駆動回路の（１）と（３）領域すなわちデータ線駆
動回路領域のみをレーザーアニールする。すなわち実施
例（２）にて説明の如く特にゲート線のライン数の少な
いアクティブマトリクス基板については本方式でも充分
対応が取れスループットの大幅な向上が望める。(Embodiment 3) Similar to Embodiment 1, after forming the first polycrystalline silicon film and partially opening holes by photo-etching, the same conditions as Embodiment 1 as shown in FIG. At (1) and (3) of the peripheral drive circuit, that is, only the data line drive circuit area is laser-annealed. That is, as described in the embodiment (2), particularly for the active matrix substrate in which the number of gate lines is small, this method can be sufficiently dealt with and the throughput can be greatly improved.
【００２０】（実施例４）実施例１と同様に第１の多結
晶シリコン膜を形成後ホトエッチングにて部分的な開孔
を行なった後図３（ｄ）の如く基板の周辺駆動回路領域
へのレザーアニール照射をまず（１）の領域にビームを
矢印の如く左右にスキャンさせて行ない、つづいて基板
を中心に対して９０度回転し（２）の領域を（１）と同
一方式にて照射し続いて同じ方式にて基板を回転させて
（３）（４）の領域を照射する。この方式では実施例１
に較べビームのスキャン数が大幅に減少できるため実施
例１に較べてスループットが向上できる利点を有する。(Embodiment 4) Similar to Embodiment 1, after forming the first polycrystalline silicon film and partially opening holes by photoetching, as shown in FIG. 3D, the peripheral drive circuit region of the substrate is formed. First, laser annealing irradiation is performed by scanning the beam to the left and right in the area of (1) as shown by the arrow, and then rotating the substrate by 90 degrees about the center, and making the area of (2) the same method as (1). And then the substrate is rotated in the same manner to irradiate the regions (3) and (4). In this system, the first embodiment
Compared with the first embodiment, the number of beam scans can be significantly reduced, which has an advantage that the throughput can be improved as compared with the first embodiment.
【００２１】以上実施例（１）から（４）にて説明した
如く、本発明は平板液晶ディスプレー等に用いられるア
クティブマトリクス基板において、ガラス基板上にアク
ティブマトリクス回路と周辺駆動回路をワンチップ化す
ると同時にレーザーアニール技術を利用し駆動回路のみ
にレーザーアニール照射を行ないアクティブマトリクス
基板に耐光リーク対策をほどこしたものであり、低コス
トでしかも光リークに強いアクティブマトリクス基板の
提供を可能にしたものである。As described in the above embodiments (1) to (4), in the present invention, in an active matrix substrate used for a flat panel liquid crystal display or the like, if the active matrix circuit and the peripheral drive circuit are integrated into one chip on a glass substrate. At the same time, laser annealing is applied to only the drive circuit by using the laser annealing technology, and the active matrix substrate is provided with light leakage resistance measures, which makes it possible to provide an active matrix substrate that is low in cost and resistant to light leakage. .
【００２２】なお本実施例において透明基板としてホウ
ケイ酸ガラスを用いているが他にソーダガラスあるいは
石英板等の透明基板でも良く、さらにトランジスタ移動
度を高的手段としてレーザーアニールの他にＥＢ等につ
いても効果は確認されており、これらの照射条件につい
ても目的に応じて自由に選択可能であり、なんら本発明
の目的から逸脱するものではない。Although borosilicate glass is used as the transparent substrate in this embodiment, a transparent substrate such as soda glass or a quartz plate may be used, and EB or the like may be used in addition to laser annealing as a means for increasing the transistor mobility. The effects have been confirmed, and these irradiation conditions can be freely selected according to the purpose, without departing from the purpose of the present invention.
【００２３】[0023]
【発明の効果】上述の如く本発明は、一対のガラス基板
内に電気光学的応答をする組成物が封入されてなり、該
ガラス基板上にはマトリクス状に配列されたデータ線と
ゲート線、該データ線と該ゲート線の各交点にはシリコ
ン薄膜トランジスタからなるスイッチング素子及び駆動
電極が配置されてアクティブマトリクス回路部を形成し
てなる電気光学的表示装置において、該アクティブマト
リクス回路部外周の該ガラス基板上には該データ線及び
該ゲート線に信号を提供する周辺駆動回路が形成され、
該周辺駆動回路中の能動素子はシリコン薄膜トランジス
タで構成されてなり、該周辺駆動回路のシリコン薄膜ト
ランジスタの移動度と該アクティブマトリクス回路部の
シリコン薄膜トランジスタの移動度とを異ならせるよう
にしたからレーザーアニール処理等によって、シリコン
トランジスタの薄膜の組成変化により容易に移動度の異
なる領域を形成することが可能であるために、周辺駆動
回路の応答速度は移動度を高くすることによって高周波
応答を保証することができ、一方アクティブマトリクス
回路部の移動度は低くすることによって、表示領域に入
射される光によるトランジスタのオフ時のリーク電流を
最小限に押えることができる。このように移動度に対し
両者が互いに背反する特性を有する薄膜トランジスタを
同一基板上に構成することが可能である効果を有する。As described above, according to the present invention, a composition having an electro-optical response is enclosed in a pair of glass substrates, and data lines and gate lines arranged in a matrix on the glass substrates, In an electro-optical display device in which a switching element made of a silicon thin film transistor and a driving electrode are arranged at each intersection of the data line and the gate line to form an active matrix circuit part, the glass around the active matrix circuit part is provided. Peripheral driving circuits that provide signals to the data lines and the gate lines are formed on the substrate,
The active element in the peripheral drive circuit is composed of a silicon thin film transistor, and the mobility of the silicon thin film transistor of the peripheral drive circuit is made different from the mobility of the silicon thin film transistor of the active matrix circuit section. As described above, since it is possible to easily form regions having different mobilities by changing the composition of the thin film of the silicon transistor, the response speed of the peripheral drive circuit can ensure a high frequency response by increasing the mobility. On the other hand, by lowering the mobility of the active matrix circuit portion, it is possible to minimize the leak current when the transistor is turned off due to the light incident on the display region. As described above, there is an effect that it is possible to form a thin film transistor having characteristics that the two are contrary to each other on the mobility on the same substrate.
【図１】 本発明によるアクティブマトリクス基板にお
ける回路配置図。FIG. 1 is a circuit layout diagram of an active matrix substrate according to the present invention.
【図２】 （ａ）から（ｃ）は本発明におけるアクティ
ブマトリクス基板の製造工程を示す基板断面図。2A to 2C are cross-sectional views of a substrate showing a manufacturing process of an active matrix substrate according to the present invention.
【図３】 （ａ）から（ｄ）は本発明におけるアクティ
ブマトリクス基板上の周辺駆動回路領域へのレーザーア
ニール照射方法を示す平面図。3A to 3D are plan views showing a method of irradiating the peripheral drive circuit area on the active matrix substrate with laser annealing in the present invention.
１・・・ガラス基板 ２・・・アクティブマトリクス基板 ３・・・周辺駆動回路 ４・・・多結晶シリコン膜 ５・・・ＣＶＤ−ＳｉＯ2 膜 ６・・・多結晶シリコン膜 ７・・・ＣＶＤ−ＳｉＯ2 膜 ８・・・電極1 ... glass substrate 2 ... active matrix substrate 3 ... peripheral driving circuit 4 ... polycrystalline silicon film 5 ... CVD-SiO 2 film 6 ... polycrystalline silicon film 7 ... CVD -SiO 2 film 8 ... electrode
Claims (1)
する組成物が封入されてなり、該ガラス基板上にはマト
リクス状に配列されたデータ線とゲート線、該データ線
と該ゲート線の各交点にはシリコン薄膜トランジスタか
らなるスイッチング素子及び駆動電極が配置されてアク
ティブマトリクス回路部を形成してなる電気光学的表示
装置において、該周辺駆動回路中の能動素子はシリコン
薄膜トランジスタで構成されてなり、該アクティブマト
リクス回路部外周の該ガラス基板上には該データ線及び
該ゲート線に信号を提供する周辺駆動回路が形成され、
該周辺駆動回路のうちデータ線周辺駆動回路のみがレー
ザー・アニールされてなることを特徴とする電気光学的
表示装置。1. A pair of glass substrates, in which a composition having an electro-optical response is encapsulated, and data lines and gate lines, and the data lines and the gate lines arranged in a matrix on the glass substrates. In an electro-optical display device in which a switching element made of a silicon thin film transistor and a drive electrode are arranged at each intersection of the above to form an active matrix circuit part, the active element in the peripheral drive circuit is made of a silicon thin film transistor. A peripheral driving circuit for providing a signal to the data lines and the gate lines is formed on the glass substrate around the active matrix circuit section,
An electro-optical display device, wherein only the data line peripheral drive circuit of the peripheral drive circuit is laser-annealed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4230198A JP2697507B2 (en) | 1992-08-28 | 1992-08-28 | Liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4230198A JP2697507B2 (en) | 1992-08-28 | 1992-08-28 | Liquid crystal display |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62082401A Division JPS6311989A (en) | 1987-04-03 | 1987-04-03 | Electro-optical display unit |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21260796A Division JP2697728B2 (en) | 1996-08-12 | 1996-08-12 | Active matrix substrate manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05203977A true JPH05203977A (en) | 1993-08-13 |
| JP2697507B2 JP2697507B2 (en) | 1998-01-14 |
Family
ID=16904122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4230198A Expired - Lifetime JP2697507B2 (en) | 1992-08-28 | 1992-08-28 | Liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2697507B2 (en) |
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