JPH06289431A - Formation of thin-film transistor and active matrix display element - Google Patents

Formation of thin-film transistor and active matrix display element

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Publication number
JPH06289431A
JPH06289431A JP9696993A JP9696993A JPH06289431A JP H06289431 A JPH06289431 A JP H06289431A JP 9696993 A JP9696993 A JP 9696993A JP 9696993 A JP9696993 A JP 9696993A JP H06289431 A JPH06289431 A JP H06289431A
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si
film transistor
active matrix
beam
thin film
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Japanese (ja)
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Naoki Kato
直樹 加藤
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A G Technol Kk
エイ・ジー・テクノロジー株式会社
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Priority to JP9696993A priority Critical patent/JPH06289431A/en
Publication of JPH06289431A publication Critical patent/JPH06289431A/en
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Abstract

PURPOSE: To enable the simultaneous execution of beam annealing of an image display part and driving circuit part at the time of formation of TFTs by arranging the TFTs for pixel display and the TFTs for driving circuits in a straight form on the same substrate and to improve the through-put.
CONSTITUTION: Amorphous silicon(a-Si) formed on the substrate is irradiated with an energy beam, such as eximer laser beam, from a beam annealing device of a scanning type and is thereby annealed to polysilicon. A first Si island group of the image display part consisting of H-shaped Si islands 1 which are the semiconductor channel parts of the thin-film transistors(TFTs) and a second Si island group of the driving circuit part consisting of Si islands 2A, 2B, C... are thereafter formed by photolithography and etching. Scanning is executed at the scanning pitch of the row pitch a of pixels in the case of execution of the scanning with the laser beam in a row direction. The second Si island group of the driving circuit part on the gate side is previously so arranged and designed as to be formed on the extension line in the row direction of the first Si island group of the pixel display part at this time.
COPYRIGHT: (C)1994,JPO

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は、アクティブマトリクス表示素子における薄膜トランジスタ(TFT)の配置構成と、そのTFTの形成方法に関する。 The present invention relates to an arrangement structure of a thin film transistor (TFT) in the active matrix display device, a method for forming the TFT.

【0002】 [0002]

【従来の技術】近年、CRTに代わるフラットパネルディスプレイへの要求が高まっており、なかでも液晶表示素子(LCD)が最も有望視されている。 In recent years, there is an increasing demand for flat panel displays in place of the CRT, a liquid crystal display device (LCD) is most promising among them. 最近では、カラー化と高速化の要求に対応して、TFTなどを利用したアクティブマトリクスタイプのLCDの開発が盛んに行われている。 In recent years, in response to a request of color and high speed, the development of active matrix type of LCD using such as a TFT it has been actively conducted.

【0003】TFTには半導体層として一般にアモルファスシリコン(a−Si)が用いられているが、これに代わってポリシリコン(ポリ−Si)を用いることで高速動作が必要な駆動回路を、画素と同一基板上に形成することが可能となる。 [0003] the TFT is generally used amorphous silicon (a-Si) as a semiconductor layer, a driving circuit required high-speed operation by using a silicon poly (poly -Si) Alternatively, the pixel it is possible to form on the same substrate.

【0004】通常のガラス基板を使用した場合、低温プロセスでポリ−Siを得る手段の一つとして、レーザ光を使ってビームアニールし、a−Siを多結晶化(ポリ−Si化)するという方法がある。 [0004] When using an ordinary glass substrate, as a means for obtaining a poly -Si a low temperature process, that is the beam annealing with a laser beam, the a-Si to poly-crystallization (poly -Si reduction) there is a method. ビームアニールでは、必要な部分だけレーザ光などを照射し、TFTを形成しないところはSiを多結晶化しないという方法を用いることによって製造のスループットを向上させることができる。 In beam annealing, irradiation with such necessary portions only laser light, where no form a TFT can be improved manufacturing throughput by using the method of not polycrystallizing Si.

【0005】走査型のビームアニール装置を用いて、画素表示用のトランジスタだけを基板上に形成する場合には、画素を構成するマトリクスの行(あるいは列)の数だけレーザ光を走査して照射すればよい。 [0005] Using a scanning beam annealing apparatus, when forming only transistors for pixel display on a substrate, irradiating and scanning as many laser beam matrix of rows (or columns) constituting the pixel do it. ところが、駆動回路を同じ基板状に作り込む場合には、表示画面の外側に構成される駆動回路は、その部分での独自の配置構成が行われて、ビームアニールとの関係が考慮されていなかったために、駆動回路部をビーム照射する走査の回数が増えてしまっていた。 However, when fabricated a driving circuit on the same substrate shape, drive circuit formed on the outside of the display screen is performed a unique arrangement in that portion, the relationship between the beam annealing is not taken into account for the, the drive circuit portion had gotten increasingly number of scans of the beam irradiation. その結果、スループットの低下を招いていた。 As a result, it is resulting in decrease in throughput.

【0006】 [0006]

【発明が解決しようとする課題】走査型のレーザアニール装置を用いて、アクティブマトリクスLCD用のポリ−Si−TFTアクティブマトリクス基板を製造する場合に、画素表示部とは別の回路系である駆動回路部をもビームアニールで同様に形成しようとすると、ビーム照射の走査回数が増えることによるスループットの低下が発生する。 Using a laser annealing apparatus of a scanning type [0005], in the production of poly -Si-TFT active matrix substrate for an active matrix LCD, which is another circuit system and the pixel display part drive If you try to similarly formed in the beam annealing circuit portion, reduction in throughput due to the number of scans of the beam irradiation increases occurs. 本発明の課題はこのような欠点を解消しようとするものである。 The object of the present invention is intended to overcome such drawbacks.

【0007】 [0007]

【課題を解決するための手段】本発明は上記の課題を解決すべくなされたものであり、同一基板上に画素表示用のTFTと駆動回路用のTFTとが形成されたアクティブマトリクス表示素子において、画素表示用のTFTと駆動回路用のTFTとが直線状に配置せしめられたことを特徴とするアクティブマトリクス表示素子(1)を提供する。 The present invention SUMMARY OF] has been made to solve the above problems, in the active matrix display device and a TFT for the TFT and the driving circuit for pixel display is formed on the same substrate , to provide an active matrix display device (1) in which a TFT for the TFT and the driving circuit for the pixel display is characterized by being caused to linearly disposed.

【0008】また、上記のアクティブマトリクス表示素子(1)において、直線状の配置が画素の行方向にされたことを特徴とするアクティブマトリクス表示素子(2)を提供する。 [0008] In the above active matrix display device (1), linear arranged to provide an active matrix display device (2), characterized in that it is in the row direction of the pixels.

【0009】また、上記のアクティブマトリクス表示素子(1)において、直線状の配置が画素の列方向にされたことを特徴とするアクティブマトリクス表示素子(3)を提供する。 [0009] In the above active matrix display device (1), linear arranged to provide an active matrix display device (3), characterized in that it is in the column direction of the pixels.

【0010】また、α−Siをビームアニールによってポリ−Si化するTFTの形成方法であって、画素表示用の薄膜トランジスタとされる第一のα−Si島群と、 [0010] Also provided is a method of forming TFT of poly -Si by beam annealing alpha-Si, a first alpha-Si island group to be the thin film transistor for pixel display,
駆動回路用のTFTとされる第二のα−Si島群とを同一基板上で予めマトリクスの行方向または列方向に沿って直線状に配列するよう予定し、次いで、これらの第一のα−Si島群と、第二のα−Si島群の両者の予定された位置上を、マトリクスの行方向または列方向に沿って、直線的な一回のビーム照射で各一行または各一列をビーム照射し、α−Siをアニールし、ポリ−Si化し、さらにフォトリソグラフィ工程を経てSi島を形成することを特徴とするTFTの形成方法を提供する。 Scheduled to linearly arranged and a second alpha-Si island group is a TFT for a driver circuit in the row direction or the column direction of advance matrix on the same substrate, then these first alpha and -Si island group, the second alpha-Si island group both on scheduled positions of, along a row or column direction of the matrix, each row or each one row in a linear single beam and beam irradiation, annealing the alpha-Si, poly turned into -Si, further provides a method of forming a TFT, which comprises forming a Si island through a photolithography process.

【0011】画素表示用の薄膜トランジスタなどからなる能動素子は、もともと基板の行方向および列方向にそれぞれ直線状に並んでいる。 [0011] active element made of a thin film transistor for pixel display are arranged originally respectively linearly in the row direction and the column direction of the substrate. これに合わせて、その外側の周辺部に位置する駆動回路用の能動素子、具体的にはTFTなどの能動層(半導体チャンネル部)が、画像表示部の能動素子の直線状配列にさらにのるように配置設計する。 In accordance with this, an active element for driving circuit located at the periphery of the outer, active layer, such as a TFT in particular the (semiconductor channel portion), still ride linear array of active elements of the image display unit the layout design so.

【0012】図5に基板上の全体的な配置構成を示す。 [0012] shows the general arrangement of the substrate in FIG.
図5中の矢印は、基板の列方向を示している。 Arrow in FIG. 5 shows the column direction of the substrate. 図5中、 In FIG. 5,
中央の斜線で示す部分が画素表示部8である。 Portion shown in the center of the hatched are pixels display unit 8. また、格子で示す四つの周辺に駆動回路部7a、7b、7c、7 Further, the four peripheral driver circuit portion 7a shown by grating, 7b, 7c, 7
dが設けられる。 d is provided. 図5中、太い実線で囲んだ領域αと破線で囲んだ領域βとにおける、Si島の配置構成を図1 FIG Among 5, in a region β enclosed by enclosed region α and the broken line by a thick solid line, Fig. 1 the arrangement of the Si island
〜図4に示し、さらに次に述べる各実施例で詳細に説明する。 Shown in to 4, described in detail in the embodiments described further below. なお、各図中で矢印は同じ方向を指している(図面中で左方向)。 Incidentally, the arrows in the figures refer to the same direction (left direction in the drawing).

【0013】 [0013]

【実施例】 【Example】

(実施例1)図1に実施例1を示す。 Showing a first embodiment (Embodiment 1) FIG. 基板上に製膜されたa−Siを、走査型のビームアニール装置を用い、エキシマレーザ光や電子線や連続発振アルゴンイオンレーザなどのエネルギービームを照射し、アニールしてポリ−Si化する。 The a-Si that is formed into a film on a substrate, using a scanning beam annealing apparatus, and irradiating an energy beam such as an excimer laser beam or an electron beam or a continuous oscillation Ar ion laser, poly -Si by being annealed. その後、フォトリソグラフィとエッチングによってTFTの半導体チャンネル部となるH字形のSi島1からなる画像表示部の第一のSi島群と、Si Thereafter, a first Si island groups of the image display unit consisting of Si island 1 H-shaped as a semiconductor channel portion of the TFT by photolithography and etching, Si
島2A、2B、2C…からなる駆動回路部の第二のSi Island 2A, 2B, the second Si in the driver circuit portion consisting 2C ...
島群を形成する。 To form an island group.

【0014】レーザ光の走査を行方向(ゲート・バス・ [0014] scanning the row direction of the laser light (gate bus
ラインと平行)に行う場合、走査ピッチは画素の行ピッチaで行う。 When performing the line parallel) scanning pitch is carried out in line pitch a of the pixel. このとき、ゲート側の駆動回路部の第二のSi島群(Siがエッチングされて残る図中のH字形の部分)が画素表示部の第一のSi島群の行方向の延長線上に形成されるように予め配置設計する。 Formed at this time, the gate side driver circuit portion of the second Si island group on the extension (Si portions of the H-shaped in the figure that remains etched) of the row direction of the first Si island group pixel display unit advance arrangement designed to be.

【0015】その後、ビーム照射して、α−Siを多結晶化する。 [0015] Then, the beam irradiation, polycrystallizing the alpha-Si. 照射されるビームスポット軌跡10をその後に形成されるSi島と重ねて示す。 It is shown superimposed with Si islands formed of the beam trajectories 10 irradiated thereafter. 実施例1では、全てのSi島が照射されるビームスポット軌跡10の中に含まれる。 In Example 1, all of the Si island is included in the beam trajectories 10 to be irradiated. ただし、必ずしもSi島の全体がポリ−Si化される必要はなく、TFTの半導体チャンネル部となるべき領域のみがポリ−Si化されればよい。 However, not necessarily the entire Si islands are poly -Si reduction, only the region to become the semiconductor channel portion of the TFT need be poly -Si reduction. そのため、 for that reason,
Si島の向きは任意でよい。 Si Island of direction may be arbitrary.

【0016】周辺部において、駆動用素子としてCMO [0016] In the periphery, CMO as a driving element
Sを用いる場合、それぞれの半導体チャンネル部を同時に多結晶化して得ることができる。 When using the S, it can be the respective semiconductor channel portion may simultaneously polycrystalline. 図1に示す、符号2 1, reference numeral 2
A、2B、2Cの各組をCMOSの対の半導体チャンネル部とすることができる。 A, 2B, 2C each set of can be a semiconductor channel portion of the pair in CMOS. 以下の実施例においても、同様のことが可能である。 In the following examples, it is possible the same thing.

【0017】(実施例2)図2に実施例2を示す。 [0017] A (Example 2) Example 2 in FIG. 周辺部において、このような配置構成も可能である。 In the peripheral portion, such an arrangement is also possible. 第一のSi島群を構成するSi島1と第二のSi島群を構成するSi島2A、2B、2Cの向きが直交関係に位置している。 Si island 2A of the Si island 1 constituting the first Si island groups constituting the second Si island group, 2B, the 2C orientation are located in orthogonal relationship. Si島2A、2B、2Cは、少なくともそれぞれの半導体チャンネル部が照射されるビームスポット軌跡10と交差して多結晶化されている。 Si islands 2A, 2B, 2C are polycrystalline intersects the beam trajectories 10 at least each of the semiconductor channel portion is irradiated.

【0018】(実施例3)同様に、Si島が完全に一列直線状に並ぶ必要もないので、図3に示す実施例3のような構成でもよい。 [0018] (Example 3) Similarly, since the Si island is no need to line up in one complete row straight, it may be constructed as shown in Example 3 shown in FIG. 第二のSi島群を構成する、Si島2A、2B、2Cはそれぞれの位置で並列に配置されている。 Constituting the second Si island group, Si islands 2A, 2B, 2C are disposed in parallel at each position. 全てのH字形のSi島はビームスポット軌跡10 Si island of all of the H-shaped beam spot locus 10
に覆われている。 It is covered in.

【0019】(実施例4)ビーム走査を列方向(ソース・バス・ラインと平行)に行う場合は、走査ピッチは画素の列ピッチbとする。 [0019] When performing Example 4 beam scanning in the column direction (the source bus lines in parallel), the scanning pitch and the column pitch b of the pixel. この場合は、図4に示すようにソース側の駆動回路部の第二のSi島群(Si島2A、 In this case, the second Si island group source side driver circuit portion as shown in FIG. 4 (Si islands 2A,
2Bが、2C)が画素表示部の第一のSi島群(Si島1)の列方向の延長線上に形成されるようにする。 2B is, 2C) is to be formed on an extended line in the column direction of the first Si island group pixel display section (Si island 1). そして列方向に走査されるビームスポット軌跡11が、各S The beam trajectories 11 that is scanned in the column direction, each S
i島を覆っている。 Covering the i island.

【0020】 [0020]

【発明の効果】本発明において、駆動回路用のTFTと画素表示用のTFTが直線状に配置されるので、TFT In the present invention, since the TFT and the TFT for pixel display drive circuits are arranged in a straight line, TFT
の形成時にビームアニールが駆動回路と画素表示の回路の両方のTFTのポリ−Si形成をほぼ同時に行えることになる。 Beam annealing is can be performed substantially simultaneously poly -Si formation of both the TFT circuit of the driver circuit and the pixel display during formation. そのため、駆動回路のためのビームアニールを別途行う必要がなくなって、それによりスループットが大きく向上し、所要時間が半減以下となった。 Therefore, the beam annealing required gone to perform separate for driving circuit, thereby improving the throughput is large, the time required becomes half or less.

【0021】また、別個に半導体チャンネル部を形成するのではなく、短い時間にマトリクスの行方向または列方向の数のビーム照射の走査で行うので、各TFTの特性ばらつきが少なくなり、最終製品での電気的特性が向上した。 Further, instead of forming the separate semiconductor channel portion, is performed in a short time in a matrix in the row direction or the column direction of the number of scanning of the beam irradiation, variations in characteristics of the TFT is reduced, the final product electrical characteristics of has improved.

【0022】走査型のビームアニール装置など、ビーム走査を行ってトランジスタに何らかの処理をする方法において、製造効率の向上など同様の効果が期待される。 [0022] such as a scanning beam annealing apparatus, a method of some processing to the transistor performing beam scanning, similar effects such as improvement of the manufacturing efficiency can be expected.

【0023】本発明は、その効果を失わない範囲で種々の回路形成に適用できる。 [0023] The present invention is applicable to various circuits formed within a range that does not lose its effect.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】実施例1でのSi島の配列を示す部分拡大平面図。 Partially enlarged plan view showing an arrangement of Si islands in Figure 1 Example 1.

【図2】実施例2でのSi島の配列を示す部分拡大平面図。 Figure 2 is a partial enlarged plan view showing an arrangement of a Si island in Example 2.

【図3】実施例3でのSi島の配列を示す部分拡大平面図。 Partially enlarged plan view showing an arrangement of Si islands in Figure 3 Example 3.

【図4】実施例4でのSi島の配列(列方向)を示す部分拡大平面図。 Figure 4 is a partial enlarged plan view showing arrangement of Si Island (column direction) in Example 4.

【図5】LCD用のアクティブマトリクス基板を模式的に表した平面図。 5 is a plan view of the active matrix substrate represented schematically for LCD.

【符号の説明】 DESCRIPTION OF SYMBOLS

1、2A、2B、2C:Si島 10、11:ビームスポット軌跡 1,2A, 2B, 2C: Si islands 10, 11: beam trajectories

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl. 5識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/336 ────────────────────────────────────────────────── ─── front page continued (51) Int.Cl. 5 in identification symbol Agency Docket No. FI art display portion H01L 21/336

Claims (4)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】同一基板上に画素表示用の薄膜トランジスタと駆動回路用の薄膜トランジスタとが形成されたアクティブマトリクス表示素子において、 画素表示用の薄膜トランジスタと駆動回路用の薄膜トランジスタとが直線状に配置せしめられたことを特徴とするアクティブマトリクス表示素子。 1. A active matrix display device and a thin film transistor are formed of thin film transistor and a driving circuit for a pixel displayed on the same substrate, a thin film transistor of the thin film transistor and a driving circuit for pixel display is made to linearly arranged an active matrix display device, characterized in that the.
  2. 【請求項2】請求項1のアクティブマトリクス表示素子において、直線状の配置が画素の行方向にされたことを特徴とするアクティブマトリクス表示素子。 Wherein the active matrix display device according to claim 1, the active matrix display device linear arrangement is characterized in that it is in the row direction of the pixels.
  3. 【請求項3】請求項1のアクティブマトリクス表示素子において、直線状の配置が画素の列方向にされたことを特徴とするアクティブマトリクス表示素子。 3. The active matrix display device according to claim 1, the active matrix display device linear arrangement is characterized in that it is in the column direction of the pixels.
  4. 【請求項4】α−Siをビームアニールによってポリ− 4. Poly by beam annealing alpha-Si -
    Si化する薄膜トランジスタの形成方法であって、 画素表示用の薄膜トランジスタとされる第一のα−Si A thin film transistor forming method of Si of a first alpha-Si which is a thin film transistor for pixel display
    島群と、駆動回路用の薄膜トランジスタとされる第二のα−Si島群とを同一基板上で予めマトリクスの行方向または列方向に沿って直線状に配列するよう予定し、 次いで、これらの第一のα−Si島群と、第二のα−S And the island group, and a second alpha-Si island group in the row direction or the column direction of advance matrix on the same substrate which is a thin film transistor for the driver circuit scheduled to linearly arranged, then these a first alpha-Si island group, the second alpha-S
    i島群の両者の予定された位置上を、 マトリクスの行方向または列方向に沿って、直線的な一回のビーム照射で各一行または各一列をビーム照射し、 The i island groups of both scheduled upper position, along a row or column direction of the matrix, and beam irradiation of each row or each one row in a linear single-beam irradiation,
    α−Siをアニールし、ポリ−Si化し、 さらにフォトリソグラフィ工程を経てSi島を形成することを特徴とする薄膜トランジスタの形成方法。 Annealing the alpha-Si, poly turned into -Si, further method of forming a thin film transistor and forming the Si island through a photolithography process.
JP9696993A 1993-03-31 1993-03-31 Formation of thin-film transistor and active matrix display element Pending JPH06289431A (en)

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Cited By (16)

* Cited by examiner, † Cited by third party
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US6479837B1 (en) 1998-07-06 2002-11-12 Matsushita Electric Industrial Co., Ltd. Thin film transistor and liquid crystal display unit
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US7109073B2 (en) 2001-08-17 2006-09-19 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor device
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US6613619B2 (en) 1994-12-16 2003-09-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for producing the same
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JP2003031497A (en) * 2001-07-18 2003-01-31 Advanced Lcd Technologies Development Center Co Ltd Thin film semiconductor device and its substrate, and manufacturing method thereof
US6828178B2 (en) 2001-07-18 2004-12-07 Advanced Lcd Technologies Development Center Co., Ltd. Thin film semiconductor device having arrayed configuration of semiconductor crystals and a method for producing it
US7393729B2 (en) 2001-08-17 2008-07-01 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor device
US7109073B2 (en) 2001-08-17 2006-09-19 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor device
US7422987B2 (en) 2001-08-30 2008-09-09 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7112517B2 (en) 2001-09-10 2006-09-26 Semiconductor Energy Laboratory Co., Ltd. Laser treatment device, laser treatment method, and semiconductor device fabrication method
US7682949B2 (en) 2001-09-10 2010-03-23 Semiconductor Energy Laboratory Co., Ltd. Laser treatment device, laser treatment method, and semiconductor device fabrication method
US7317205B2 (en) 2001-09-10 2008-01-08 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing a semiconductor device
US7670935B2 (en) 2001-12-11 2010-03-02 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
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US7145623B2 (en) 2002-02-06 2006-12-05 Sharp Kabushiki Kaisha Flat panel display having concentrated switching element arrangement and method of manufacturing the same
US7528023B2 (en) 2002-05-17 2009-05-05 Sharp Kabushiki Kaisha Apparatus for crystallizing semiconductor with laser beams
US7660042B2 (en) 2002-05-17 2010-02-09 Sharp Kabushiki Kaisha Apparatus for crystallizing semiconductor with laser beams
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US7927935B2 (en) 2002-05-17 2011-04-19 Sharp Kabushiki Kaisha Method for crystallizing semiconductor with laser beams
JP2003332235A (en) * 2002-05-17 2003-11-21 Fujitsu Ltd Method and device for crystallizing semiconductor
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US7413608B2 (en) 2002-09-09 2008-08-19 Advanced Lcd Technologies Development Center Co., Ltd. Crystallization apparatus, crystallization method, and phase shifter
US7001461B2 (en) 2002-09-09 2006-02-21 Advanced Lcd Technologies Development Center Co., Ltd. Crystallization apparatus, crystallization method, and phase shifter
US7505204B2 (en) 2002-09-09 2009-03-17 Advanced Lcd Technologies Development Center Co., Ltd. Crystallization apparatus, crystallization method, and phase shifter
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