JPH05198555A - Equipment and method for etching semiconductor substrate - Google Patents

Abstract

PURPOSE:To provide an etching device which is simple in control structure and capable of controlling the amount of erosion with high accuracy during an anisotropic etching operation in a dielectric isolation silicon substrate manufacturing process. CONSTITUTION:A liquid laminated with an etching reactive liquid 5 and a floating IPA liquid 6 is discharged and collected to a supply tank from an overflow dam 4 by way of a valve 15 and then the etching reactive liquid 5 in an etching tank 3 is pushed up by driving a circulation pump 8 so that a very thin film IPA liquid remaining on the surface of the etching tank 3 may be discharged out to a satisfactory extent. The silicon substrate 1 is dipped in where pressure is applied to the liquids 5 and 6 of the supply tank 17 with nitrogen 19 and resupplied to the etching tank 3. In addition, the etching reactive liquid 5 is turned into a laminar flow state accompanied by the rotation of an elliptic shaft 23, thereby using the etching liquid 5 for the entire area of the silicon substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate etching apparatus, and more particularly to a means for reducing variations in erosion amount in a semiconductor substrate etching apparatus.

[0002]

2. Description of the Related Art A working voltage of several hundred V and a current capacity of several hundred mA
In such a high breakdown voltage and high current integrated circuit, a dielectric isolation method is adopted as a method for electrically isolating each element element in the circuit device. This dielectric isolation method is disclosed, for example, in Japanese Patent Publication No. 41-160707.

FIG. 7 is a diagram showing an example of a manufacturing process of a high breakdown voltage large current integrated circuit adopting this dielectric isolation method.
In FIG. 7A, a silicon dioxide film 200 is formed on a silicon substrate 100 having a crystal plane (100) plane by a thermal oxidation method. Next, by the known photolithography method, (11
A window in which the silicon dioxide film 200 is partially removed is opened in the 0) direction. Further, the separation groove 300 is formed by the anisotropic etching method known in Japanese Patent Publication No. 45-17988, for example.
a, 300b, 300c are formed. The shape of these separation grooves is a V shape surrounded by the (111) plane, and the change of the groove shape viewed from the (110) direction is automatically stopped due to the characteristics of the anisotropic etching method.

In FIG. 7B, the silicon dioxide film 2 is again shown.
After forming 00, polycrystalline silicon 400 serving as a support is formed thereon by, for example, a vapor phase growth method.

Next, the silicon substrate 100 is polished and removed to the position AA to obtain the dielectric isolation substrate 1000 having the structure of FIG. 7C. Here, single crystal islands 100a to 10
0d is insulated by the silicon dioxide films 200a to 200d and is supported by the polycrystalline silicon 400.

In FIG. 7D, the electrode 5 is formed by a known diffusion technique, photolithography technique, and metal wiring film forming technique.
00 to obtain a semiconductor integrated circuit device.

FIG. 8 is a perspective view showing the surface structure of a silicon substrate formed by the anisotropic etching method.
Silicon substrate 100 whose main surface is a single crystal (100) plane
A separation groove 300 in the (110) direction is provided in the. Assuming that the width of the silicon dioxide film 200 as a mask material for the etching solution is W and the final groove depth of etching is dm, the groove is
It becomes a V-shape surrounded by the (111) plane, and crystallographically, the relationship of dm≈L / (√2) …………………………………………………… (1) It is in. In the linear groove portion, the etching is stopped when the (111) plane having the slowest etching rate is exposed, so that a V-shaped groove having a good shape accuracy is formed. However, (100), (11
In addition to the 1) plane, a third crystal plane (hkl) appears. The index of this surface is not clear because there are various theories depending on the etching conditions. The etching rate of the crystal plane (hkl) is (111) << (hkl) <(100) ……………………………… (2) compared to the (100) and (111) planes. It is known that the etching proceeds relatively fast due to the relationship of). When the (hkl) plane is significantly etched, the erosion of the corners of the single crystal island becomes severe, and the element formation region becomes small.

Therefore, as shown in, for example, Japanese Patent Publication No. 17988/1985, a compensation pattern 600 is provided and (hkl)
Methods are known for preventing face retreat. In this method, an etching solution such as potassium hydroxide (KO) is used.
H) A solution obtained by heating a mixed solution of an aqueous solution and isopropyl alcohol (IPA) to 70 to 80 ° C is used.

FIG. 9 is a diagram for explaining this anisotropic etching method in the manufacturing process of the dielectric isolation substrate 1000. In FIG. 9A, an etching mixed solution obtained by adding a KOH aqueous solution having a predetermined concentration and IPA is put in an etching tank 70, stirred by a magnetic stirrer 75, and heated by a heater 85.
To maintain a predetermined temperature. Since IPA in the etching mixture is likely to evaporate, I
The concentration of PA is set to the saturation solubility or higher. Therefore,
In the etching bath 70, an etching reaction liquid 80 mainly composed of a KOH aqueous solution and containing IPA in a saturated dissolved state is formed.
And a small amount of KO mainly consisting of oversaturated IPA
Two liquid phases, that is, the liquid 90 containing the H aqueous solution, that is, the floating IPA liquid 90, are generated. In an actual apparatus, a lid provided with a cooler for preventing evaporation and disappearance of IPA above the etching bath 70, and an etching reaction solution 80.
Although a temperature sensor for measuring the temperature of the above, a temperature controller for controlling the temperature of the heater 85, and the like are provided, they are not shown here.

As shown in FIG. 9B, the silicon substrate 100 stored in the wafer holder 150 is immersed in the etching reaction liquid 80 while passing the floating IPA liquid 90 in the etching bath 70 controlled to a predetermined temperature. 9
In the state of C, etching is performed.

The problems of the conventional anisotropic etching method will be described with reference to FIGS.
From the relationship of equation (2), the etching rate of the (hkl) plane is
It is relatively large compared to the (111) plane. Therefore, the compensation pattern 600 made of the silicon dioxide film 200 is provided for the purpose of preventing the corner portions of the single crystal islands from decreasing. In FIG. 8, regarding the reduction amount of the corner portion of the single crystal island, the distance X from the diagonal tip of the compensation pattern 600 to the corner tip of the single crystal island is defined as the corner erosion amount. The variations in the amount of corner erosion X have the following effects on the device characteristics. 1. When the amount of corner erosion X is over-etched, the diffusion region protrudes from the single crystal island, and the withstand voltage characteristic of this element deteriorates. 2. When the amount of corner erosion X does not reach the predetermined amount, that is, when the etching is insufficient, the single crystal islands are not separated from each other and the semiconductor elements formed next to each other are electrically influenced, so that high withstand voltage characteristics can be obtained. I will not be able to.

When the conventional etching method shown in FIG. 9 is used, for example, a large fluctuation having a variation width of about ± 30% occurs with respect to the target corner erosion amount X = 40 μm. The cause is that, in FIG. 9B, the silicon substrate that is the object to be etched, that is, the wafer 100, always comes into contact with the floating IPA liquid 90 before reaching the etching reaction liquid 80.

Excessive IPA on the surface of the silicon substrate 100
If adhered, the excess IPA cannot be immediately removed even when immersed in the etching reaction solution 80. This is because the etching reaction liquid 80 has already saturated the solubility of IPA. That is, at the beginning of the reaction, the thin film of IPA is 1
IPA thin film is unevenly attached on the surface of one silicon wafer 100, or a thin film of IPA is unevenly attached between a plurality of wafers housed in the wafer holder 150 at the initial stage of the reaction, or once during the reaction. Since the amount of peeling when the thin film is gradually peeled in the etching reaction liquid 80 becomes non-uniform in each wafer or among a plurality of wafers, the reaction rate varies and the corner erosion amount X fluctuates. is there.

As shown in FIG. 9B, a silicon substrate 100.
There is also a method in which the floating IPA liquid is scooped with a container such as a dipper or a beaker before adding, but generally it is impossible to completely scoop out the oil film on the surface of the water in the container. , This scooping work was not a complete measure.

[0015]

In order to reduce the variation in the amount of corner erosion X by exposing the silicon substrate 100 only to the etching reaction solution 80, for example, Japanese Patent Publication No. 1-36982 discloses a method shown in FIG. The method shown in is proposed. In this method, in addition to the etching reactor 51, saturation I
A PA concentration preparation device 52 is provided, and both devices are pumped by P1 and P2.
The etching reaction liquid 80 alone is circulated and the etching is performed in the etching reaction device 51 having no floating IPA phase.

The system shown in FIG. 10 also achieves the function of reducing the variation in the amount of corner erosion to some extent, but has a problem from the viewpoint of actual device manufacturing and cost reduction. First, two units, an etching reaction device 51 and a saturated IPA concentration creation device 52, which have almost the same structure, are required, the device configuration becomes large, and the installation space is wasteful. Along with that, the silicon substrate, that is, the wafer 1
The etching reaction liquid as a processing cost per sheet is naturally doubled, and there is a problem in running cost. Furthermore, in the stirring method using the magnetic stirrer 13 and the stirring bar 54, the etching reaction liquid 5 is vortexed and turbulent.
Depending on the surface position of each wafer 1, even between a plurality of wafers, it becomes difficult to perform etching with the etching reaction solution 5 in a uniform state, and the accuracy of controlling the amount of corner erosion is limited.

An object of the present invention is to provide an etching apparatus capable of highly accurately controlling the erosion amount dimension with a simple apparatus system configuration during anisotropic etching in the process of manufacturing a dielectric isolation silicon substrate.

Another object of the present invention is to provide an etching method capable of controlling the erosion amount size with high precision during anisotropic etching in the process of manufacturing a dielectric isolation silicon substrate.

[0019]

In order to achieve the above object, the present invention provides a first phase in which a small amount of a second component having a small specific gravity is mixed with a first component having a large specific gravity in an etching tank, and the first phase. In an apparatus for etching a semiconductor body immersed in a first phase with an etching liquid composed of a second phase laminated on the second phase in which a small amount of the first component is mixed with the second component, a partition lower than the lower end of the second phase is used. An overflow weir separated from the etching tank, a means for sucking and recovering the etching solution consisting of the first phase and the second phase above the partition from the overflow weir prior to the immersion of the semiconductor substrate, and the recovery after the immersion of the semiconductor substrate. The present invention proposes an etching apparatus for a semiconductor substrate, which is provided with a means for re-supplying the etching solution to the etching tank from a position higher than the partition.

During the etching, an etching liquid circulating means for sucking the first phase of the etching liquid from the overflow weir, performing a predetermined treatment such as liquid temperature control, and supplying and circulating it from the bottom of the etching tank is used after the recovery. When the etching solution is supplied from the bottom of the etching tank prior to the immersion of the semiconductor substrate and also serves as a means for removing the thin film of the second phase remaining on the liquid surface, the removal of the second phase becomes more complete.

As a means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid, a pipe or the like for sucking the floating IPA layer may be adopted instead of the overflow weir.

It is also preferable to provide a flow direction control means having a flat cross section which rotates at a low speed near the bottom of the etching tank to change the flow direction of the etching solution in the etching tank to make a laminar flow state. As a means for bringing the etching reaction liquid into a uniform laminar flow state, a guide plate swinging at the supply point of the etching reaction liquid can be used instead of the shaft having a flat cross section that rotates at a low speed. Furthermore, it is also possible to arrange a large number of etching reaction solution supply pipes, each of which is provided with a flow rate adjusting valve, at the bottom of the etching tank.

It is also possible to provide a mounting table for providing a predetermined clearance between the wafer holder immersed and set in the etching tank and the silicon substrate in the wafer holder.

In order to achieve the above-mentioned other object, the present invention provides a first phase in which a small amount of a second component having a small specific gravity is mixed with a first component having a large specific gravity in an etching tank and the first phase thereof. A method of etching a semiconductor body immersed in a first phase with an etching solution comprising a second phase in which a first phase is mixed with a small amount of a first phase in a second phase
The phase is removed from the overflow weir arranged around the etching tank, the entire etching solution is pushed up by the circulation pump, and the second phase still remaining as a very thin layer at the top of the etching tank is overflowed to the overflow weir and removed. ,
It proposes an etching method of a semiconductor substrate in which a silicon substrate is immersed and etched.

It is more desirable to return the etched second phase of the etchant over the first phase and etch after dipping the silicon substrate.

[0026]

In the present invention, the means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid, and the etching reaction liquid are made to act uniformly on any position of each wafer, And means for causing the wafers to act at a uniform flow rate. 1. Means for Completely Excluding the Floating IPA Solution When Injecting a Silicon Substrate into the Etching Reaction Solution The etching reaction solution and the floating IPA solution are eliminated from an overflow weir arranged around the etching tank. Next, the whole of the etching reaction liquid in the lower layer portion of the floating IPA liquid is pushed up by the circulation pump, and the floating IPA liquid still remaining as a very thin layer on the uppermost portion of the etching tank is completely removed from the overflow weir. By this elimination, IPA adhesion to the surface of the silicon substrate is completely eliminated, and the erosion amount of the silicon substrate immersed in that state can be accurately controlled. Therefore, the extra processing tank of the prior art is not required, and a simple etching apparatus capable of controlling the erosion amount dimension with high accuracy can be obtained with a simple apparatus system configuration.

2. Means for causing the etching reaction liquid to act evenly on the surface of each wafer and for causing the etching reaction liquid to flow more evenly between a plurality of wafers in the wafer holder. Etching process for a silicon substrate or wafer with high accuracy. In order to do so, the etching reaction liquid must act evenly on each wafer surface and at a uniform flow rate condition between the plurality of wafers in the wafer holder. In the present invention, for example, an oval shaft having a flat cross section which is rotated by, for example, a rotating means utilizing magnetic force is arranged between the lower portion of the wafer holder and the bottom portion of the etching tank so as to rotate at a low speed. This low-speed rotating flat section shaft
The etching reaction liquid supplied from the bottom of the etching tank is
It does not become eddy turbulent flow, but becomes a laminar flow that flows from the lower part to the upper part while always controlling the flow direction. Therefore, the etching process can be performed with higher accuracy in combination with the means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid.

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor substrate etching apparatus according to the present invention will be described with reference to FIGS. Figure 1
FIG. 2 is a diagram showing a system configuration of an embodiment of an etching apparatus for a semiconductor substrate according to the present invention, FIG. 2 is a diagram showing a cross section taken along the line AA of FIG. 1 embodiment, and FIG. It is a figure explaining the operation to do.

An etching reaction liquid 5 which is a mixed liquid of an aqueous solution of potassium hydroxide (KOH) and isopropyl alcohol (IPA) dissolved in a saturated concentration, and a floating IP in a supersaturated state.
Liquid A 6 is an etching tank 3 formed of a quartz gas material or the like.
And, it is put into the overflow weir 4 arranged around the upper portion of the etching tank 3 so as to have the positional relationship in the height direction shown in FIG. A large number of silicon substrates 1 are placed on the wafer holder 2 and housed in the etching bath 3. At this time, the silicon substrate 1 has a clearance δ between itself and the wafer holder 2 by the mounting table 24 shown in FIG. The rectifying plate 22 is formed with a large number of holes to allow the etching reaction liquid 5 circulated and supplied from the bottom of the etching tank 3 to flow in a laminar state from the lower part to the upper part over the entire area, and is formed of a quartz glass material or the like. ing. A shaft 23 having an oval cross section is provided between the flow straightening plate 22 and the mounting table 24. The oval shaft 23 is rotated at a very low speed by a motor 26 whose rotation speed is controllable from the outside of the etching tank 3 by using the magnet coupling 25 as power transmission. The etching reaction liquid supplied from the rectifying plate 22 has its flow direction changed by the rotation of the elliptical shaft 23, and the effect of the clearance δ is combined, so that the entire surface of the silicon substrate 1 and between a number of silicon substrates. It acts evenly as an etching solution and achieves highly accurate etching.

Next, the circulation system of the etching reaction liquid 5 will be described. Only the etching reaction liquid 5 is sucked from the bottom of the overflow weir 4 via the circulation pipe 7 by the circulation pump 8. The etching reaction solution sucked into the circulation pump 8 is heated by the heater 9, the filter 12, and the flow meter 13.
Via the circulation pipe 7A to the bottom of the etching tank 3. The heater 9 is controlled by the temperature controller 10 based on the temperature detected by the temperature sensor 11, and keeps the etching reaction liquid 5 at a predetermined temperature, for example, 75 ° C. The upper part of the overflow weir 4 has a lid structure that can be opened and closed to prevent evaporation IPA.
A condenser for cooling and recovering the water, that is, a water-cooled corrugated pipe cooler 27 is installed.

1 and 3, the means for discharging the floating IPA liquid 6 for reaching and immersing the silicon substrate 1 in the etching reaction liquid 5 without contacting the floating IPA liquid 6 will be described. In the initial state of FIG. 3A, when the circulation pump 8 is stopped and the valve 15 of the discharge pipe 14 branched from the middle B of the circulation pipe 7 is opened, the etching reaction liquid 5
Both the floating IPA liquid 6 are discharged at the same time. As a result, as shown in FIG. 3B, only the etching reaction liquid 5 remains in the etching tank 3, but the IPA film 6A having a very small thickness remains on the surface. So Figure 3C
As shown in FIG. 3, the circulation pump 8 stopped in the state of FIG. 3A.
To restart. Then, only the etching reaction liquid 5 remaining in each device connected from the discharge port of the circulation pump 8 to the bottom of the etching tank 3 is pushed up from the bottom of the etching tank 3. Therefore, the very thin IPA film 6A can be completely eliminated. According to this example, the operating time of the circulation pump 8 was 10 seconds or less. After the state of FIG. 3C is achieved, when the wafer holder 2 on which the silicon substrate 1 is placed is put into the etching bath 3 and immersed therein, the IPA can be completely prevented from adhering to the surface of the silicon substrate 1.

After the silicon substrate 1 is dipped, etching is started. At that time, the etching reaction solution 5
It is necessary to form a layer of floating IPA liquid 6 on the upper layer. This is to keep the KOH concentration and the saturated IPA concentration at predetermined values and make the etching rate uniform even if the water vapor in the heated etching reaction liquid 5 evaporates. In this embodiment, the mixed liquid of the etching reaction liquid 5 and the floating IPA liquid 6 discharged in the steps of FIGS. 3A and 3B is collected in the replenishment tank 17 around which the heater 16 is wound. After immersing the silicon substrate 1, the valve 15 is closed, the valve 18 is then opened, and nitrogen 19 is supplied.
The mixed liquids 5 and 6 in the replenishment tank 17 are supplied from the replenishment tank 17 to the etching tank 3 again via the re-supply pipe 21, and finally, as shown in FIG. Only the silicon substrate 1 is immersed in the reaction liquid 5, the floating IPA liquid 6 is formed on the upper layer of the etching reaction liquid 5, and the etching process is performed for a required time thereafter. By this re-supplying means, it is not necessary to add new etching mixed liquids 5 and 6 to the etching reaction liquid 5, which is effective in reducing the cost of auxiliary materials.

According to the present embodiment, for the target corner erosion amount X = 40 μm in FIG.
% To about 1/5 to about 6%.

As a means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid, instead of the overflow weir, as shown in FIG. 4, a suction pipe 28 for sucking the floating IPA layer is used. Etc. may be adopted.

Further, as means for making the etching reaction liquid into a uniform laminar flow state, instead of a shaft having a flat cross section that rotates at a low speed, as shown in FIG. A plate 29 can be used. Drive source 29
A can be provided directly on the swing shaft perpendicular to the paper surface, or can be provided laterally as shown in FIG.

Further, as means for bringing the etching reaction liquid into a uniform laminar flow state, a large number of etching reactions each having a flow rate adjusting valve 30 as shown in FIG. It is also possible to arrange the liquid supply pipes in alignment with the bottom of the etching bath 3.

[0037]

According to the present invention, since a means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid is provided, an extra treatment tank of the prior art is not required, and it is simple. With a simple system configuration, a simple etching apparatus capable of controlling the erosion amount dimension with high accuracy can be obtained.

Further, since the etching reaction solution is uniformly acted on every position of each wafer and is acted at a uniform flow rate condition among a plurality of wafers in the wafer holder, it is supplied from the bottom of the etching bath. The etching reaction liquid does not become a turbulent turbulent flow, but becomes a laminar flow that flows from the lower part to the upper part while controlling the flow direction at all times. Therefore, the etching process can be performed with higher accuracy in combination with the means for completely eliminating the floating IPA liquid when the silicon substrate is added to the etching reaction liquid.

[Brief description of drawings]

FIG. 1 is a diagram showing a system configuration of an embodiment of a semiconductor substrate etching apparatus according to the present invention.

FIG. 2 is a diagram showing a cross section taken along the line AA of the embodiment shown in FIG.

FIG. 3 is a diagram for explaining an operation of completely removing and resupplying a floating IPA liquid.

FIG. 4 is a diagram showing an example of means for sucking a floating IPA layer.

FIG. 5 is a diagram showing another embodiment of the driving method of the guide of the etching reaction liquid.

FIG. 6 is a diagram showing another embodiment for realizing a uniform laminar flow state.

FIG. 7 is a diagram showing an example of a manufacturing process of a high withstand voltage large current integrated circuit adopting a dielectric isolation method.

FIG. 8 is a perspective view showing a surface structure of a silicon substrate formed by an anisotropic etching method.

FIG. 9 is a diagram illustrating an anisotropic etching method in the manufacturing process of the dielectric isolation substrate.

FIG. 10 is a diagram showing a system configuration of a conventional apparatus in which a saturated IPA concentration creation apparatus is provided in addition to the etching reaction apparatus, and only the etching reaction solution is circulated to perform etching in the etching reaction apparatus without a floating IPA phase. ..

[Explanation of symbols]

 1 Silicon Substrate (Wafer) 2 Wafer Holder 3 Etching Tank 4 Overflow Weir 5 Etching Reaction Liquid 5 6 Floating IPA Liquid 7 Circulation Piping 8 Circulation Pump 9 Heater 10 Temperature Controller 11 Temperature Sensor 12 Filter 13 Flowmeter 14 Discharge Piping 15 Valve 16 Heater 17 Supply Tank 18 Valve 19 Nitrogen 20 Piping 21 Resupply Piping 22 Straightening Plate 23 Flat Cross Section (Oval) Shaft 24 Mounting Table 25 Magnet Coupling 26 Motor 27 Water Cooling Snake Cooler 28 Suction Pipe 29 Swing Guide 30 Flow Control Valve P1, P2 pump 51 Etching reaction device 52 Saturated IPA concentration preparation device 53 Magnet stirrer 54 Stirrer 70 Etching tank 75 Magnet stirrer 80 Etching reaction liquid 85 Heater 90 Floating IPA liquid 100 Silicon Body 100a, 100b, 100c single crystal island 150 holder 200 a silicon dioxide film 200a, 200b, 200c silicon dioxide film 300 isolation grooves 300a, 300b, 300c separation groove 400 polycrystalline silicon 500 electrode 600 compensation pattern 1000 dielectric isolation substrate

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuo Watanabe 2-9-1, Aize-cho, Hitachi City, Ibaraki Prefecture Hitachi Equipment Engineering Co., Ltd.

Claims (10)

[Claims] 1. A first phase in which a first component having a large specific gravity and a small amount of a second component having a small specific gravity are mixed in an etching tank, and a first phase is laminated on the first phase and a small amount of the first component is mixed with the second component. In a device for etching a semiconductor body immersed in the first phase with an etching solution containing a second phase, an overflow weir partitioned from the etching tank by a partition lower than a lower end of the second phase, Means for sucking and recovering the etching solution consisting of the first phase and the second phase above the partition from the overflow weir prior to the immersion of the semiconductor substrate; and the partitioning of the recovered etching solution after the immersion of the semiconductor substrate. And a means for re-supplying to the etching bath from a higher position than the above. 2. A first phase in which a first component having a large specific gravity and a small amount of a second component having a small specific gravity are mixed in an etching tank, and a first phase is laminated on the first phase and a small amount of the first component is mixed with the second component. In a device for etching a semiconductor body immersed in the first phase with an etching solution containing a second phase, an overflow weir partitioned from the etching tank by a partition lower than a lower end of the second phase, Means for sucking and recovering the etching solution consisting of the first phase and the second phase above the partition from the overflow weir prior to the immersion of the semiconductor substrate, and etching after the recovery and prior to the immersion of the semiconductor substrate The liquid is supplied from the bottom of the etching bath to remove the thin film of the second phase remaining on the liquid surface, and the first phase of the etching liquid is absorbed from the overflow weir during etching. An etching solution circulating means for performing a predetermined treatment such as control of the temperature of the drawing solution and supplying and circulating the solution from the bottom of the etching tank, and the etching solution recovered after the semiconductor substrate is immersed in the etching solution from a position higher than the partition. An etching apparatus for a semiconductor substrate, comprising: a means for re-supplying to a bath. 3. A first phase in which a first component having a large specific gravity and a small amount of a second component having a small specific gravity are mixed in an etching bath, and a first phase is laminated on the first phase and a small amount of the first component is mixed with the second component. In a device for etching a semiconductor body immersed in the first phase with an etching solution containing a second phase, a suction pipe having a suction hole in the second phase and at a position lower than the lower end thereof, A means for sucking and recovering the etching liquid composed of the first phase and the second phase from the suction pipe prior to the immersion of the semiconductor substrate, and a position at which the recovered etching liquid after the immersion of the semiconductor substrate is higher than the first phase. To the etching bath. 4. The etching apparatus for a semiconductor substrate according to claim 1, wherein the etching solution re-supplying unit is provided with a flow rate adjusting valve and is aligned in the etching bath bottom. A semiconductor substrate etching apparatus comprising a supply pipe. 5. The semiconductor substrate etching apparatus according to claim 1, wherein the semiconductor substrate is rotated at a low speed near the bottom of the etching tank to change the flow direction of the etching solution in the etching tank. An etching apparatus for a semiconductor substrate, characterized by comprising flow direction control means having a flat cross section for bringing into a state. 6. The semiconductor substrate etching apparatus according to claim 1, wherein the layer is configured to oscillate at a low speed in the vicinity of the bottom of the etching tank to change the flow direction of the etching solution in the etching tank. An etching apparatus for a semiconductor substrate, characterized in that it is provided with a flow direction control means having a flat cross section for making a flow state. 7. The semiconductor substrate etching apparatus according to claim 1, wherein a predetermined clearance δ is provided between a wafer holder immersed and set in the etching tank and a silicon substrate in the wafer holder. An etching apparatus for a semiconductor substrate, comprising: a mounting table for providing a substrate. 8. A first phase in which a first component having a large specific gravity and a small amount of a second component having a small specific gravity are mixed in an etching tank, and a first phase is laminated on the first phase and a small amount of the first component is mixed with the second component. In the method of etching a semiconductor body immersed in the first phase with an etching solution containing a second phase, the first phase and the second phase are removed from an overflow weir arranged around an etching tank, A method for etching a semiconductor substrate, which comprises immersing and etching. 9. A first phase in which a first component having a large specific gravity and a small amount of a second component having a small specific gravity are mixed in an etching tank, and a first phase is laminated on the first phase and a small amount of the first component is mixed with the second component. In the method of etching a semiconductor body immersed in the first phase with an etching solution containing a second phase, the first phase and the second phase are removed from an overflow weir arranged around an etching tank, and a circulation pump The entire etching solution is pushed up by the above method, the second phase still remaining as a very thin layer on the uppermost part of the etching tank is overflowed into the overflow weir to be removed, and the silicon substrate is immersed and etched. Method for etching a semiconductor substrate. 10. A first phase in which a small amount of a second component having a small specific gravity is mixed with a first component having a large specific gravity in an etching tank, and a first phase laminated on the first phase and a small amount of the first component mixed with the second component. The first solution is formed by the etching solution containing the second phase.
In the method of etching a semiconductor body immersed in a phase, the first phase and the second phase are removed from an overflow weir arranged around the etching tank, and the whole etching solution is pushed up by a circulation pump to obtain the uppermost portion of the etching tank. The second phase still remaining as a very thin layer is overflowed into the overflow weir to be removed, the silicon substrate is immersed, and the removed second phase of the etching solution is returned onto the first phase; A method for etching a semiconductor substrate, which comprises etching.