JPH05189706A - Magnetic head driving circuit - Google Patents

Abstract

PURPOSE:To generate a strong magnetic field although the circuit configuration is simple and miniature by amplifying a driving current for a magnetic field generating coil with a buffer capacitor. CONSTITUTION:The magnetic head driving circuit is equipped with FET1 and FET2 to be in push-pull operation by a recording signal inputted to an input terminal S, one pair of diodes D1 and D2 connected in series between these switching elements and the magnetic field generating coil L connected via a coupling capacitor Cc between these diodes D1 and D2. The buffer capacitor CB is connected in AC-like parallel to this magnetic field generating coil L.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic head drive circuit for controlling a drive current of a magnetic head used when writing an information signal to a magneto-optical disk.

[0002]

2. Description of the Related Art Conventionally, an optical pickup device and a magnetic head are arranged so as to face each other, and a magneto-optical disk is rotatably operated between the optical pickup device and the magnetic head so that information is recorded on the magneto-optical disk. A recording device has been proposed in which signals are written.

When writing an information signal to the magneto-optical disk in this recording apparatus, the signal recording layer of the magneto-optical disk is heated by the irradiation of the condensed light flux by the optical pickup apparatus, and the signal recording layer of the signal recording layer is also heated. An external magnetic field is applied to the heated portion by the magnetic head, so that the magnetization direction of the portion is made to follow the external magnetic field.

The magnetic head has a magnetic field generating coil, and a magnetic field is generated by supplying a drive current controlled by a magnetic head drive circuit to the magnetic field generating coil. The magnetic head drive circuit controls the drive current according to an information signal written in the magneto-optical disk, and the external magnetic field is modulated according to the information signal.

The magnetic head is always 100 μm to 200 μm from the surface of the signal recording layer of the magneto-optical disk.
The movement is controlled so as to follow the magneto-optical disk so that the distance becomes. This movement control can be performed, for example, by bringing a sheet member having a uniform thickness into close contact with the surface portion of the signal recording layer and sliding the magnetic head onto the surface portion of the sheet member.

FIG. 16 shows the above magnetic head drive circuit.
As shown in, a circuit configured by using a plurality of FETs (field effect transistors) that are switching elements is used. The magnetic head drive circuit 114 is connected to a logic circuit 113 to which a recording signal, which is an information signal to be written in the signal recording layer, and a clock signal are supplied.
The magnetic head drive circuit 114 is the same as the logic circuit 113.
The first to sixth FETs 115 and 11 are connected to the gate terminal and are switching-controlled by the logic circuit 113.
It has 6,117,118,119,120. The first and second FETs 115 and 116 are P channel FEs.
T, and the third to sixth FETs 117, 118, 11
Reference numerals 9 and 120 are N-channel FETs.

In the magnetic head drive circuit 114, the positive power source + V is connected to the drain terminals of the first and second FETs 115 and 116. The source terminal of the first FET 115 is the third FET 117
Is connected to the source terminal of the first FET 121 and is also connected to the drain terminal of the fifth FET 119 via the first diode 121. The source terminal of the second FET 116 is connected to the source terminal of the fourth FET 118, and the sixth FE is connected via the second diode 122.
It is connected to the drain terminal of T120. The source terminal of the first FET 115 and the second FET 115
The magnetic field generating coil L across the source terminal of the coil 116.
Are connected.

The above-mentioned third and fourth FETs 117 and 118
Has a drain terminal connected to the negative power source -V. The drain terminals of the fifth and sixth FETs 119 and 120 are grounded.

In the magnetic head drive circuit 114, as shown in the timing chart of FIG. 17, when the recording signal becomes "H" level, it is turned on when the recording signal is "L" level. Had the first FE
The second FET that was turned off when T115 was turned off and the recording signal was at the "L" level.
116 is turned on. Then, the third FE
T117 is turned on only for a period of one pulse based on the clock signal after the recording signal becomes "H" level. The fourth FET 118 is configured to operate the third FET during the period when the recording signal is at “H” level.
Following 117, it is turned on in a pulse form based on the clock signal.

Then, in the magnetic head drive circuit 114, when the recording signal becomes the "L" level, the first FET 115 which is in the off state when the recording signal is the "H" level is turned on. The second FET 116, which has been turned on when the recording signal is at the “H” level, is turned off. At this time, the recording signal of the fifth FET 119 is "L".
After reaching the level, it is turned on for a period of one pulse based on the clock signal. The sixth FET 12
0 is turned on like a pulse based on the clock signal, following the fifth FET 119, while the recording signal is at the “L” level.

Each of the above FETs 115, 116, 117, 1
The switching control of 18, 119, and 120 as described above causes the voltage V _A applied to the magnetic field generating coil L to turn on the third FET 117 after the recording signal becomes the “H” level. During the period in which the state is in the state, the voltage fluctuates from + V to −V, and thereafter, while the recording signal is at “H” level, the fourth FET 118 is 0 when the fourth FET 118 is on, and the fourth FET 118 is off. And sometimes pulsates so that it becomes + V. Then, this voltage V _A is maintained at + V when the recording signal becomes the “L” level.

By controlling the voltage V _A as described above, the current I _H flowing in the magnetic field generating coil L becomes
During the period when the recording signal is at the “H” level, the negative current is maintained at a substantially constant value, and the recording signal is at the “L” level.
During the level period, the positive current is maintained at a substantially constant value.

[0013]

By the way, it is difficult to downsize the magnetic head drive circuit as described above because of the large number of elements constituting the circuit. Also,
Since this magnetic head drive circuit has a large number of elements which are switching-controlled, it is necessary to use a complicated circuit as a logic circuit for controlling this circuit.

Conventionally, such a complicated magnetic head drive circuit has been used because it is necessary to make the magnetic field generated by the magnetic field generating coil L sufficiently large. That is, the magnetic field generating coil L is required to generate a sufficiently strong magnetic field over a distance of about 400 μm in view of the characteristics of the signal recording layer of the magneto-optical disk.

Therefore, the present invention has been proposed in view of the above-mentioned circumstances, and a magnetic head drive circuit capable of generating a sufficiently strong magnetic field while having a simple structure and a small size. The purpose is to provide.

[0016]

In order to solve the above problems and achieve the above objects, a magnetic head drive circuit according to the present invention includes a pair of switching elements that perform push-pull operation according to an input recording signal, and a pair of these switching elements. A pair of commutators connected in series between the switching elements, a magnetic field generating coil whose one end side is connected via a coupling capacitor between the pair of commutators and the other end side is grounded, and this magnetic field generating coil A driving current amplifying capacitor for amplifying the driving current supplied in parallel to the magnetic field generating coil, which is connected in parallel with the AC current, is provided.

[0017]

In the magnetic head drive circuit according to the present invention,
The drive current amplification capacitor, which is connected in parallel to the magnetic field generating coil in an alternating current manner, stores the energy of the recording signal and emits the energy when the recording signal is inverted, and is therefore supplied to the magnetic field generating coil. The drive current is amplified and the magnetic field generated by the magnetic field generating coil is strengthened.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings. As shown in FIG. 12, the magnetic head drive circuit according to the present invention has an optical pickup device 107 and a magnetic head 1 which are arranged to face each other, and a recording device for writing an information signal to a magneto-optical disk 101. Applied to.

As shown in FIG. 13, the magneto-optical disc 101 includes a disc substrate 102 and the disc substrate 1
No. 02 and the signal recording layer 103 adhered and formed. The magneto-optical disk 101 is rotated by a spindle motor 106 between the optical pickup device 107 and the magnetic head 1 when an information signal is written in the recording device.
The signal recording layer 103 via the disc substrate 102
The optical flux collected by the optical pickup device 107 is irradiated onto the signal recording layer 103.
On the other hand, an external magnetic field is applied by the magnetic head 1.

That is, the signal recording layer 103 of the magneto-optical disk 101 is heated by the irradiation of the luminous flux, and when the external magnetic field is applied, the coercive force of the heated portion disappears and the portion of the heated portion disappears. The magnetization direction is configured to follow the external magnetic field.

The central portion of the magneto-optical disk 101 is supported by the drive shaft 105 of the spindle motor 106 via a chucking mechanism 104.

The optical pickup device 107 has an optical block section 110 and an objective lens driving device 109. The optical block unit 110 includes a light source such as a laser diode, an optical device that guides a light beam emitted from the light source, a photodetector that receives the light beam reflected by the magneto-optical disk 101, and the like. The objective lens driving device 109 supports an objective lens 108 which receives the light flux and collects the light flux so as to be movable in two axial directions. The objective lens driving device 109 operates to move the objective lens 108 so as to follow the eccentricity and surface wobbling of the magneto-optical disk 101, so that the focal point of the luminous flux by the objective lens 108 is always on the magneto-optical disk 101. It is located on the surface of the signal recording layer 103.

The optical pickup device 107 is movably supported by a pair of guide shafts 111 and 112, and the objective lens 108 extends over the inner and outer circumferences of the magneto-optical disk 101 supported by the chucking mechanism 104. To face each other.

The magnetic head 1 is configured to have a magnetic field generating coil L, and the magnetic field generating coil L is supplied with a drive current I _H controlled by a magnetic head drive circuit, whereby the external magnetic field is generated. Generate. As shown in FIG. 13, the magnetic head 1 includes a support portion 6 and a circuit portion 7 attached to the support portion 6. The supporting part 6
Is attached via a pressure spring 4 to a distal end side portion 2 of a support arm 8 which is arranged so as to face the magneto-optical disk 101 and can be moved to the inner and outer circumferences of the magneto-optical disk 101. The pressurizing spring 4 is provided with the magnetic head 1
The magneto-optical disk 101 is brought into pressure contact with a predetermined pressure. The slider 3 is attached to the support portion 6 via a damper spring 5. The slider 3 is a signal recording layer 10 of the magneto-optical disk 101.
It is brought into sliding contact with the surface portion of 3. The damper spring 5 moves the magnetic head 1 from the surface of the signal recording layer 103 to
For example, it is levitated by a predetermined distance of about 100 μm.

As shown in FIG. 14, the circuit section 7 includes the magnetic field generating coil L and the magnetic field generating coil L.
And a drive circuit 10 which is a magnetic head drive circuit according to the present invention connected to the. This drive circuit 10
The drive circuit I _H is controlled according to the recording signal by being controlled by the logic circuit 9 to which the recording signal and the clock signal, which are the information signals written in the magneto-optical disk 101, are controlled, and the external The magnetic field is modulated according to the recording signal. That is, the magnetic head 1 uses the so-called magnetic field modulation method to drive the magneto-optical disc 10
1 is configured to write the recording signal.

As shown in FIG. 1, the drive circuit 10 has first and second switching elements FET ₁ and FET ₂ each having a gate terminal connected to an input terminal S to which the recording signal is input. It becomes. The switching elements FET ₁ and FET _{2 form} a pair and perform push-pull operation according to the recording signal. That is, the switching elements FET ₁ and FET ₂ are field effect transistors (FETs), the first switching element FET ₁ is a P-channel FET, and the second switching element FET ₂ is an N-channel FET. is there. The first switching element FET ₁ is turned off (cut off) when the recording signal is at “H” level,
When the recording signal is at "L" level, it is turned on (conducting). On the contrary, the second switching element FET ₂ is
When the recording signal is at "H" level, it is turned on,
When the recording signal is at "L" level, it is turned off.

The drain terminal of the first switching element FET ₁ is connected to the power source V through the _first limiting resistor R _1.
C is connected. The source terminal of the _first switching element FET ₁ is a pair of commutators
And via the second diode D ₁ D ₂ to the drain terminal of the _second switching element FET ₂ . The diodes D ₁ and D ₂ are connected in series with each other, and the direction from the source terminal of the _first switching element FET ₁ to the drain terminal of the _second switching element FET ₂ is a forward direction. There is.

The source terminal of the _second switching element FET ₂ is grounded via the _second limiting resistor R ₂ .

In the drive circuit 10, one end of the magnetic field generating coil L is connected between the first diode D ₁ and the second diode D ₂ via the coupling capacitor C _C , and the other end thereof is connected. It is grounded.

Further, in this drive circuit 10,
AC parallel to the magnetic field generating coil L,
A buffer capacitor C _{B serving as} a drive current amplifying capacitor for amplifying the drive current supplied to the magnetic field generating coil L is connected. That is, the buffer capacitor C _B has one end connected to one end of the magnetic field generating coil L and the other end grounded. Alternatively, as shown in FIG. 15, the buffer capacitor C _B may have one end connected to one end of the magnetic field generating coil L and the other end connected to the power supply V _C.

[0031] When shown by an equivalent circuit drive circuit 10 shown by FIG. 1, as shown in FIG. 2, first to fourth capacitor C connected in turn in series to the power source V _C
The circuit has ₁ , C ₂ , C ₃ , and C ₄ . The capacitors C ₁ , C ₂ , C ₃ , C ₄ are connected in parallel with the first to fourth switches SW ₁ , SW ₂ , S, respectively.
W ₃ and SW ₄ are correspondingly connected.

In the equivalent circuit shown in FIG. 2, the first capacitor C ₁ and the first switch SW are
₁ corresponds to the _first switching element FET ₁ . The second capacitor C ₂ and the second switch SW ₂ correspond to the first diode D ₁ . The third capacitor C ₃ and the third switch SW ₃ correspond to the second diode D ₂ . Then, the fourth capacitor C ₄ and the fourth switch SW ₄ are the second switching element FET.
Corresponds to ₂ . Each switching element FET ₁ F
This is because the ET ₂ has a feedback capacitance in parallel and can be regarded as a switch that can be switched between an on state and an off state according to the recording signal. That is, these switching elements FE
T ₁ FET ₂ is short-circuited when it is on,
In the off state, it becomes the feedback capacitance. Further, each of the diodes D ₁ and D ₂ can be regarded as a switching element in which the ON state and the OFF state are controlled to be switched depending on the direction of the voltage gradient on both end sides.
This is because it can be regarded as having the inter-terminal capacitance in parallel, like T ₁ and FET ₂ .

In the equivalent circuit, the magnetic field generating coil L has one end side having the second capacitor C ₂
And a third capacitor C ₃ and the offset voltage source V _OFC is applied to the other end side. The offset voltage source V _OFC has an anode side connected to the magnetic field generating coil L and a cathode side grounded. The buffer capacitor C _B has one end connected to one end of the magnetic field generating coil L and the other end grounded.

The operation of the drive circuit 10 will be described with reference to the equivalent circuit. In the initial state shown by T ₁ in FIG. 11 in which the recording signal is at the "L" level, the gates of the switching elements FET ₁ and FET ₂ are gated. Terminal is "L"
The level is made. At this time, as shown in FIG.
The first switching element FET ₁ is turned on, the first capacitor C ₁ disappears, the second switching element FET ₂ is turned off, and the fourth switching element FET ₂ is turned off.
Capacitor C ₄ appears. The first diode D ₁
Is in the ON state because the voltage on both ends is in the forward direction, and the second capacitor C ₂ has disappeared. Further, the second diode D ₂ is in the OFF state because the voltage on both ends is in the opposite direction, and the third capacitor C ₃ appears.

The offset voltage source V _OFC of the magnetic field generating coil L is alternately connected to the power source V _C and the ground via the magnetic field generating coil L. The ratio of these times is constant over a certain time width. For example, when the recording signal is the EFM modulation used for a so-called compact disc, 10
Since it is μsec and duty is 1/2, it is smoothed by the power supply and becomes a constant voltage source of V _OFC .

The voltage at one end of the magnetic field generating coil L is
Since the threshold voltage is sufficiently small, if neglected, it becomes Vc. That is, the voltages of the power source Vc and the offset voltage source V _OFC are applied to the magnetic field generating coil L. Therefore, the drive current I _H flowing through the magnetic field generating coil L flows in the negative direction from the one end side of the magnetic field generating coil L toward the offset voltage source V _OFC as shown by the arrow I ₁ in FIG. Gradually increases to the minus side. In the process in which the current flows as described above, energy as magnetic flux is accumulated in the magnetic field generating coil L.

Next, as shown by arrow T ₂ in FIG. 11, in the period after the recording signal is inverted to the “H” level, the gate terminals of the switching elements FET ₁ and FET ₂ are at the “H” level. By doing so, in the equivalent circuit, as shown in FIG. 4, the first switching element FET ₁ is turned off, the first capacitor C ₁ appears, and the second switching element FET ₁ appears. ₂
Is turned on and the fourth capacitor C ₄ disappears. The respective diodes D ₁ and D ₂ maintain the states up to then. The magnetic field generating coil L tries to flow a current in the same direction as the current flowing up to that point by the energy of the magnetic flux stored up to that point. Charges for maintaining this current are supplied from the first and third capacitors C ₁ and C ₃ and the buffer capacitor C _{B as} shown by arrows I ₁ , I ₂ and I ₃ in FIG. As a result, the voltage V _H on the one end side of the magnetic field generating coil L decreases. The drive current I _H flowing through the magnetic field generating coil L initially flows in the same direction as before, but since the energy is used by the movement of electric charges, it gradually decreases.

When the energy stored in the magnetic field generating coil L is released and becomes 0, T in FIG.
_As indicated by ₃ , the voltage V _H becomes the minimum value V− _P .
At this time, in the equivalent circuit, the drive current I _H becomes 0, as shown in FIG. On the other hand, maximum energy is stored in the first and third capacitors C ₁ and C ₃ and the buffer capacitor C _B. That is, the first capacitor C ₁ has C ₁ {V _C − (V
_-P )} energy is stored. The energy of C ₃ (V− _P ) is stored in the third capacitor C ₃ . The buffer capacitor C
To of _B, energy of C _B (V- _P) is stored. Note that C ₁ in the equation showing these energy amounts,
C ₃ and C _B are the first and third capacitors C and C, respectively.
₁ and C ₃ and the buffer capacitor C _B.

Immediately after the moment when the energy stored in the magnetic field generating coil L becomes 0, as shown by an arrow T ₄ in FIG. 11, the offset voltage V _OFC and the minimum value V-
The drive current I _H is inverted in the positive direction according to the potential difference from _P. Then, in the above equivalent circuit,
As shown in FIG. 6, the first diode D ₁ is turned off when the voltage across the first diode D ₁ is reversed, and the second capacitor C ₂ appears. Therefore, what is connected to the magnetic field generating coil L is the capacitance of the third capacitor C ₃ and the buffer capacitor C _B , and as shown by arrows I ₅ and I ₆ in FIG. Transfer of charge from the above to the third capacitor C ₃ and the buffer capacitor C _B. This charge transfer is
As indicated by an arrow I ₇ in FIG. 6, a drive current is generated in the magnetic field generating coil L, and the voltage V _H is grounded.
It continues until the level is reached.

At this time, the second capacitor C
_The current Δi flowing out of ₂ is a minute current and can be ignored.

Then, in the period shown by the arrow T ₅ in FIG. 11 after the voltage V _H becomes the ground level, in the equivalent circuit, as shown in FIG. 7, the second diode D ₂ Is turned on due to the forward voltage of both ends, and the third capacitor C ₃ disappears. Therefore, the voltage V _H is fixed to the ground level by being grounded. A voltage over the ground level is applied to the magnetic field generating coil L by the offset voltage V _{OF C} , and the drive current I _H shown by arrows I ₇ and I ₈ in FIG. 7 slightly increases in the positive direction. At this time,
Energy is accumulated in the magnetic field generating coil L.

Considering the transfer of electric charges in the magnetic field generating coil L up to this point, the magnetic field generating coil L is initially set.
All the energy stored in the capacitor is once supplied to the first and third capacitors C ₁ and C ₃ and the buffer capacitor C _B. The energy supplied from the capacitors C ₁ , C ₃ , and C _B to the magnetic field generating coil L is such that the first diode D ₁ is turned off and the second capacitor C ₂ appears. First
Since the capacitor C ₁ is disconnected from the magnetic field generating coil L, only the energy from the _third capacitor C ₃ and the buffer capacitor C _B is left. Therefore, the effective current value I _E when the external magnetic field is reversed is
The maximum value I− _P of the drive current I _H just before the recording signal is inverted to the “H” level is expressed as follows: _IE = I− _P · (C ₃ + C _B ) / (C ₁ + C ₃ + C _B )・ ・ ・ ・ ・ ・ ・ ・ (Formula 1)

Considering the case where the buffer capacitor C _B is not connected, the effective current value I
_E is a _{I E = I- P · C 3} / (C 1 + C 3) ·········· ( second type). Since (C ₃ + C _B ) / (C ₁ + C ₃ + C _B ) is always larger than C ₃ / (C ₁ + C ₃ ), the buffer capacitor C _B increases the drive current I _H. I understand that

Further, the change of the voltage V _H is as shown by the solid line in FIG. 11, as compared with the case where the buffer capacitor C _B shown by the alternate long and short dash line in FIG. 11 is not connected.
The minimum value V- _P is slightly large, and the time to reach the ground potential is slightly long. The change in the drive current I _H is greater than that in the case where the buffer capacitor C _B indicated by the alternate long and short dash line and arrow B in FIG. 11 is not connected.
As shown by the solid line and arrow A in FIG. 11, the amplitude of fluctuation is wide.

When the recording signal is inverted to the "L" level, the switching elements FET ₁ FET ₂
8 becomes "L" level, and in the above equivalent circuit, as shown in FIG. 8, the first switching element FET ₁ is turned on and the first capacitor C ₁ is turned on.
Disappears, the second switching element FET ₂ is turned off, and the fourth capacitor C ₄ appears. In the period after the recording signal indicated by arrow T ₆ in FIG. 11 is inverted to the “L” level, arrows I ₉ , I ₁₀ , in FIG.
As indicated by I ₁₁ , the magnetic field generating coil L supplies electric charges to the second and fourth capacitors C ₂ and C ₄ and the buffer capacitor C _B by the stored energy. At this time, the drive current I _{H in the} plus direction indicated by the arrow I ₇ in FIG. 8 flows through the magnetic field generating coil L. At this time, the voltage V _H rises.

The above-mentioned first switching element FET
_1, i.e., the charge Q ₁ accumulated in the said first capacitor C _1, the first switching element FET ₁
Is turned on, the voltage is fed back to the power supply V _C.

When the energy stored in the magnetic field generating coil L indicated by T ₇ in FIG. 11 becomes 0, the drive current I _H is set as shown in FIGS. 9 and 11.
Becomes 0 and the voltage V _H becomes the maximum value V _P. Therefore, the second and fourth capacitors C ₂ ,
The maximum energy is stored in C ₄ and the buffer capacitor C _B. That is, the second to the capacitor C _2, the energy of _{C 2} (V _P -V C) are stored. In addition, the fourth capacitor C ₄ has a C ₄
The energy of V _P is stored. The energy of C _B V _P is stored in the buffer capacitor C _B. In addition, C in the formula showing these energy amounts
₂ and C ₄ are the second and fourth capacitors C, respectively.
₂ and C ₄ capacity. Further, the both ends of the magnetic field generating coil L, the voltage of the voltage value (V _P -V _{O FC)} is applied.

During the period shown by the arrow T ₈ in FIG. 11 after the energy stored in the magnetic field generating coil L becomes 0, as shown in FIG. 10, the magnetic field is being applied to the magnetic field generating coil L. Depending on the voltage, as shown by arrows I ₁₂ and I ₁₃ in FIG. 10, the magnetic field generating coil L is generated from the second capacitor C ₂ and the buffer capacitor C _B.
The transfer of charge towards That is, the drive current I _H has a negative direction, as indicated by an arrow I ₁₄ in FIG. At this time, in the equivalent circuit, the second diode D ₂ is turned off by reversing the voltage on both ends in the opposite direction, so that the third capacitor C ₃ appears. Therefore, the fourth capacitor C
₄ is separated from the magnetic field generating coil L while having electric charge. The third capacitor C ₃ supplies a current Δi ′ indicated by an arrow i ′ in FIG. 10 to the fourth capacitor C 3 in response to the movement of charges from the second capacitor C ₂ to the magnetic field generating coil L. donates _4, this current Δi'
Is so small that it can be ignored.

Due to the movement of the charges from the second capacitor C ₂ to the magnetic field generating coil L, the voltage V _H drops and becomes equal to the offset voltage V _OFC . When the voltage V _H becomes equal to the offset voltage V _OFC ,
In the above equivalent circuit, the first diode D ₁ is turned on by the forward voltage of both ends, and the second capacitor C ₂ disappears. This state is the initial state described with reference to FIG. 3 and indicated by arrow T ₁ in FIG. At this time, the electric charge stored in the fourth capacitor C ₄ is discharged to the ground terminal.

The effective current value _IE when the recording signal is inverted to the "L" level is represented by the maximum value I _P of the drive current I _H immediately before the recording signal is inverted to the "L" level. , a _{I- E = I P · (C} 2 + C B) / (C 2 + C 4 + C B) ·········· ( third type).

Considering the case where the buffer capacitor C _B is not connected, the effective current value I- _{E
Is, I- E = I P · C} 2 / (C 2 + C 4) becomes .......... (fourth type). Since (C ₂ + C _B ) / (C ₂ + C ₄ + C _B ) is always larger than C ₂ / (C ₂ + C ₄ ), the buffer capacitor C _B increases the drive current I _H. I understand that

Further, the change in the voltage V _H is as shown by the solid line in FIG. 11 as compared with the case where the buffer capacitor C _B shown by the alternate long and short dash line in FIG. 11 is not connected.
The maximum value V _P is slightly small, and the time to reach the voltage potential V _C is slightly long.

The capacitance of the buffer capacitor C _B is the third and fourth capacitors on the equivalent circuit when the recording signal is a signal of 2 MHz and the magnetic field generating coil L has an inductance of 6 μH. C ₃ ,
It is advisable to set the total capacitance with C ₄ to be about 26 pf. That is, when the recording signal is a 2 MHz signal, the frequency f represented by f = 1 / {2π (C _T · L) ^(1/2) } is set to be 4 MHz to 5 MHz. In this equation, C _T is the total capacitance of the third and fourth capacitors C ₃ and C ₄ and the buffer capacitor C _B , and L is the inductance of the magnetic field generating coil L. From this formula, the capacitance C _T is about 26 p
f. Since the total capacity of the third and fourth capacitors C ₃ and C ₄ is about 10 pf, the optimum value of the capacity of the buffer capacitor C _B is about 16 pf.

[0054] In the drive circuit 10 described above, the respective limiting resistors R _1, R ₂ is limit the charge amount per unit time for each capacitor _{C 1, C 2, C 3} , C 4, C B in the equivalent circuit By doing so, the influence of the characteristic error of each electronic element constituting the drive circuit 10 on the characteristic of the drive circuit 10 is suppressed. Further, the buffer capacitor C _B not only amplifies the drive current I _H , but also
The influence of the characteristic error of each electronic element constituting the drive circuit 10 on the characteristic of the drive circuit 10 is suppressed.

[0055]

As described above, in the magnetic head drive circuit according to the present invention, the drive current amplification capacitor connected in parallel to the magnetic field generation coil in an alternating current is
The energy of the recording signal is stored, and the energy is emitted when the recording signal is inverted. Therefore, in this magnetic head drive circuit, the drive current supplied to the magnetic field generation coil is amplified by the drive current amplification capacitor,
The magnetic field generated by the magnetic field generating coil is strengthened.

That is, the present invention can provide a magnetic head drive circuit capable of generating a sufficiently strong magnetic field while having a simplified structure and a reduced size.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a magnetic head drive circuit according to the present invention.

FIG. 2 is a circuit diagram showing an equivalent circuit of the magnetic head drive circuit.

FIG. 3 is a circuit diagram showing an initial state in which a recording signal is at “L” level in the equivalent circuit.

FIG. 4 is a circuit diagram showing a state when a recording signal becomes “H” level in the equivalent circuit.

FIG. 5 is a circuit diagram showing a state when the energy of the magnetic field generating coil in the equivalent circuit is 0.

FIG. 6 is a circuit diagram showing a state after the energy of the magnetic field generating coil has become 0 in the equivalent circuit.

FIG. 7 is a circuit diagram showing a state when the voltage on one end side of the magnetic field generation coil in the equivalent circuit is at the ground level.

FIG. 8 is a circuit diagram showing a state when the recording signal becomes “L” level in the equivalent circuit.

FIG. 9 is a circuit diagram showing a state when the energy of the magnetic field generating coil becomes 0 after the recording signal becomes “L” level in the equivalent circuit.

FIG. 10 is a circuit diagram showing a state in which a current flows in a reverse direction to a magnetic field generation coil after a recording signal has become “L” level in the equivalent circuit.

FIG. 11 is a recording signal in the magnetic head drive circuit,
6 is a time chart showing the relationship between the voltage at one end of the magnetic field generation coil and the current flowing through the magnetic field generation coil.

FIG. 12 is a perspective view showing a configuration of a main part of a recording apparatus configured using the magnetic head drive circuit.

FIG. 13 is an enlarged side view schematically showing the configuration of the magnetic head of the recording apparatus.

FIG. 14 is a block diagram showing a connection relationship of magnetic heads in the recording apparatus.

FIG. 15 is a circuit diagram showing another example of the configuration of the magnetic head drive circuit.

FIG. 16 is a circuit diagram showing a configuration of a conventional magnetic head drive circuit.

FIG. 17 is a time chart showing the relationship between the recording signal, the voltage at one end of the magnetic field generating coil, and the current flowing through the magnetic field generating coil in the conventional magnetic head drive circuit.

[Explanation of symbols]

FET ₁・ ・ ・ ・ ・ ・ ・ ・ ・ ・ First switching element FET ₂・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Second switching element D ₁・ ・ ・ ・ ・ ・ ・ ・ ・ ・· first diode D ₂ ············ second diode C _C ············ coupling capacitor C _B ········ ··· Buffer capacitor L ······ Magnetic field generating coil S ····· Input terminal

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[Procedure amendment]

[Submission date] February 28, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction content]

In the magnetic head driving device 114, the positive power source + V is connected to the drain terminals of the first and second FETs 115 and 116. The source terminal of the first FET 115 is the third FET 117
And the drain terminal of the fourth FET 118 via the first diode 121. The source terminal of the second FET 116 is connected to the source terminal of the fifth FET 119, and the sixth FE is connected via the second diode 122.
It is connected to the drain terminal of T120. The source terminal of the first FET 115 and the second FET 115
The magnetic field generating coil L across the source terminal of the coil 116.
Are connected.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction content]

The third and fifth FETs 117 and 11
The drain terminal of 9 is connected to the negative power source -V. The drain terminals of the fourth and sixth FETs 118 and 120 are grounded.

[Procedure 3]

[Document name to be corrected] Drawing

[Correction target item name] Fig. 16

[Correction method] Change

[Correction content]

FIG. 16

Claims (1)

[Claims] 1. A pair of switching elements that perform push-pull operation according to an input recording signal, a pair of commutators connected in series between the pair of switching elements, and one end side of which is coupled between the pair of commutators. A magnetic field generating coil connected through a capacitor and the other end side of which is grounded, and a drive current amplifier which is connected in parallel to the magnetic field generating coil in alternating current and amplifies the drive current supplied to the magnetic field generating coil. Magnetic head drive circuit comprising a capacitor for use in a magnetic head.