JPH05181670A - Microprogram system computer - Google Patents

Abstract

PURPOSE:To facilitate the addition of macro instructions and to reduce control memory capacity. CONSTITUTION:A main storage region 1 for software and a microinstruction storage region 3 to store micro instructions V-Z required for executing any specified macro instruction B, for example, having no microprogram to be executed are provided in one memory space and when executing a macro instruction sequence containing the specified macro instruction B stored in the main storage region, this specified macro instruction B is executed by the macro instructions V-Z which are stored in the macro instruction storage region 3 and can be executed by the microprogram already stored in a control memory.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microprogram type computer.

[0002]

2. Description of the Related Art A central processing unit of a computer has a control function of successively reading out a series of instructions (programs) from a main storage device, decoding them, and executing operations. The control operation is performed sequentially and has been realized by a complicated sequence control circuit. The program control of this sequence control is the microprogram system. In this method, the microprogram is stored in a high-speed dedicated storage device (microprogram memory), and one instruction is executed by the microprogram which is a combination of many microinstructions.

FIG. 4 is a diagram for explaining the sequence control of the micro program system. The sequence control proceeds step by step in such a manner that the next basic operation is selected according to the basic operation and the resulting state information. The microprogram system replaces each of these steps with the form of executing a program, and performs a basic operation in the form of execution of a microinstruction, and selects the next microinstruction based on the resulting state information. Control is realized.

In the microprogram system, a data structure (various registers, ALU) is associated with each instruction (macro instruction).
There is a set (microprogram or microinstruction string) of microinstructions (control instructions for gates to various registers and ALUs, etc.) for controlling the It The microinstruction is decoded and becomes a control signal to each part of the data structure, and a new microinstruction is read out step by step.

When it is sufficient to read the microprogram instructions in order, the address of the next microinstruction can be obtained by incrementing the address by 1. However, if the microinstruction itself has the address of the next microinstruction to be executed. There is also a method. When it is desired to change the control sequence according to the internal state of the data structure changed as a result of executing a certain microinstruction, the address is modified by this state information and the next microinstruction is read.

Conventionally, necessary microprograms have been prepared for the execution of all macroinstructions, and microprogram instruction sequences have been required for each type of macroinstruction. FIG. 5 is a diagram showing execution of a microprogram including such macro instructions. Each of the instructions A to C is directly composed of a microprogram sequence.

FIG. 6 shows a main memory area when the instructions shown in FIG. 5 are executed, and programs A, B and C are shown.
Is stored and is executed in the order of A, B, and C.
FIG. 7 is a diagram showing the relationship between this program and the microprogram memory (control memory) shown in FIG. 4. In a specific example, when an ADD instruction (macro instruction) comes out, the microprogram for it is selected. When the COMPARE instruction comes out next, the microprogram for this instruction is selected and executed.

[0008]

As described above, it is necessary to store the microprogram necessary for executing all the macro instructions used in the control memory. Therefore, the more kinds of macro instructions there are, the more kinds of micro program instructions become, and the more complicated the function of each macro instruction becomes, the larger the size (number of steps) of the micro programs executed. Also became large and required a large amount of control memory. Further, in such a case, when a macro instruction is newly added, a new control storage capacity is required accordingly.

Since the control memory is usually composed of a high-speed and relatively small-capacity memory, the total number of steps is limited, and when the capacity is full, new instructions cannot be added. Further, it has been necessary to provide an expensive high-speed and large-capacity memory from the beginning in anticipation of such a capacity shortage.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a microprogram type computer which facilitates addition of a new macro instruction and realizes control storage with a small capacity.

[0011]

To achieve the above object, a main memory area for software and a macro instruction necessary for executing a specific macro instruction having no microprogram to be executed are stored in one memory space. A macro program work area 2 having a macro instruction storage area 3 and a save area 4 is provided to execute the macro instruction sequence including the particular macro instruction stored in the main memory area 1 when executing the particular macro instruction. Is stored in the macroinstruction storage area 3, and is executed by a macroinstruction which can be executed by the microprogram already stored in the control memory.

When executing the specific macro instruction, the save area 4 is provided with the hardware resources necessary for continuing the execution of the macro instruction next to the specific macro instruction.
, The interrupt is masked, the flag indicating the emulation mode is turned on, the macro instruction sequence stored in the macro instruction storage area 3 is executed, and the emulation flag provided at the end of the macro instruction sequence is executed. If is turned on, a special macro instruction indicating the completion of emulation is provided,
When this macro instruction is executed, the flag is turned off to restore the hardware resources saved in the save area, and the next macro instruction is executed.

[0013]

With the above structure, when a specific macro instruction is executed, the macro instruction stored in the macro instruction storage area is executed, but this macro instruction can be executed by the microprogram already stored in the control memory. Since such a macro instruction is used, it is not necessary to previously store the microprogram for this specific macro instruction in the control memory.
Therefore, it is not necessary to increase the control storage capacity, and a new macro instruction can be easily added. As a matter of course, macroinstructions other than the specific macroinstruction stored in the main memory are executed by the corresponding microprogram stored in the control memory.

When a specific macro instruction is executed, hardware resources such as a program counter and general-purpose registers necessary for executing the next macro instruction are saved in a save area, and interrupts are masked to prevent interrupts. Then
After turning on the flag indicating the emulation mode, the macro instruction stored in the macro instruction storage area is read and executed. If the emulation flag provided at the end of this macro instruction sequence is on, the emulation is completed. The special macro instruction shown is provided, and when this macro instruction is executed, the flag is turned off, the hardware resources saved in the save area are returned to the respective registers, and then the macro instruction is executed.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. The present invention uses a basic or existing (implemented) macro instruction having a means for executing a complicated macro instruction or a macro instruction to be added by an existing microprogram or hardwired in a microprogram type computer. , Software emulates as if it were executing the instruction.

The emulated program is described by the above-mentioned basic or existing macro instruction, the instruction is expanded in the macro instruction storage area of the memory space, and the target macro instruction is executed by the emulated program. Executed. For that purpose, the following functions are provided in addition to the functions of the usual microprogram system.

In the case of a specific macro instruction (instruction to be emulated), the hardware necessary for continuing execution of the instruction next to the specific macro instruction after emulation such as the contents of the program counter and general-purpose register. Function that saves hardware resources Emulate flag that indicates that emulation is in progress Function that suppresses interrupts when a macro instruction for emulation is being executed Macro instruction that indicates the end of emulation. This macro instruction indicates the end of emulation during emulation (it may or may not be specially defined except during emulation), and has the function of shifting processing to the macro instruction following the emulated instruction. .. By the emulation end instruction, the emulation flag is turned off, the previously saved data is restored to each register, and the next macro instruction is executed.

FIG. 1 shows an embodiment in which the present invention is applied to the macro instruction B when the macro instructions A, B and C are executed. FIG. 2 shows the state of the main memory in this case. The macro instructions A and C are read from the microprogram memory and executed as described with reference to FIGS. Macro instruction B
The macro instructions V, W, X, Y, Z required to execute
It is stored in the macro instruction work area as shown in FIG. These macro instructions V to Z are executed by the micro program already stored in the control memory.

S in FIG. 1 contains microinstructions for performing the following operations. When the macro instruction B is detected, the hardware resources such as the program counter and general-purpose registers are saved in the save area R shown in FIG. 2, the emulation mode flag is turned on to disable (mask) the interrupt, and the program counter is emulated. Set the start address of the macro instruction sequence that executes the program and start execution of the emulated program.

Further, T in FIG. 1 contains a macro instruction for restoring the data saved in the save area R to the original register or the like. When restoring the program counter, the instruction length of the macro instruction B is added.

Next, the operation of FIGS. 1 and 2 will be described. When the macro instruction B is detected and the macro instruction B is detected next,
Starts execution of the micro instruction sequence that instructs emulation start. There, a program counter, a general-purpose register, and an interrupt mask are saved in the save area R, interrupts are masked (interrupts are disabled), an emulation flag is turned on, and then a macro instruction sequence for emulating macro instructions is written. Contains a microinstruction or microinstruction string that sets the start address in the program counter.

When the micro program is executed, the emulation program is activated. As a matter of course, since the emulation macro instruction sequences V to Z are macro instructions, the micro programs are sequentially activated corresponding to the respective macro instructions. This is macro command B
Of macro commands V to Z already incorporated in the macro command work area
You are emulating with.

Eventually, at the end of emulation, the macro instruction Z
To run. This instruction means the end of emulation when the emulation mode flag is on. (When the emulation flag is off, it is not specified in this embodiment, but it is preferable to have a function of recognizing an undefined instruction.) When the execution of this macro instruction Z is started, the execution micro instruction is saved. The interrupt mask that was saved is restored together with the program counter, and the emulation flag is turned off. As a result, execution is started from the macro instruction C. In this process, the macro instruction is executed in the order A, B, C.

FIG. 3 shows a specific example of the macro instruction B. The macro instruction B is a macro instruction AD as shown in the figure.
It consists of D, MLT, ADD, DIV and emulate end instructions, and these macro instructions are executed by the corresponding microprogram.

The advantages of using this embodiment as described above are as follows. The capacity of expensive control storage can be saved. Even if the hardware is changed, the emulation program does not need to be changed because it is written in the computer architecture used. That is, the emulated program created once can be used thereafter. On the other hand, microinstructions change as the hardware changes, so
If you change the hardware, you also need to change the microprogram. Since it is not necessary to create a microprogram corresponding to the macro instruction B and store it in the control memory, the number of steps required for this creation can be saved. Further, since this emulation program can be used thereafter, the need for bugs is eliminated and the reliability of the computer is improved.

[0026]

As is apparent from the above description, the present invention does not necessarily store macro instructions in an expensive control unit, so that the cost of the computer can be reduced and the capacity of control storage can be reduced. Macro instructions can be added without consideration.

[Brief description of drawings]

FIG. 1 is a diagram showing an instruction execution order according to an embodiment of the present invention.

FIG. 2 is a diagram showing a main storage area during execution of the embodiment.

FIG. 3 is a diagram showing a specific example of a macro instruction B.

FIG. 4 is a diagram illustrating sequence control of a micro program system.

FIG. 5 is a diagram illustrating an instruction execution order of a conventional example.

FIG. 6 is a diagram showing a main storage area of a conventional example.

FIG. 7 is a diagram illustrating a relationship between a program on a main memory and a microprogram memory.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toru Watanabe 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Takumi Maruyama 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited ( 72) Inventor Takumi Takeno, 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, Fujitsu Limited (72) Inventor Shinya Kato, 1015, Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Pawnshy Chon Suvarnapa Isan 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Within Fujitsu Limited

Claims (2)

[Claims] 1. A main memory area for software (1) in one memory space and a macro instruction storage area (3) for storing a macro instruction necessary for executing a specific macro instruction having no microprogram to be executed. And save area (4)
And a microprogram work area (2) having
An execution of the specific macro instruction is stored in the macro instruction storage area (3) when a macro instruction sequence including the specific macro instruction stored in the main storage area (1) is executed; A microprogram type computer characterized by being executed by a macro instruction which can be executed by a microprogram already stored in a control memory. 2. When executing the specific macro instruction, the hardware resource necessary for continuing the execution of the macro instruction next to the specific macro instruction is saved in the save area (4) and an interrupt is generated. The mask instruction is set, the flag indicating the emulation mode is turned on, the macro instruction sequence stored in the macro instruction storage area (3) is executed, and if the emulation flag provided at the end of the macro instruction sequence is on. A special macro instruction indicating completion of emulation is provided, and when this macro instruction is executed, the flag is turned off and the hardware resource saved in the save area is restored and execution of the next macro instruction is executed. The microprogram computer according to claim 1.