JPH05175940A - Error correction system - Google Patents

Abstract

PURPOSE:To obtain a decoding signal with high reliability by spreading an error detection coding signal into an error correction code word so as to implement error correction coding, sending the result, selecting plural objects of decode words at a receiver side thereby discriminating the presence of an error. CONSTITUTION:An inputted information signal is coded by an error detection code, the coded signal is divided into m-sets of signals and subject to error correction coding, and the result is sent. A demodulator 5 demodulates the signal at a receiver side, an error correction decoding circuit 6 selects plural objects of the code word with respect to m-sets of error correction coding signals and they are stored in buffers 71-7m. Then the buffers 71-7m select an object signal by a command from a decoding-object selection circuit 9 and outputs the selected signal to an error detection circuit 8. The circuit 8 discriminates the presence of an error due to an error detection code and outputs a signal of a set in which no error is detected as decoding information. Thus, the reception signal is decoded with high reliability.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an error control system used for highly reliable digital information in digital communication systems, digital storage systems and the like.

[0002]

2. Description of the Related Art In recent years, error correction codes have been widely used in digital communication systems and digital storage systems in order to improve the reliability of information. For example, the code length n,
When the (n, k, d) error correction code having the number of information points k and the minimum code distance d is used, the decoding method can be roughly classified into two types. The first method is to determine whether each received bit is 1 or 0, generate a reception vector consisting of n bits, and output a codeword having a Hamming distance closest to this reception vector. Since the Hamming distance between them is d, it is possible to correct errors up to (d-1) / 2 using the algebraic structure of the code. The second method is to generate a reception vector consisting of n elements while holding the level of each received bit, and to output the codeword having the closest Euclidean distance to this reception vector. Can be decoded by finding the code word with the highest value.
This is maximum likelihood decoding for the received signal. The first method is known as hard-decision decoding, and the second method is known as soft-decision decoding. The second method is better in energy-to-noise ratio Eb / N per bit of the received signal.
o can be improved by about 2 dB.

[0003]

As described above, the maximum likelihood decoding method is the best decoding method, but since it is necessary to compare the likelihoods of all codewords, calculation is performed for an increase in the number of information points k. The amount increases exponentially. For this reason, it is not possible to use a codeword having a too large k, and thus a large code length n.
Generally, in order to increase the error correction capability, it is necessary to increase the code length n to some extent.

For this reason, if a code having a relatively small code length n is used, the error correction capability cannot be increased, and there is a problem that the decoding error cannot be made sufficiently small especially when the SN ratio is low.

The present invention has been made to solve such a conventional problem, and an object thereof is to provide an error correction system capable of reducing a decoding error.

[0006]

In order to achieve the above object, the present invention encodes all or a part of information with an error detection code, and the error detection coded signals are m (m ≧ m). 2) In an error correction method for a signal encoded by being dispersed into error correction codewords, each of m received error correction codewords includes at least one decoded word candidate, and all In addition to selecting m + 1 or more decoded word candidates, the above-mentioned error detection code is used to determine whether or not there is an error in a plurality of sets of signals, each of which is a set of m decoded word candidates. The feature is that the signal of the set in which is not detected is output as the decoding information.

[0007]

According to the error correction method of the present invention, since the signal encoded by the error detection code is transmitted over a plurality (m) of error correction code words, each error correction code is received at the receiving side. Even if the maximum likelihood decoding result of is incorrect, it can be detected by the error detection code, so that the correct codeword can be restored by repeatedly performing the check with the error detection code using the second and subsequent decoding candidates. ..

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an error correction circuit to which the method of the present invention is applied, and FIG. 2 is an explanatory diagram showing the configuration of signals.

In the figure, digital transmission information is input to a terminal 1, and this signal is used as an error detection coding circuit 2
In, error detection coding is performed for each k ₀ bit. In the error detection coding, as shown in FIG. 2, the k ₀ -bit information signal 100 is divided by the r ₀ -order generator polynomial G ₀ (x),
The remainder is used as a check bit. The check bit consists of r ₀ bits. Thus, the error detection coded signal 101 consisting of n ₀ (= k ₀ + r ₀ ) bits is obtained. This signal is guided to the error correction coding circuit 3. In the error correction coding circuit 3, the error detection coded signal 101 is k
The signal is divided into m _1- bit signals 102 _{1 to} 102 _m, and error correction coding is performed on each of them.

The error correction coding is, for example, generated by an r ₁ -order generator polynomial G ₁ (x), and m error-correction coded signals 103 _{1 to} 103 _m each consisting of n ₁ bits.
Is generated. This signal is converted by the modulator 4 into a modulated signal suitable for the communication path and transmitted.

On the other hand, on the receiving side, the demodulator 5 demodulates the signal received from the communication path. At this time, the signal of the demodulator 5 takes various values because it is disturbed by noise in the communication path. That is, when the SN ratio is high, a signal of + E volt is obtained when 1 is transmitted and a signal of -E volt is obtained when 0 is transmitted, but when the SN is low, + E volt and -E volt are obtained, respectively. It takes a value that forms a Gaussian distribution around E bolt. These voltages are quantized in the demodulator 5 at an appropriate level and guided to the error correction decoding circuit 6.

In the error correction decoding circuit 6, for each of the m error correction coded signals which have been disturbed by noise,
A plurality of code word candidates are selected and stored in the buffers 7 _{1 to} 7 _m . For example, if three candidates are selected as a plurality of candidates, the error correction coded signal 10 is stored in the buffer 7 _1.
Error correction decoding candidate signals 104 _{11 to} 104 for 3 ₁
Remember ₁₃ Code word candidates are selected from the one having the highest likelihood. This can be done by obtaining the log-likelihood ratio for each bit from the n ₁ received signals, then calculating the log-likelihood ratio for all codewords, and selecting three from the largest.

The log-likelihood ratio for each bit can be uniquely obtained from the reception level. That is, if the output of the demodulator 7 is a volt, the log-likelihood ratio with a bit of 1 is a,
The log-likelihood ratio where the bit is 0 is -a. Selecting three candidates from the ones with a high likelihood is equivalent to selecting three codewords from the ones with a short Euclidean distance from the received signal. The buffers 7 _{1 to} 7 _m need to store only the k _1- bit information portion of the error correction code.

Then, in response to an instruction from the decoding candidate selection circuit 9, the buffers 7 _{1 to} 7 _m respectively select the error correction decoding candidate signal and output it to the error detection circuit 8. For example,
Error correction decoding candidate signals 104 ₁₁ , 104 ₂₁ , ... 1
04 _m1 is guided to the error detection circuit 8. Whether or not there is an error is determined by combining these m signals to form an error detection coding candidate signal 105 of n ₀ (= k ₁ · m) bits and dividing by G _o (x) in the generator polynomial. To do. as a result,
If the remainder becomes zero, it is determined that the signal was correctly received, and this signal is output to the terminal 10. On the other hand, if the remainder does not become zero, it means that at least one of the m error correction coded signals is incorrect because it contains an error. Then, the determination result of the error detection circuit is guided to the decoding candidate selection circuit 9 described above. If the determination result indicates that there is an error, the decoding candidate selection circuit 9 gives an instruction to the buffers 7 _{1 to} 7 _m to output the next error correction decoding candidate signal. For example, the outputs of the buffers 7 _{2 to} 7 _m are left unchanged, and the buffers 7 ₁
The error correction decoding candidate signal 104 ₁₁ which is the output of is changed to the error correction decoding candidate signal 104 ₁₂ . Since each buffer has three candidates, the error detection circuit 8 can repeat the error determination up to 3 ^m times. Also,
If there is no error in the determination result, the decoding of the received signal is completed, so the decoding candidate selection circuit 9 causes the buffer 7
Clear _{1 to} 7 _m .

Of the transmitted m error-correction coded signals 103 _{1 to} 103 _m , 103 ₁ is the second likelihood, 103 ₂ is the third likelihood, and 103 _{3 to} 103 _m are If the maximum likelihood is received, buffer 7 is used in the present invention.
_{When the} error correction decoding candidate signals 104 ₁₂ , 104 ₂₃ , 104 ₃₁ , ... 104 _{m 1} are output from _{1 to} 7 _m to the error detection circuit 8, they are correctly decoded. On the other hand, according to the conventional method, since the signals are decoded into the maximum likelihood signals, the error correction coded signals 103 ₁ and 103 ₂ are not correctly decoded, and the error correction decoding candidate signals 104 ₁₁ and 104 ₁₂ are erroneously output. It will be.

Further, in the above embodiment, since the error correction coded signal has the inter-code distance defined by the generator polynomial G ₁ (x), the noise immunity is greatly improved as compared with the case where no coding is performed. .. Therefore, due to noise, even if the likelihood of the correct codeword is not maximum, the number of erroneous codewords with a likelihood that exceeds the likelihood of the correct codeword is small, and thus the likelihood is large. If a plurality of error correction decoding candidate signals are selected, it is very likely that the correct codeword is included in this. In the conventional error correction decoding, it was possible to decode only to the code word with the maximum likelihood,
In the present invention, if the likelihood is higher than a certain level, correct decoding can be performed, so that the reliability of the received signal can be improved.

Further, in order to increase the reliability by the conventional method, it is necessary to increase the code length (hence the number of information points), but the maximum likelihood decoding apparatus scale is generally exponential with respect to the increase in the number of information points. The maximum likelihood decoding becomes practically impossible due to the increase, but in the present invention, since the information is divided into a plurality of error correction codes, there is an advantage that the apparatus scale for the maximum likelihood decoding can be reduced. ..

The present invention is not limited to the above embodiment, but can be variously modified. FIG. 3 is a schematic configuration diagram showing another embodiment of the receiving unit according to the present invention. The signal received from the communication path is guided to the error correction decoding circuit 16 via the demodulator 5. The error correction decoding circuit 16 calculates the likelihood of the error correction codeword for each of the m received signals, stores a plurality of error correction decoding candidate signals in the buffer 17, and stores the respective likelihoods. Is stored in the likelihood storage circuit 18.

Then, the buffer 17 outputs a set of m decoding candidate signals to the error detecting circuit 8 in accordance with an instruction from the decoding candidate selecting circuit 19 and determines whether or not there is an error. If there is no error, the error correction decoding candidate signal is output to the terminal 10 as a decoded signal, and if an error is detected, the error correction decoding candidate signal is discarded. The result of the error determination is output to the decoding candidate selection circuit 19. Here, the decoding candidate selection circuit 19
Using the likelihood of each error correction decoding candidate signal stored in the likelihood storage circuit 18, the overall likelihood of the set of m error correction decoding candidate signals is calculated, and the buffer 17 is arranged in descending order of the likelihood.
Output from.

For example, FIG. 4 shows the likelihood of the error correction decoding candidate signal 105 stored in the buffer 17 when m = 4. Here, the likelihood is represented by a log-likelihood ratio. When selecting four decoding candidates, first, the one with the maximum likelihood is selected from each column. Thus, the error correction decoding candidate signals (105 ₁₁ , 105 ₂₁ , 105 ₃₁ , 10
5 ₄₁ ) is selected. The likelihood of this set is 4.6 because each log likelihood ratio may be added. When the error detection circuit 8 detects an error with respect to this combination, the decoding candidate selection circuit 9 changes the candidate in any of the columns to the one with the second likelihood, but the likelihood of the four sets is the next largest. (105 ₁₁ , 10
5 ₂₁ , 105 ₃₁ , 105 ₄₂ ) are selected as candidates. This likelihood is 4.5. Then select (10
5 ₁₁ , 105 ₂₁ , 105 ₃₁ , 105 ₄₃ ), and the likelihood is 4.
It is 4. In this embodiment, among the m error correction coded signals, a large number of candidate signals are inspected for a signal that is relatively affected by noise. By making such a selection, when the number of times of inspection by the error detection circuit 8 is constant, the decoding error rate can be made smaller than that in the first embodiment.

Alternatively, in the embodiments shown in FIGS. 1 and 2, the error determination is carried out by the error detection circuit 8 in time series. However, a plurality of error detection circuits are set and a plurality of error correction decoding is performed. It is also possible to perform error detection on the candidate signals for signal conversion in parallel, and to output a signal for which no error is determined to the terminal 10 as a decoded signal. At this time, if no error is detected in two or more error correction decoding candidate signals, it is preferable to output the one with the larger likelihood.

As another embodiment for simplifying the decoding circuit, there is a method using error correction decoding by hard decision. That is, the error correction decoding circuit 6 does not necessarily need to calculate the likelihood for the received signal, and may make a hard decision and take out a plurality of error correction decoding candidate signals from those having a short Hamming distance. In the present invention, the error correction capability is improved by increasing the minimum inter-code distance of the error correction code used. In the conventional error correction method, when performing hard decision, the minimum inter-code distance d of the error correction code is set to an odd number. This is because errors up to a number not exceeding d / 2 can be corrected, so that even if d is an even number, the error correction capability is not improved and extra check bits are required.

However, when the present invention is used, even if there are a plurality of code candidates having the same Hamming distance, these are used as error correction decoding candidate signals, so that d is large regardless of whether d is an even number or an odd number. The error correction capability is higher. It is known that the BCH code, which is widely used in practice, can increase the inter-code distance by 1 if the number of information bits is reduced by 1 by adding (1 + x) as a factor to the generator polynomial. The information bit loss can increase the distance by one. Therefore, according to this embodiment, it is possible to efficiently improve the error correction capability.

As described in detail above, according to the present invention, an error detection code is added to an information signal, and this signal is dispersed into a plurality of error correction codes for encoding. The main purpose is to perform error detection on the error correction decoded signal candidate of, and various modifications can be made without departing from the spirit of the invention.

[0025]

As described above, according to the present invention,
Since it is possible to search for a correct decoding candidate while eliminating an erroneous decoding candidate in error detection while using an error correction code with a code length that enables soft decision decoding with high decoding correction capability on a practical circuit scale, it is possible to use the conventional error correction method. As a result, it is possible to obtain the effect that the received signal can be decoded with extremely high reliability.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an error correction circuit to which the method of the present invention is applied.

FIG. 2 is an explanatory diagram showing a signal configuration according to the present embodiment.

FIG. 3 is a configuration diagram showing another embodiment of the present invention.

FIG. 4 is an explanatory diagram showing the likelihood of an error correction decoding candidate signal with respect to a received signal.

[Explanation of symbols]

 1 Input Terminal 2 Error Detection Coding Circuit 3 Error Correction Coding Circuit 4 Modulator 5 Demodulator 6 Error Correction Decoding Circuit 7 Buffer 8 Error Detection Circuit 9 Decoding Candidate Selection Circuit 10 Output Terminal

Claims (2)

[Claims] 1. A signal in which all or part of information is encoded by an error detection code, and this error detection encoded signal is dispersed and encoded in m (m ≧ 2) error correction code words. In the error correction method targeting at, the received m error correction codewords each include at least one decoded word candidate, and m + 1 or more decoded word candidates in total are selected. To determine whether or not there is an error by the error detection code with respect to a plurality of sets of signals each including a set of m decoded word candidates, and to output a set of signals in which no error is detected as decoding information. Error correction method characterized by. 2. A signal in which all or part of information is encoded by an error detection code, and the error detection encoded signal is distributed and encoded in m (m ≧ 2) error correction code words. In the error correction method targeting at, the received m error correction codewords each include at least one decoded word candidate, and m + 1 or more decoded word candidates are selected in total, and m For each of the decoded word candidates, the presence or absence of an error is determined by the error detection code, and when an error is detected, the candidate is changed to the m decoded word candidates up to h (h ≧ 1) times. An error correction method characterized by selecting m decoded word candidates, determining whether or not there is an error by the error detection code, and outputting a decoded word candidate in which no error has been detected as decoding information.