JPH05175174A - Reactive dry etching method for dielectric film - Google Patents

Reactive dry etching method for dielectric film

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Publication number
JPH05175174A
JPH05175174A JP35449591A JP35449591A JPH05175174A JP H05175174 A JPH05175174 A JP H05175174A JP 35449591 A JP35449591 A JP 35449591A JP 35449591 A JP35449591 A JP 35449591A JP H05175174 A JPH05175174 A JP H05175174A
Authority
JP
Japan
Prior art keywords
film
etching
dry etching
dielectric film
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35449591A
Other languages
Japanese (ja)
Inventor
Shogo Matsubara
正吾 松原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP35449591A priority Critical patent/JPH05175174A/en
Publication of JPH05175174A publication Critical patent/JPH05175174A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a dry etching method by which the etch rate of a dielectric film can be remarkably improved. CONSTITUTION:After a PLZT film 2, SiO2 film 3, and resist film 4 are successively formed on a substrate 1, a required resist pattern is formed by using a photolithographic technique and the SiO2 is etched. Then ions of a halogen element are implanted into the area to be etched of the PLZT film 2 by using the SiO2 film 3 as a mask. After etching the film 2, ion beam etching is performed in the atmosphere of a halogen etching gas. An etching rate which is 10 times or more as high as the etching rate obtained when no ion implantation is made can be obtained, because the implanted amount of ions reaches >=1,018cm<-3>.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は誘電体膜の反応性ドライ
エッチング方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reactive dry etching method for a dielectric film.

【0002】[0002]

【従来の技術】BaTiO3,SrTiO3,PbTiO
3,PbZrO3,LiNbO3,Bi4Ti312あるい
はこれらの固溶体からなる誘電体酸化物材料は、コンデ
ンサ、圧電素子、電気光学素子等の種々の機能性デバイ
スに応用されている。近年、デバイスの小型化、高集積
化の要請に対応するために、これらの材料の薄膜化の試
みがなされ、不揮発性メモリ、焦電型赤外線センサ、超
音波センサ、光スイッチなどの薄膜デバイスが試作され
ている。これらの薄膜デバイスの開発には、成膜技術は
もとより、加工技術の確立も不可欠である。特にデバイ
スの微細化、周辺技術の進歩に伴い、誘電体膜の加工精
度、加工速度に優れたドライエッチング技術の開発が望
まれている。これに対し、前述の誘電体酸化物材料の中
でも代表的な(Pb,La)(Zr,Ti)O3(PL
ZT)の反応性ドライエッチングについて、アプライド
・オプティクス(APPLIED OPTICS)1986年,第25
巻,9号,1508−1510頁に報告されている。同
論文では2×10-4Torrのもと、Arイオンビーム
でPLZTのエッチングをしており、C26あるいはC
4の反応ガスの効果を調べている。
2. Description of the Related Art BaTiO 3 , SrTiO 3 , PbTiO 3
Dielectric oxide materials composed of 3 , PbZrO 3 , LiNbO 3 , Bi 4 Ti 3 O 12 or solid solutions thereof have been applied to various functional devices such as capacitors, piezoelectric elements and electro-optical elements. In recent years, attempts have been made to reduce the thickness of these materials in order to meet the demands for device miniaturization and high integration, and thin film devices such as nonvolatile memory, pyroelectric infrared sensor, ultrasonic sensor, and optical switch have been developed. Prototyped. To develop these thin film devices, it is essential to establish not only film forming technology but also processing technology. In particular, with the miniaturization of devices and the progress of peripheral technologies, it is desired to develop a dry etching technique which is excellent in the processing accuracy and processing speed of the dielectric film. On the other hand, a typical (Pb, La) (Zr, Ti) O 3 (PL
ZT) Reactive Dry Etching, APPLIED OPTICS, 1986, 25th.
Vol. 9, No. 1, pp. 1508-1510. In this paper, PLZT is etched by Ar ion beam under 2 × 10 −4 Torr, and C 2 F 6 or C 2
We are investigating the effect of the reaction gas of F 4 .

【0003】[0003]

【発明が解決しようとする課題】前述の論文で報告され
た反応性ドライエッチングでは、反応ガスであるC26
あるいはCF4を加えることによってPLZTのエッチ
ング速度が上がる効果はイオンビーム電流密度が0.8
mA/cm2以下に限られており、それ以上では反応ガ
スの添加によってエッチング速度が低減している。しか
も、反応ガス効果がある場合でもそのエッチング速度は
最大35nm/minで、反応ガスがない場合の2〜3
倍程度にすぎない。本発明は上記の従来の反応性ドライ
エッチングの問題点を解決し、誘電体膜とエッチングガ
スとの反応を効率的にして、エッチング速度を向上させ
たドライエッチング方法を提供することを目的とする。
In the reactive dry etching reported in the above-mentioned paper, the reactive gas C 2 F 6 is used.
Alternatively, the effect of increasing the etching rate of PLZT by adding CF 4 is that the ion beam current density is 0.8.
It is limited to mA / cm 2 or less, and above that, the etching rate is reduced by adding a reaction gas. Moreover, even when there is a reaction gas effect, the etching rate is 35 nm / min at the maximum, and 2-3 times when there is no reaction gas.
It is only about twice. An object of the present invention is to provide a dry etching method which solves the problems of the conventional reactive dry etching described above and makes the reaction between the dielectric film and the etching gas efficient so as to improve the etching rate. ..

【0004】[0004]

【課題を解決するための手段】本発明は、化学式がAB
3で表され、AとしてPb,La,Sr,Ba,Li
から選ばれる一種以上の元素を含み、BとしてZr,T
i,Ta,Nbから選ばれる一種以上の元素を含む誘電
体膜をハロゲン系ガスを用いてドライエッチングする方
法において、予めエッチングすべき領域にハロゲン元素
をイオン注入することを特徴とする誘電体膜の反応性ド
ライエッチング方法である。
The present invention has a chemical formula of AB.
It is represented by O 3 , and as A, Pb, La, Sr, Ba, Li
Containing one or more elements selected from
In a method of dry-etching a dielectric film containing one or more elements selected from i, Ta, and Nb using a halogen-based gas, a halogen element is ion-implanted into a region to be etched in advance. Is the reactive dry etching method.

【0005】[0005]

【実施例】以下、本発明を実施例に基づいて詳細に説明
する。図1は本発明のプロセス・フローである。先ず、
RFマグネトロンスパッタ法により、基板1上にPLZ
T膜2を作製した。ターゲットは(Pb0.91,L
0.09)(Zr0.65,Ti0.350.97753組成の粉末
を用い、Ar/O2混合ガス中、10mTorrの下、
基板温度600℃で膜厚0.5μm成膜した。このPL
ZT膜2上にLPCVD法によってSiO2膜3を1μ
m形成した後、レジスト膜4を2μm塗布した(図1
(a))。その後、フォトリソグラフィ技術で所望のレ
ジスト膜パターンを形成した。レジスト4をマスクにS
iO2膜3をエッチングし(図1(b))、レジストを
除去した後、SiO2膜3をマスクとしてPLZT膜2
のエッチングすべき領域にF,Cl,Br,Iの中から
選ばれるハロゲン元素をイオン注入した(図1
(c))。次にHF,CF4,HCl,HBr,HIか
ら選ばれるハロゲン系ガス雰囲気中でイオンビームエッ
チングを行った。試料を真空チャンバー内に装着して1
×10-6Torrまで真空排気した後、イオン注入した
ハロゲン元素を含むハロゲン系ガスを導入して2×10
-4Torrとし、基板温度200℃、イオンビーム電流
0.8mA/cm2でエッチングした(図1(d))。
EXAMPLES The present invention will be described in detail below based on examples. FIG. 1 is a process flow of the present invention. First,
PLZ on the substrate 1 by the RF magnetron sputtering method
A T film 2 was produced. The target is (Pb 0.91 , L
a 0.09 ) (Zr 0.65 , Ti 0.35 ) 0.9775 O 3 composition powder in Ar / O 2 mixed gas under 10 mTorr,
A film having a thickness of 0.5 μm was formed at a substrate temperature of 600 ° C. This PL
An SiO 2 film 3 of 1 μm is formed on the ZT film 2 by the LPCVD method.
m, the resist film 4 was applied to a thickness of 2 μm (see FIG. 1).
(A)). Then, a desired resist film pattern was formed by the photolithography technique. S using resist 4 as a mask
After etching the io 2 film 3 (FIG. 1 (b)) and removing the resist, the SiO 2 film 3 is used as a mask for the PLZT film 2
A halogen element selected from F, Cl, Br, and I is ion-implanted into the region to be etched (see FIG. 1).
(C)). Next, ion beam etching was performed in a halogen-based gas atmosphere selected from HF, CF 4 , HCl, HBr, and HI. Mount the sample in the vacuum chamber 1
After evacuating to × 10 -6 Torr, a halogen-based gas containing ion-implanted halogen element is introduced to obtain 2 × 10
-4 Torr, the substrate temperature was 200 ° C., and the ion beam current was 0.8 mA / cm 2 (FIG. 1D).

【0006】図2にハロゲン元素のイオン注入量とPL
ZT膜のエッチング速度の関係を示す。図中、5はF注
入,CF4ガスエッチングの場合であり、6はF注入,
HFガスエッチングの場合であり、7はCl注入,HC
lガスエッチングの場合であり、8はBr注入,HBr
ガスエッチングの場合であり、9はI注入,HIガスエ
ッチングの場合である。図からわかるように、ハロゲン
元素のイオン注入量が1018cm-3以上でエッチング速
度が急激に増加し、イオン注入がない場合に比べて10
倍以上のエッチング速度が得られた。PLZTの代わり
に、SrTiO3,BaTiO3,LiNbO3,LiT
aO3,Bi4Ti312膜について上記と同じ実験を行
い、ほぼ同等の結果が得られた。
FIG. 2 shows the amount of halogen element ion implantation and PL.
The relationship of the etching rate of the ZT film is shown. In the figure, 5 is the case of F injection and CF 4 gas etching, 6 is F injection,
In the case of HF gas etching, 7 is Cl injection, HC
1 gas etching, 8 is Br injection, HBr
This is the case of gas etching, and 9 is the case of I implantation and HI gas etching. As can be seen from the figure, when the ion implantation amount of the halogen element is 10 18 cm −3 or more, the etching rate sharply increases and is 10
More than double the etching rate was obtained. Instead of PLZT, SrTiO 3 , BaTiO 3 , LiNbO 3 , LiT
The same experiment as above was carried out for the aO 3, Bi 4 Ti 3 O 12 film, and almost the same results were obtained.

【0007】[0007]

【発明の効果】以上説明したように、本発明によれば誘
電体薄膜の反応性ドライエッチングの速度を著しく向上
させることができ、薄膜デバイスの作製などにおける加
工技術が向上する。
As described above, according to the present invention, the rate of the reactive dry etching of the dielectric thin film can be remarkably improved, and the processing technique for manufacturing a thin film device is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による反応性ドライエッチング方法を工
程順に示す基板断面図である。
FIG. 1 is a substrate cross-sectional view showing a reactive dry etching method according to the present invention in the order of steps.

【図2】ハロゲン元素のイオン注入量とPLZT膜のエ
ッチング速度との関係を示す図である。
FIG. 2 is a diagram showing a relationship between an ion implantation amount of a halogen element and an etching rate of a PLZT film.

【符号の説明】 1 基板 2 PLZT膜 3 SiO2膜 4 レジスト膜[Explanation of symbols] 1 substrate 2 PLZT film 3 SiO 2 film 4 resist film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 化学式がABO3で表され、AとしてP
b,La,Sr,Ba,Liから選ばれる一種以上の元
素を含み、BとしてZr,Ti,Ta,Nbから選ばれ
る一種以上の元素を含む誘電体膜をハロゲン系ガスを用
いてドライエッチングする方法において、予めエッチン
グすべき領域にハロゲン元素をイオン注入することを特
徴とする誘電体膜の反応性ドライエッチング方法。
1. The chemical formula is represented by ABO 3 , and A is P
A dielectric film containing one or more elements selected from b, La, Sr, Ba and Li and containing one or more elements selected from Zr, Ti, Ta and Nb as B is dry-etched using a halogen-based gas. In the method, a reactive dry etching method for a dielectric film, characterized in that a halogen element is ion-implanted into a region to be etched in advance.
JP35449591A 1991-12-20 1991-12-20 Reactive dry etching method for dielectric film Pending JPH05175174A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35449591A JPH05175174A (en) 1991-12-20 1991-12-20 Reactive dry etching method for dielectric film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35449591A JPH05175174A (en) 1991-12-20 1991-12-20 Reactive dry etching method for dielectric film

Publications (1)

Publication Number Publication Date
JPH05175174A true JPH05175174A (en) 1993-07-13

Family

ID=18437952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35449591A Pending JPH05175174A (en) 1991-12-20 1991-12-20 Reactive dry etching method for dielectric film

Country Status (1)

Country Link
JP (1) JPH05175174A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661730A1 (en) * 1993-12-28 1995-07-05 Matsushita Electronics Corporation Manufacturing method of semiconductor devices
EP1511073A1 (en) * 2003-08-28 2005-03-02 Intel Corporation A selective etch process for making a semiconductor device having a high-k gate dielectric
US7137061B2 (en) 2002-08-15 2006-11-14 Infineon Technologies Ag Method and device for signaling a transmission fault on a data line

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661730A1 (en) * 1993-12-28 1995-07-05 Matsushita Electronics Corporation Manufacturing method of semiconductor devices
US5492855A (en) * 1993-12-28 1996-02-20 Matsushita Electronics Corporation Method of dry etching platinum using sulfur containing gas
US7137061B2 (en) 2002-08-15 2006-11-14 Infineon Technologies Ag Method and device for signaling a transmission fault on a data line
EP1511073A1 (en) * 2003-08-28 2005-03-02 Intel Corporation A selective etch process for making a semiconductor device having a high-k gate dielectric
WO2005024929A1 (en) * 2003-08-28 2005-03-17 Intel Corporation (A Delaware Corporation) A selective etch process for making a semiconductor device having a high-k gate dielectric
KR100716689B1 (en) * 2003-08-28 2007-05-09 인텔 코오퍼레이션 A selective etch process for making a semiconductor device having a high-k gate dielectric

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