JPH05173503A - Data driver circuit for liquid crystal display device - Google Patents

Abstract

PURPOSE:To realize a pseudo non-interlace display by eliminating the need for line memory. CONSTITUTION:In the data driver circuit 20 of a liquid crystal display device 26 provided with a first and a second latches 22, 23 having the capacity corresponding by one display row of the image data of an interlace system and transferring the image data from the first latch 22 to the second latch 23 after fetching the image data by one display row into the first latch 22 and selecting a gradation voltage corresponding to the gradation of the output of the second latch 23 and applying it to a liquid crystal cell, a gradation voltage replacing means 25 reading twice the holding content of the second latch 23 and providing a polarity inverting means 24 inverting the polarity of the reading data of one side and further replacing the order of the gradation voltage data of one side and further replacing the order of the gradation voltage corresponding to the reading data of one side is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data driver circuit of a liquid crystal display device for displaying interlaced image data, and more particularly to a data driver circuit for displaying data of the same content but different polarities in two consecutive lines. Regarding driver circuit. When an image of an interlace system (also called an interlaced scanning system) is displayed on a liquid crystal display device, a continuous field screen may be overlapped to form a double image due to the data holding characteristic of the liquid crystal.

In the interlace system, one field screen is reproduced by scanning every other display line (scan line) of the liquid crystal display device, and the remaining display lines are scanned in the next field screen. This is because the content of the row (content of the liquid crystal cell) is not refreshed (updated) until the field screen two times ahead is reached. Therefore, when the screens of the continuous A field and B field are different (such as a moving image), the screens of the A and B fields appear to overlap with each other, and the display quality is significantly impaired.

[0003]

2. Description of the Related Art Therefore, the applicant of the present invention first discloses "a display method of a matrix liquid crystal panel" (Japanese Patent Application No. 3-324699).
(December 9, 1991 application) is proposed. The technology of this prior application holds interlaced image data in a line memory (having a storage capacity for one display row), reads this data twice and gives it to a data driver to display the same data for two consecutive lines. To do. According to this, pseudo non-interlaced display can be realized, and data of all display rows can be refreshed for each field to avoid a double image.

Further, since one of the double read data is inverted in polarity by the data inversion circuit and two lines are displayed with data of different polarities, it is possible to avoid flicker due to movement of the alternating pattern. FIG. 8 is a configuration diagram of a main part of a liquid crystal display device according to the prior application. In the figure, 10 is a data inversion circuit which inverts or non-inverts the polarity of interlaced input image digital data by an output inversion signal, and the latch address selector 11 sweeps twice during one horizontal scanning period. Latch clock signal a
The address signals 1 to 640 are generated twice in synchronism with. The first latch 12 receives the image data input from outside the driver according to the first address signal from 1 to 640.
The same image data (data whose polarity has been inverted by the data inversion circuit) input again according to the address signal of the second time is taken in at the same time.
Addresses up to 640 are sequentially fetched. That is,
The same data input twice is non-inverted and inverted, and is taken into the first latch 12 twice.

The data fetched by the first latch 12 is transferred to the second latch 13 in synchronization with the latch signal b generated twice during one horizontal scanning period, and the data of the second latch 13 is transferred. The gradation voltage according to the content is output from the voltage selector 14 to the liquid crystal panel P. According to this
Image data for one scanning line of the interlace system can be displayed over two display lines (scan lines), and a pseudo non-interlaced display can be realized.

[0006]

However, the technique of the prior application is effective in realizing pseudo non-interlaced display and suppressing double images and flicker, but it is effective for one scan line. It is necessary to provide a line memory with a storage capacity corresponding to the number of pixels outside the data driver, and there is still room for improvement from the viewpoint of device cost.

Therefore, an object of the present invention is to realize a pseudo non-interlaced display without using a line memory.

[0008]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention has a first and a first capacity having a capacity corresponding to one display line of interlaced image data, as shown in the principle diagram thereof in FIG. Two latches are provided, and after the image data for one display row is taken into the first latch, the image data is transferred from the first latch to the second latch, and the output of the second latch is transferred. In a data driver circuit of a liquid crystal display device which selects a gradation voltage according to a gradation and gives it to a liquid crystal cell,
While reading the contents held by the second latch twice,
A polarity reversing means for reversing the polarity of one read data is provided, or the first and second latches having a capacity corresponding to one display row of the interlaced image data are provided. After fetching the image data for the rows in the first latch, the image data is transferred from the first latch to the second latch, and the grayscale voltage according to the grayscale of the output of the second latch is transferred. In the data driver circuit of the liquid crystal display device for selecting and applying to the liquid crystal cell, the contents held in the second latch are read twice and the order of the gradation voltages corresponding to the one read data is changed. It is characterized in that a replacement means is provided.

[0009]

According to the present invention, the polarity of one of the read data read twice from the second latch is inverted, or the order of the gray scale voltages corresponding to the one read data is changed, and then these are read. Two-line reading data is displayed on two lines. Therefore, pseudo non-interlaced display can be realized without separately providing a line memory.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. 2 to 4 are views showing a first embodiment of the data driver circuit of the liquid crystal display device according to the present invention. In FIG. 2, reference numeral 20 denotes a data driver, and the data driver 20
Is a latch address for sequentially generating addresses (for example, 1 to 640 for 640 pixels) corresponding to the number of pixels for one display row (one scan line) of the liquid crystal panel 26 in accordance with the latch signal S1 synchronized with the horizontal dot clock. Selector 21, first latch 22 that sequentially captures image data for one display row (for example, 640 pixels) of the interlace system according to the address generated by latch address selector 21, and capture of image data to first latch 22 According to the latch signal S2 which is generated almost simultaneously with the completion, the first
Second latch 23 for fetching the contents held in the latch 22 (image data for one display row) at a time, and the second latch 23
And the digital data inverting circuit (polarity inverting means) 24 for inverting the stored content (image data for one display row) twice and inverting the polarity of the data of one time in response to the output inversion signal S3. A voltage selector 25 that selects and outputs a voltage according to the gradation of a pixel from among a plurality of voltages V _{0 to} V _n based on the output of the data inversion circuit 24.

Reference numeral 26 is, for example, a liquid crystal panel of 640 × 480 pixels, and the liquid crystal panel 26 has 640 data lines D _{1 to} D ₆₄₀ and 480 scan lines W _{1 to} W ₄₈₀ arranged in an intersecting manner. TFT (thin film transi)
stor) A liquid crystal cell Ci is connected and configured. All the scan lines W _{1 to} W ₄₈₀ are sequentially selected by the scan driver 27 during one vertical scanning period. The voltage selector 2 is connected to 640 liquid crystal cells connected to the selected scan line.
The output of 5 (gradation voltage) is written.

FIG. 3 is a block diagram of the data driver 20. In this figure, the image data of the interlace system is sequentially output to the first latch 2 according to the addresses 1 to 640 for one display row generated by the latch address selector 21.
Taken in 2. The image data for one display row (hereinafter, x row image data) is transferred to the second latch 23 at the timing of the latch signal S2 and, at the same time, is supplied to the voltage selector 25 through the digital data inverting circuit 24. At this point, the output inversion signal S3 is not active yet, and the polarity of the data is not inverted. Therefore, the grayscale voltage is selected based on the x-row image data fetched by the second latch 23 and is applied to the data lines D _{1 to} D ₆₄₀ of the liquid crystal panel.

When the output inversion signal S3 becomes active (eg, logic 1) at a predetermined timing, the output of the digital data inversion circuit 24, that is, the polarity of the x-row image data fetched by the second latch 23 is inverted, It is given to the voltage selector 25. For this reason, the polarity-reversed x
The gradation voltage is selected based on the row image data and applied to the data lines D _{1 to} D ₆₄₀ of the liquid crystal panel.

Therefore, continuous two-line display can be performed while the polarities of the image data for one display line are exchanged, and a pseudo non-interlaced display can be realized. As a result, it is possible to avoid a problem when displaying the interlaced image data on the liquid crystal, that is, a double image and a flicker, and further, a storage means such as a line memory is unnecessary.
The circuit cost can be reduced by simplifying the circuit configuration.

FIG. 4 shows a preferred configuration example of the digital data inversion circuit 24 as the polarity inversion means, which is the number of pixels for one display row (for example, 640) .times.n (n: the number of bits indicating the gradation of one pixel). ) As many exclusive OR gates G ₁ ~
This is an example with G _{640 * n} . An output inversion signal S3 is given to one input terminal of each gate in common, and image data for one display row (data of each pixel) is given to each of the other input terminals. If the output inversion signal S3 is logic 0, the polarity of the image data is output as it is from each gate, but if it is logic 1, the image data with the polarity inverted is output.

5 to 7 are views showing a second embodiment of the data driver circuit of the liquid crystal display device according to the present invention. The same circuit elements as those in the first embodiment are designated by the same reference numerals. This embodiment differs from the first embodiment in that the output of the second latch 23 is directly input to the voltage selector 25 and that the liquid crystal applied voltage inverting circuit 30 is provided. The liquid crystal applied voltage inverting circuit 30 functions as a gradation voltage switching unit, and switches a plurality of gradation setting voltages (liquid crystal applied voltages) V _{0 to} V _n in accordance with the output inversion signal S3.
Here, V ₀ is a voltage corresponding to gradation 0 (for example, +2).
V) and V _n are voltages corresponding to gradation n (for example, +5 V), and between V ₀ and V _n are multi-step voltages corresponding to the number of gradations.

FIG. 7 shows a preferred configuration example of the liquid crystal applied voltage inversion circuit 30, in which the number of switch elements SW ₀ is the same as the number of voltages.
To SW _n, and the contacts of all the switch elements are switched at the same time according to the logic of the output inversion signal S3. The contact position shown is when the output inversion signal S3 is logic 0, for example, and the voltage V ₀ is passed through SW ₀ , for example.
Is taken out, or the voltage V _n is taken out through SW _n . That is, the arrangement of the output voltage in this case is the same as the arrangement of the input voltage, and the voltage “V ₀ ” in the gradation 0 is ...
The voltage “V _n ” is assigned to the gradation n.

On the other hand, when the output inversion signal S3 becomes logic 1, the voltage V _n is taken out through SW ₀ , or SW
_The voltage V ₀ is taken out through _n . That is, the arrangement of the output voltage in this case is changed so as to be in the reverse order of the input voltage, and contrary to the above, the voltage “V _n ” in the gray scale 0, ...
The gradation "n" is assigned the voltage "V ₀ ". Therefore, according to the present embodiment as well, it is possible to perform continuous two-line display while changing the gradation of image data for one display row, and it is possible to realize pseudo non-interlaced display. As a result, it is possible to avoid a problem when displaying the interlaced image data on the liquid crystal, that is, a double image and flicker, and a storage means such as a line memory is not required. Therefore, the circuit configuration is simplified and the device cost is reduced. can do.

[0019]

According to the present invention, the polarity of the display data of one line can be inverted, or the order of the gradation voltage of the display data of one line can be changed, and the line memory becomes unnecessary and the pseudo voltage can be reduced. A non-interlaced display can be realized.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a configuration diagram of a main part of the first embodiment.

FIG. 3 is a block diagram of a data driver of the first embodiment.

FIG. 4 is a configuration diagram of a data inversion circuit of the first embodiment.

FIG. 5 is a main part configuration diagram of a second embodiment.

FIG. 6 is a block diagram of a data driver of a second embodiment.

FIG. 7 is a configuration diagram of a grayscale voltage inversion circuit according to a second embodiment.

FIG. 8 is a configuration diagram of a main part of a liquid crystal display device according to a prior application.

[Explanation of symbols]

 22: first latch 23: second latch 24: digital data inverting circuit (polarity inverting means) 30: liquid crystal applied voltage inverting circuit (gradation voltage replacing means)

Claims (2)

[Claims] 1. A first and a second latch having a capacity corresponding to one display row of interlaced image data are provided, and after the image data of one display row is fetched into the first latch, In a data driver circuit of a liquid crystal display device, which transfers image data from a first latch to a second latch, selects a gray scale voltage according to a gray scale of an output of the second latch and applies the gray scale voltage to a liquid crystal cell, A data driver circuit for a liquid crystal display device, comprising a polarity reversing means for reversing the polarity of one read data while reading the content held by the second latch twice. 2. A first and a second latch having a capacity corresponding to one display row of the interlaced image data are provided, and after the image data of one display row is fetched into the first latch, In a data driver circuit of a liquid crystal display device, which transfers image data from a first latch to a second latch, selects a gray scale voltage according to a gray scale of an output of the second latch and applies the gray scale voltage to a liquid crystal cell, A data driver for a liquid crystal display device, comprising: a gradation voltage switching unit that reads the contents held by the second latch twice and switches the order of the gradation voltages corresponding to the one read data.