JPH0517249Y2 - - Google Patents

Info

Publication number
JPH0517249Y2
JPH0517249Y2 JP1986068511U JP6851186U JPH0517249Y2 JP H0517249 Y2 JPH0517249 Y2 JP H0517249Y2 JP 1986068511 U JP1986068511 U JP 1986068511U JP 6851186 U JP6851186 U JP 6851186U JP H0517249 Y2 JPH0517249 Y2 JP H0517249Y2
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
substrate
pedestal
drive element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1986068511U
Other languages
Japanese (ja)
Other versions
JPS62180538U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986068511U priority Critical patent/JPH0517249Y2/ja
Publication of JPS62180538U publication Critical patent/JPS62180538U/ja
Application granted granted Critical
Publication of JPH0517249Y2 publication Critical patent/JPH0517249Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Description

【考案の詳細な説明】 イ 産業上の利用分野 本考案は発光ダイオードアレイを利用した光プ
リンタヘツドに係わり、特に駆動素子を同一基板
上に配置し、基板上に高密度パターンが不要な光
プリンタヘツドに関する。
[Detailed description of the invention] A. Field of industrial application The present invention relates to an optical printer head using a light emitting diode array, and in particular to an optical printer head in which driving elements are arranged on the same substrate and a high-density pattern is not required on the substrate. Regarding the head.

ロ 従来の技術 近年第2図に示す様に基板21に複数の発光ダ
イオードアレイ25,25……を整列させて光プ
リンタヘツドを構成することが研究され商品化が
はじまつている。そして発光領域(ドツト)数の
点灯不灯制御を行う為の配線等が、主走査方向の
全長にわたつて2000〜6000組と膨大な量になるか
ら発光ダイオードアレイ25,25……の駆動素
子(図示せず)は、発光ダイオードアレイ25,
25……と同一基板上に配置するようにしてい
た。
B. Prior Art In recent years, research has begun on constructing an optical printer head by arranging a plurality of light emitting diode arrays 25, 25, . . . on a substrate 21 as shown in FIG. 2, and commercialization has begun. The amount of wiring required to control the number of light-emitting areas (dots) to turn on and off is 2,000 to 6,000 sets over the entire length in the main scanning direction, so the driving elements of the light-emitting diode arrays 25, 25... (not shown) includes a light emitting diode array 25,
25... was arranged on the same board.

しかし乍ら、特開昭60−68976号公報の如く発
光ダイオードアレイ25,25……の両側に配置
しても、あるいは特開昭57−74166号公報の如く
駆動素子を基板の一側に集めて配置しても、いず
れも基板上にワイヤーボンドパツト部を有する4
〜20本/mmという高密度配線の形成が必要で、基
板が高価なものになつてしまう。一方発光ダイオ
ードアレイと駆動素子を直接ワイヤーボンドする
方法が検討されているが、第2ボンド側の素子が
受けるダメージは第1ボンド側の素子が受けるダ
メージよりも大きく、第2ワイヤボンド側の素子
の特性劣化や短寿命化、あるいはワイヤボンド不
良の発生などにより、歩留低下を生じ不都合であ
つた。
However, even if the driving elements are arranged on both sides of the light emitting diode arrays 25, 25, etc. as in Japanese Patent Application Laid-Open No. 60-68976, or they are arranged on one side of the substrate as in Japanese Patent Application Laid-Open No. 57-74166, Even if the wire bond pad is placed on the board, all four
It is necessary to form high-density wiring of ~20 wires/mm, making the board expensive. On the other hand, a method of directly wire-bonding the light-emitting diode array and the drive element is being considered, but the damage to the element on the second bond side is greater than the damage to the element on the first bond side. This has been inconvenient because the yield has decreased due to deterioration of characteristics, shortened lifespan, or occurrence of wire bond defects.

ハ 考案が解決しようとする問題点 本考案は上述の点を考慮してなされたもので、
廉価でしかも高密度印字に適した光プリンタヘツ
ドを提供するものである。
C. Problems that the invention aims to solve This invention was made in consideration of the above points.
To provide an optical printer head that is inexpensive and suitable for high-density printing.

ニ 問題点を解決するための手段 本考案は整列された駆動素子と発光ダイオード
アレイの中間にワイヤーボンドパツドを有する別
の半導体素子からなる台座を整列させ、三者に配
線を施こすものである。
D. Means for Solving the Problems The present invention aligns a pedestal made of another semiconductor element having a wire bond pad between the aligned drive elements and the light emitting diode array, and wires the three elements. be.

ホ 作用 これにより基板上の高密度配線は不用となり半
導体のマスクワークでは高密度ワイヤボンドパツ
トは形成しやすく、しかも半導体は能動素子とし
て用いないから特性劣化等の心配がない。
E. Effect This eliminates the need for high-density wiring on the substrate, making it easy to form high-density wire bond patches in semiconductor mask work, and since the semiconductor is not used as an active element, there is no need to worry about deterioration of characteristics.

ヘ 実施例 第1図は本考案実施例の光プリンタヘツドの平
面図である。第1図において1はセラミツク基板
又は金属基板等の基板であり、基板上の配線パタ
ーンは、電源用パターン10,11,11……と
データ転送、点灯タイミング信号等の信号系パタ
ーン3,3……が設けてあるのみである。4,4
……は基板1上に整列配置された駆動素子であ
る。5,5……は電源用パターン10の上に整列
固着された発光ダイオードアレイであり、例えば
GaAsPからなり主面には選択拡散により発光領
域51,51……が1列に整列して形成され、発
光領域51,51……にオーミツク接触がとられ
た電極52,52……も設けてある。6,6……
は基板1上に整列配置されたワイヤーボンデイン
グパツト用素子(台座)であり、例えばSiからな
り、主面にはSi3N4等の絶縁膜が形成され、その
上にワイヤーボンデイングパツト用電極61,6
1……が形成されている。8,8……は金属細線
で、ワイヤーボンド方により発光ダイオードアレ
イ5,5……の電極52,52……とワイヤーボ
ンデイングパツト用素子6,6……の電極61,
61……と駆動素子4,4……の出力端子用ワイ
ヤーボンデイングパツトとを配線するものであ
る。
Embodiment FIG. 1 is a plan view of an optical printer head according to an embodiment of the present invention. In FIG. 1, 1 is a substrate such as a ceramic substrate or a metal substrate, and the wiring patterns on the substrate include power supply patterns 10, 11, 11... and signal system patterns 3, 3... for data transfer, lighting timing signals, etc. ...is provided. 4,4
. . . are drive elements arranged in alignment on the substrate 1. 5, 5... are light emitting diode arrays aligned and fixed on the power supply pattern 10, for example.
Made of GaAsP, light emitting regions 51, 51... are formed in a line on the main surface by selective diffusion, and electrodes 52, 52... which are in ohmic contact with the light emitting regions 51, 51... are also provided. be. 6,6...
are wire bonding pad elements (pedestals) arranged in alignment on the substrate 1, and are made of, for example, Si, and an insulating film such as Si 3 N 4 is formed on the main surface, on which the wire bonding pad electrodes 61 are arranged. ,6
1... is formed. 8, 8... are thin metal wires, and electrodes 52, 52... of the light emitting diode arrays 5, 5... and electrodes 61 of the wire bonding pad elements 6, 6... are wire bonded.
61... and the output terminal wire bonding pads of the drive elements 4, 4....

ト 考案の効果 この様な構成において基板に高密度配線を設け
なくてもよいから基板材料も安価になりおよそ30
%の単価削減になる。またワイヤーボンデイング
パツト素子(台座)は半導体の高精度リソグラフ
イ技術が使えるので、25ドツト/mm等の高密度印
字用ヘツドでも容易に形成できる。そしてワイヤ
ボンデイングパツト素子(台座)を上述のシリコ
ンの他に特性不良となつた発光ダイオードアレイ
素子で代用することにより、より安価ヘツドを構
成することができる。
Effects of the invention In this configuration, there is no need to provide high-density wiring on the board, so the board material becomes cheaper, and the cost is approximately 30%.
% unit price reduction. Furthermore, since the wire bonding pad element (pedestal) can be made using high-precision semiconductor lithography technology, it can be easily formed even with a high-density printing head such as 25 dots/mm. By substituting the wire bonding pad element (pedestal) with a light emitting diode array element having poor characteristics in place of the silicon described above, a cheaper head can be constructed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案実施例の光プリンタヘツドの
平面図、第2図は従来の光プリンタヘツドの斜視
図である。 1……基板、4,4……駆動素子、5,5……
発光ダイオードアレイ、6,6……ワイヤーボン
デイングパツト用素子(台座)、8,8……金属
細線。
FIG. 1 is a plan view of an optical printer head according to an embodiment of the present invention, and FIG. 2 is a perspective view of a conventional optical printer head. 1... Substrate, 4, 4... Drive element, 5, 5...
Light emitting diode array, 6, 6... element for wire bonding pad (pedestal), 8, 8... thin metal wire.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板と、基板上に整列配置された複数の発光ダ
イオードアレイと、発光ダイオードアレイの列に
沿つて基板上に設けられた発光ダイオードアレイ
の駆動素子と、発光ダイオードアレイの列と駆動
素子の間の基板上に設けられ、表面に多数のワイ
ヤボンド領域を有した台座と、発光ダイオードア
レイと台座と駆動素子とを配線する金属細線とを
具備し、前記台座が表面に電極膜を有した半導体
である事を特徴とする光プリンタヘツド。
A substrate, a plurality of light emitting diode arrays arranged in alignment on the substrate, a drive element for the light emitting diode array provided on the substrate along the row of light emitting diode arrays, and a drive element between the row of light emitting diode arrays and the drive element. The pedestal is provided on a substrate and includes a pedestal having a large number of wire bond regions on the surface, and thin metal wires for wiring the light emitting diode array, the pedestal, and the driving element, and the pedestal is made of a semiconductor having an electrode film on the surface. An optical printer head characterized by certain things.
JP1986068511U 1986-05-07 1986-05-07 Expired - Lifetime JPH0517249Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986068511U JPH0517249Y2 (en) 1986-05-07 1986-05-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986068511U JPH0517249Y2 (en) 1986-05-07 1986-05-07

Publications (2)

Publication Number Publication Date
JPS62180538U JPS62180538U (en) 1987-11-16
JPH0517249Y2 true JPH0517249Y2 (en) 1993-05-10

Family

ID=30908392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986068511U Expired - Lifetime JPH0517249Y2 (en) 1986-05-07 1986-05-07

Country Status (1)

Country Link
JP (1) JPH0517249Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118848B2 (en) * 1978-03-22 1986-05-14 Tokyo Shibaura Electric Co

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148340U (en) * 1983-03-25 1984-10-03 沖電気工業株式会社 Light output correction device
JPS6118848U (en) * 1984-07-06 1986-02-03 三洋電機株式会社 optical print head

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118848B2 (en) * 1978-03-22 1986-05-14 Tokyo Shibaura Electric Co

Also Published As

Publication number Publication date
JPS62180538U (en) 1987-11-16

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