JPH05166702A - Semiconductor wafer alignment device - Google Patents

Abstract

PURPOSE:To highly accurately align a semiconductor wafer without being affected by a circuit pattern formed on the surface of the semiconductor wafer. CONSTITUTION:At least two alignment marks are provided on the rear surface of a wafer 1 and, when the wafer 1 is placed on and fixed to a wafer chuck 2, the marks are optically detected with a detector 4 through mark detecting holes 3 provided through the chuck 2. Depending upon the detected states of the marks, the wafer 1 is finely aligned by moving and controlling the chuck 2 in the theta-, X-, and Y-directions by means of stages 6-8, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer alignment apparatus, and more particularly to a semiconductor wafer alignment apparatus that performs alignment for wafer alignment necessary when processing and inspecting a semiconductor wafer having a circuit pattern.

[0002]

2. Description of the Related Art In a conventional alignment method of this type, alignment is performed with high accuracy after pre-alignment, which is rough alignment for correcting the rotation direction of a wafer by using a position of an orientation flat indicating a crystal orientation of a semiconductor wafer. Fine alignment is performed.

Between each chip on the wafer surface is usually 50 to
There is a chip separation boundary line called a street line having a width of about 100 μm. For fine alignment, a street detection method that detects and aligns this street line, or when the street line cannot be detected directly optically, such as when the street line is not clear or when a test pattern exists on the street line. Uses an alignment method based on pattern recognition.

FIG. 4A is a schematic explanatory view of a street detection system, and FIG. 4B is a schematic explanatory view of an optical system inside a streetline detector 20 which optically detects a streetline.

In the street detection system, the laser emission source 2
The He-Ne laser light produced in 2 is reflected by the mirror 25 in the optical path 23.
The optical path 23 is changed by, a vibration is applied by a part of the mirrors 26, and further, the light is input into the lens 37 as a rectangular beam by passing through the mirrors 27 to 36,
Beam 2 narrowed by the lens 37 and rectangular
The surface of the wafer 1 is irradiated with 1.

Reflected light 39 from the surface of the wafer 1 is again incident on the light receiving sensor 24 through the lens 37 by the mirror 36 and the lens 38. The reflected light 39 from the beam 21 becomes scattered light at the circuit pattern portion due to the pattern, but is reflected as it is at the street line portion and returns to the original optical path. By receiving the difference in the reflected light by the light receiving sensor 24, the beam 21
The position shift is detected and the wafer position is controlled by the sensor output signal depending on the positional relationship between the line and the street line.

An example of the one using this street detection system is A-PM-6000A full auto prober (manufactured by Tokyo Seimitsu Co., Ltd.).

On the other hand, the pattern recognition-based alignment method scans a beam and receives the reflected light from the wafer surface as in the street detection method. However, the reflected light is sampled for a certain length and is preliminarily sampled. The position shift is controlled by obtaining the correlation with the recorded alignment position data.

In this method, almost any wafer can be aligned as long as it has a pattern formed on its surface, but depending on the circuit pattern, the alignment time may be longer than that of the street detection method.

An example of the one using the alignment method by this pattern recognition is AF-6000 full auto prober (manufactured by Ando Electric Co., Ltd.).

In such a conventional alignment method, in the case of the street detection method, if the street line cannot be directly optically detected, the alignment becomes difficult.
There is a problem that it is necessary to input a specified value every time the circuit pattern is changed.

Further, since the street line position is different depending on the chip size, there is a problem that it takes a lot of alignment time because the beam scanning range is expanded when the detection location is not limited by the chip size or is not limited in advance. ..

[0013]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor wafer alignment apparatus capable of realizing highly accurate semiconductor wafer alignment that is not affected by the circuit pattern formed on the wafer surface.

[0014]

According to the present invention, there is provided a semiconductor wafer alignment apparatus having at least two alignment marks on the back surface thereof, wherein the wafer is mounted and fixed, and the mark is positioned at the position of the mounted and fixed state. A wafer mounting portion having corresponding mark detection holes, driving means for linearly driving the mounting portion in directions orthogonal to each other in a plane parallel to the wafer surface, and the wafer surface passing through the center of the wafer. A drive means for freely driving the mounting portion around an axis orthogonal to the mark, and a mark detection position-fixed for optically detecting the mark on the back surface of the wafer through each of the mark detection holes. There is provided a semiconductor wafer alignment apparatus including:

[0015]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a perspective view showing an outline of a wafer alignment mechanism according to an embodiment of the present invention, FIG. 2 is a side view showing an outline of an alignment mechanism portion, and FIG. 3 is an example of an alignment mark on the back surface of a wafer. FIG. The same parts are denoted by the same reference numerals throughout the drawings.

On the wafer 1, alignment marks 10 having a sufficient depth so as not to be erased in the wafer process stage are formed at two places on the back surface (at least two places are required), etching, laser markers, etc. during the wafer process. Is formed by.

The orientation of the wafer 1 is corrected by the position of the orientation flat 11 by a pre-alignment mechanism (not shown), and the wafer 1 is placed at a prescribed position on the wafer chuck 2 along the guide pins 5 on the wafer chuck 2. By placing the wafer 1 at the specified position, the wafer 1 is placed at the position of the detection hole 3 provided in the wafer chuck 2.
The alignment mark 10 on the back surface comes. The detection hole 3 is larger than the alignment mark 10 in order to optically detect the alignment mark 10, and copes with a slight deviation of the wafer 1 from the specified position.

The wafer 1 placed on the wafer chuck 2 is attracted and fixed on the wafer chuck 2 by vacuum attraction.
The position of the wafer chuck 2 does not shift when it is moved.

Further, the wafer chuck 2 is mounted on a θ stage 6 which is capable of minute rotation in the circumferential direction about the center of the wafer chuck 2, and the θ stage 6 is further provided.
Is mounted on a Y-axis stage 7 movable in the Y-axis direction shown.

The Y-axis stage 7 is mounted on an X-axis stage 8 which is movable in the X-axis direction which is 90 ° orthogonal to the Y-axis shown, and the X-axis stage 8 is mounted on a base 9. The θ stage 6, the Y-axis stage 7, and the X-axis stage 8 are accurately moved by a pulse motor.

When the pre-alignment is normal, the alignment mark 10 of the wafer 1 is located in the detection hole 3 provided in the wafer chuck 2, so that each detection hole 3 is detected.
A predetermined detection signal can be obtained from the mark detector 4 of the optical sensor which optically detects the mark shape arranged corresponding to, and each stage is moved based on the mutual relationship between the reference position and the detection position. And perform accurate alignment operation.

If the pre-alignment is incorrect,
Since the alignment mark 10 does not come to the position of the detection hole 3 of the wafer chuck 2 and the output signal of the mark detector 4 disappears, pre-alignment is performed again.

As the alignment operation, a reference position is set when the mark detector 4 is attached, and the detection signal of the alignment mark 10 detected by the mark detector 4 and the positional deviation are detected from the two mark detectors 4. The signal is input to confirm on the monitor 12 or the like.

Next, by using a control mechanism (not shown), first pay attention to any one of the mark positions,
The Y-axis stage 7 is moved so that the mark position coincides with the Y-axis of the reference position. Next, the marked mark position is Y
The θ stage 6 and the Y-axis stage 7 are moved alternately while being not displaced from the axis, and operation is performed until the focused mark position and the remaining mark positions coincide with each other on the Y-axis.

Next, paying attention to one of the mark positions, the X-axis stage 8 is moved while confirming that the mark position does not deviate from the Y-axis, and operation is performed until the mark position becomes the reference position. The alignment operation is completed by matching with.

In the above embodiment, the Y-axis alignment is performed, but the X-axis alignment may be performed first. Further, the detection signal from the mark detector 4 is monitored 12
It is also possible to provide a controller that calculates the positional deviation and automatically controls each stage according to the movement amount of each stage, instead of displaying the above.

[0028]

As described above, according to the present invention, a wafer having alignment marks at two or more locations on the back surface is mounted on a wafer chuck having mark detection holes corresponding to the alignment marks, and detection is performed. By detecting the alignment mark by the mark detector of the optical sensor corresponding to the use hole and controlling the position shift, the influence of the surface pattern is affected compared to the conventional alignment method using the circuit pattern on the wafer surface. Since it is not received, there is an effect that a certain high-precision alignment can be performed on a wafer having a thin pattern, a wafer on which multi-chips are mounted, and the like.

[Brief description of drawings]

FIG. 1 is a perspective view showing the structure of an embodiment of the present invention.

FIG. 2 is a side view of an embodiment of the present invention.

FIG. 3 is a diagram showing an example of an alignment mark on the back surface of a wafer used in an embodiment of the present invention.

FIG. 4 is a diagram for explaining a conventional fine alignment method.

[Explanation of symbols]

 1 Semiconductor Wafer 2 Wafer Chuck 3 Mark Detection Hole 4 Mark Detector 6 θ Stage 7 Y-Axis Stage 8 X-Axis Stage 9 Base 10 Alignment Mark 11 Orientation Flat 12 Monitor

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/68 F 8418-4M

Claims (1)

[Claims] 1. A semiconductor wafer alignment apparatus having at least two alignment marks on a back surface thereof, wherein the wafer is mounted and fixed, and mark detection is performed corresponding to each position of the marks in the mounted and fixed state. A wafer mounting portion having a hole, a driving means capable of linearly driving the mounting portion in a direction orthogonal to each other in a plane parallel to the wafer surface, and an axis passing through the center of the wafer and orthogonal to the wafer surface. And a mark detecting means fixed in position for detecting and optically detecting a mark on the back surface of the wafer through each of the mark detecting holes. Characteristic semiconductor wafer alignment device.