JPH05161348A - Switching regulator - Google Patents

Abstract

PURPOSE:To materialize the miniaturization of entire device by equipping a voltage stabilizer with a means, which shifts the reference voltage to become the standard in setting of an output voltage value to lower voltage only for a short time at rise of output voltage. CONSTITUTION:The output voltage 15 of a switching AC-DC converter 1 is divided with sense resistors 3 and 4, and when the divided one is input into an error amplifier 5, it receives the reference voltage 17 from a reference voltage circuit 9 and takes the difference and inputs it into a comparator 11 after amplifying it. Moreover, a reference voltage shift timer circuit 10 is connected to the reference voltage circuit 9, and it controls reference voltage 17 for a certain time and lowers the reference voltage. Accordingly, while the timer is set, the output of an error amplifier begins to rise from the middle of output voltage 15 rising, and enters the control range a little early, and then the reference voltage 17 rises, and raises the output voltage 15 to a set value, so output voltage free from apparent overshoot can be gotten. As a result, the miniaturization of the entire device becomes possible by miniaturizing the output capacitor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention is used in a device for converting alternating current into direct current. In particular, it relates to a technique for suppressing overshoot when the output rises.

[0002]

2. Description of the Related Art In this type of control, the pulse width is gradually widened by soft start to slow down the rise of the output voltage and suppress overshoot.

A conventional example will be described with reference to FIG. FIG. 3 is a block diagram of a conventional device.

The output voltage 15 of the switching ACDC converter 1 is divided by the sense resistors 3 and 4, and the divided voltage is input to the error amplifier 5. The error amplifier 5 takes the difference between this voltage and the reference voltage 17 from the reference voltage circuit 9, amplifies it, and inputs it to the comparator 11. The output voltage 15 is determined by the reference voltage 17 and the sense resistors 3 and 4.
The resistor 6 connected to the error amplifier 5 determines the DC gain at which the error amplifier 5 operates, and is normally set to 30 dB or more. Further, the resistor 7 and the capacitor 8 connected in parallel perform phase compensation and are set so as to have a phase margin.

The comparator 11 compares the output of the error amplifier 5 with the triangular wave output of the triangular wave oscillating circuit 12, outputs a pulse having a pulse width determined by the level of the error amplifier 5, and inputs the pulse to the AND circuit 13.

The output from the pulse width limiting circuit 14 is input to the other side of the AND circuit 13. A soft start circuit 19 is connected to the pulse width limiting circuit 14, and the soft start circuit 19 operates at the time of startup,
Since the limiting width of the pulse width of the pulse width limiting circuit 14 is gradually widened, the output of the AND circuit 13 becomes the pulse width from the pulse width limiting circuit 14 only at the time of rising, and the rising of the output voltage 15 is made dull.

Next, the operation of the conventional example will be described with reference to FIG. FIG. 4 is a diagram showing a rising state of the conventional device.

The soft start time 20 is set to be long so that the rising curve of the output voltage 15 is made gentle and the overshoot 21 is suppressed.
Since the DC gain of is set to 30 dB or more, the error amplifier output 16 does not rise unless the output voltage 15 rises to a voltage that satisfies the condition. The time overshoot 21 comes out. Moreover, the time required for the error amplifier output 16 to enter the control range 22 is switching A.
Since the switching of the CDC converter 1 is also starting to rise, switching A becomes higher as the oscillation becomes higher in frequency.
The operation efficiency of the CDC conversion unit 1 itself also improves, and the overshoot 21 tends to increase more and more.
Therefore, as a method to prevent this, soft start time 20
It is supported by taking longer or increasing the capacity of the output capacitor.

[0009]

In overshoot suppression by such a method, there is a problem that the output capacitor and the vicinity of the soft start circuit become large even if the frequency of the switching regulator is increased and the size is reduced. .

The present invention has been made in view of such a background, and an object of the present invention is to provide a switching regulator capable of realizing the miniaturization of the entire apparatus by miniaturizing the overshoot suppressing means.

[0011]

According to the present invention, a switching ACDC converter which inputs an AC voltage and outputs a DC voltage, and a voltage stabilizing circuit which stabilizes an output voltage from the switching ACDC converter with respect to a reference voltage are provided. In the switching regulator provided with the stabilizing unit, the voltage stabilizing unit includes means for shifting the reference voltage, which is a reference for setting the output voltage value, to a lower voltage for a short time when the output voltage rises. Characterize.

[0012]

When the output voltage rises, due to the delay of the rise of the error amplifier, an overshoot that momentarily exceeds the set output voltage occurs. The reason why the rise of the error amplifier is delayed is that it takes some time until the output voltage reaches the DC gain for starting the operation of the error amplifier.

Since this DC gain is a gain from the reference voltage set by the reference voltage circuit, if the reference voltage can be temporarily lowered at the time of rising, the D of the error amplifier can be reduced.
The C gain also reaches the operation start level faster. The reference voltage shift timer circuit realizes this.

The reference voltage shift timer circuit shortens the DC gain acquisition timing of the error amplifier by lowering the reference voltage for a certain period of time when it rises. Of course, no matter how much the operation start timing of the error amplifier is accelerated, overshoot occurs at the start of operation of the error amplifier, but the peak level of this overshoot does not exceed the output voltage value because the reference voltage is low. There is no. And
After the error amplifier starts operating, the reference voltage is returned to the normal value, and the output voltage is raised to the set value under the control of the error amplifier. Therefore, an output voltage apparently free of overshoot can be obtained.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of the device of the embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

According to the present invention, a switching ACDC converter 1 for inputting an AC voltage and outputting a DC voltage, and a voltage stabilizer for stabilizing an output voltage 15 from the switching ACDC converter 1 with respect to a reference voltage 17. In the switching regulator including 2 and 3, the voltage stabilizing unit 2
The reference voltage 1 which is the reference for setting the value of the output voltage 15.
7 is a reference voltage shift timer circuit 10 that is a means for shifting to a low voltage for a short time when the output voltage rises.
It is characterized by having.

Next, the operation of the apparatus of the present invention will be described.

The output voltage 15 of the switching ACDC converter 1 is divided by the sense resistors 3 and 4, and the error amplifier 5
Entered in. In the error amplifier 5, the reference voltage 17 from the reference voltage circuit 9 is input, the difference between them is taken and amplified, and then input to the comparator 11. A reference voltage shift timer circuit 10 is connected to the reference voltage circuit 9, and controls the reference voltage 17 for a certain period of time to lower the reference voltage 17. The resistor 6 connected in parallel to the error amplifier 5 is DC
It determines the gain, and is usually 30 dB or more.
Further, the resistor 7 and the capacitor 8 are for phase compensation and are set so as to have a phase margin.

The comparator 11 compares the output of the error amplifier 5 and the triangular wave output of the triangular wave oscillator 12, and outputs the pulse width output corresponding to the output level of the error amplifier to the AND circuit 13.
Are typing in.

The pulse width limiting pulse from the pulse width limiting circuit 14 is input to the other side of the AND circuit 13, and the pulse width at the time of rising is determined by the pulse width from the comparator 11.

Next, the state of the apparatus according to the present invention at the time of rising will be described with reference to FIG. FIG. 2 is a diagram showing a rising state of the apparatus according to the present invention.

Since the reference voltage 17 is low during the timer setting time 18 set by the reference voltage shift timer circuit 10, the error amplifier output 16 outputs the switching AC.
The output voltage 15 of the DC conversion unit 1 starts to rise while it is rising and enters the control range 22 quickly. At this time as well, the overshoot 21 is generated, but the output voltage 15 is below the peak level. After that, the reference voltage 17 rises to raise the output voltage 15 to the voltage of the set value, so that an output voltage apparently free of overshoot can be obtained.

[0023]

The soft start circuit is eliminated and the output capacitor is miniaturized to contribute to the miniaturization of the entire apparatus, while the output voltage having a short rise time and apparently no overshoot can be obtained. In addition, cost and man-hour reduction can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram showing a rising state of the apparatus according to the embodiment of the present invention.

FIG. 3 is a block diagram of a conventional device.

FIG. 4 is a diagram showing a rising state of a conventional device.

[Explanation of symbols]

 1 Switching ACDC Converter 2 Voltage Stabilizer 3, 4 Sense Resistor 5 Error Amplifier 6, 7 Resistor 8 Capacitor 9 Reference Voltage Circuit 10 Reference Voltage Shift Timer Circuit 11 Comparator 12 Triangular Wave Oscillation Circuit 13 AND Circuit 14 Pulse Width Limiting Circuit 15 Output voltage 16 Error amplifier output 17 Reference voltage 18 Timer setting time 19 Soft start circuit 20 Soft start time 21 Overshoot 22 Control range

Claims (1)

[Claims] 1. A switching AC / DC converter which inputs an AC voltage and outputs a DC voltage, and the switching AC / DC converter.
A switching regulator including a voltage stabilizing unit that stabilizes an output voltage from a DC converting unit with respect to a reference voltage, wherein the voltage stabilizing unit outputs the reference voltage serving as a reference for setting an output voltage value. A switching regulator characterized in that it has means for shifting to a low voltage for a short time at the time of rising.