JPH05160047A - Vapor epitaxial growth method - Google Patents

Vapor epitaxial growth method

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Publication number
JPH05160047A
JPH05160047A JP34902291A JP34902291A JPH05160047A JP H05160047 A JPH05160047 A JP H05160047A JP 34902291 A JP34902291 A JP 34902291A JP 34902291 A JP34902291 A JP 34902291A JP H05160047 A JPH05160047 A JP H05160047A
Authority
JP
Japan
Prior art keywords
wafer
substrate
growth
split
vapor phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP34902291A
Other languages
Japanese (ja)
Other versions
JP3030450B2 (en
Inventor
Masashi Nakamura
正志 中村
Satoshi Aramaki
聡 荒巻
Ryuichi Hirano
立一 平野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eneos Corp
Original Assignee
Nippon Mining Co Ltd
Nikko Kyodo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mining Co Ltd, Nikko Kyodo Co Ltd filed Critical Nippon Mining Co Ltd
Priority to JP3349022A priority Critical patent/JP3030450B2/en
Publication of JPH05160047A publication Critical patent/JPH05160047A/en
Application granted granted Critical
Publication of JP3030450B2 publication Critical patent/JP3030450B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To reduce a stress, which is remained in a wafer, and to prevent a linear defect from being generated by a method wherein the wafer is split, the split wafer pieces are put in a reaction tube as substrates for growth use and the temperatures of substrate installation parts are controlled in an extent of a specified value to epitaxially grow a III-V compound semiconductor layer. CONSTITUTION:A 2-inch diameter wager cur from an Fe-doped semi-insulating single-crystal InP ingot in (100)-plane is cut along a B-B' line (the direction parallel to an orientation flat) and a C-C' line (the direction to intersect orthogonally the orientation flat) to split into 4. These split wafer pieces are installed on a susceptor 3 of a vapor growth device and an InP layer is epitaxially grown at a growth temperature of 650 deg.C to 700 deg.C by an MOCVD method. In such a way, the areas of the substrates for growth use are made small, whereby a stress which is remained in the wafer can be reduced. Moreover, as the growth temperature is rather high, the residual stress can be released.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、エピタキシャル成長技
術に関し、特にMOCVD法(有機金属気相成長法)に
よりInP(インジウム・リン)のようなIII−V族化
合物半導体層をエピタキシャル成長させる場合に利用し
て好適な技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an epitaxial growth technique, and in particular, it is used for epitaxially growing a group III-V compound semiconductor layer such as InP (indium phosphorus) by MOCVD (metal organic chemical vapor deposition). And suitable technology.

【0002】[0002]

【従来の技術】化合物半導体のエピタキシャル成長技術
として、VPE法(気相エピタキシャル成長方法)やM
OCVD法、MBE法(分子線エピタキシャル法)が知
られている。このうち、MOCVD法は膜厚制御性が良
好で大量生産に適しているため、III−V族化合物半導
体層のエピタキシャル成長に利用されている。図1に
は、化合物半導体気相成長装置の概略が示されている。
すなわち、この気相成長装置は、マニホールド1によっ
て反応管2内に導入された複数の原料ガスが、バレル型
のサセプタ3上に載置された基板4に向かって流下し、
高周波コイル5によって加熱された基板上で熱分離して
基板上にエピタキシャル層が成長されるというものであ
る。
2. Description of the Related Art VPE method (vapor phase epitaxial growth method) and M are used as epitaxial growth technology for compound semiconductors.
OCVD method and MBE method (molecular beam epitaxial method) are known. Among them, the MOCVD method has good film thickness controllability and is suitable for mass production, and is therefore used for epitaxial growth of III-V group compound semiconductor layers. FIG. 1 shows the outline of a compound semiconductor vapor phase growth apparatus.
That is, in this vapor phase growth apparatus, a plurality of source gases introduced into the reaction tube 2 by the manifold 1 flow down toward the substrate 4 mounted on the barrel type susceptor 3,
The substrate heated by the high frequency coil 5 is thermally separated to grow an epitaxial layer on the substrate.

【0003】[0003]

【発明が解決しようとする課題】従来、上記気相成長装
置を用いてMOCVD法により、成長温度(基板設置
部)625℃、炉内圧力76torr、H2(水素ガ
ス)流量10l/分、III族原料ガスとV族原料ガスと
の比(V/III)250、という一般的な成長条件の下
で、FeドープInP半絶縁性基板上に、InP層をエ
ピタキシャル成長させると、基板の周縁部にてエピタキ
シャル層の表面に図2に示すような直線状の欠陥Aが数
個所発生するという問題点があった。
Conventionally, by the MOCVD method using the above-described vapor phase growth apparatus, the growth temperature (substrate installation portion) is 625 ° C., the furnace pressure is 76 torr, the H 2 (hydrogen gas) flow rate is 10 l / min, and III. Under the general growth condition of the ratio of group source gas to group V source gas (V / III) of 250, when an InP layer is epitaxially grown on a Fe-doped InP semi-insulating substrate, the peripheral edge of the substrate is formed. Thus, there is a problem that linear defects A as shown in FIG. 2 occur on the surface of the epitaxial layer at several places.

【0004】本発明は上記のような問題点に着目してな
されたもので、その目的とするところは、半導体基板上
にIII−V族化合物半導体層のエピタキシャル成長させ
る場合に線状欠陥の発生を防止できるような気相エピタ
キシャル成長方法を提供することにある。
The present invention has been made in view of the above problems, and its purpose is to prevent the generation of linear defects when epitaxially growing a III-V compound semiconductor layer on a semiconductor substrate. It is to provide a vapor phase epitaxial growth method that can be prevented.

【0005】[0005]

【課題を解決するための手段】本発明者らは、MOCV
D法により、FeドープInP半絶縁性基板上にInP
層をエピタキシャル成長させると表面に線状欠陥が発生
する原因は、ウェハに残っている応力にあるのでないか
と考え、この残留応力を小さくできるような成長条件を
設定して種々の実験を行なった。その結果の一部を表1
に示す。なお、ウェハに残留応力が生じるのはドーパン
トの元素が結晶格子に歪を起こさせるためである。
Means for Solving the Problems The present inventors have found that MOCV
InP on Fe-doped InP semi-insulating substrate by D method
We thought that the cause of the linear defects on the surface when the layer was grown epitaxially was the stress remaining in the wafer, and various experiments were conducted under the growth conditions that could reduce this residual stress. Some of the results are shown in Table 1.
Shown in. The residual stress is generated in the wafer because the dopant element causes strain in the crystal lattice.

【表1】 [Table 1]

【0006】上記表1より、直径2インチのウェハのま
までは成長温度を高くしても線状欠陥が発生するが、ウ
ェハを4分割しかつ成長温度を高め(650℃,700
℃)に設定して成長を行なうと、線状欠陥が発生しなく
なることが分かる。本発明は、上記知見に基いてなされ
たもので、反応管内に配置された基板上に有機金属気相
成長法を用いて化合物半導体層を成長させる気相エピタ
キシャル成長方法において、ウェハを分割してそれを成
長用基板として反応管内に入れて、基板設置部の温度を
650℃以上700℃以下に制御してIII−V族化合物
半導体層をエピタキシャル成長させることを提案するも
のである。
From Table 1 above, although a linear defect occurs even if the growth temperature is increased with a wafer having a diameter of 2 inches, the wafer is divided into four and the growth temperature is increased (650 ° C., 700 ° C.).
It can be seen that the linear defects do not occur when the temperature is set to (° C.) and the growth is performed. The present invention has been made based on the above findings, in a vapor phase epitaxial growth method of growing a compound semiconductor layer using a metal organic vapor phase epitaxy method on a substrate arranged in a reaction tube, the wafer is divided into Is put into a reaction tube as a substrate for growth, and the temperature of the substrate installation part is controlled to 650 ° C. or higher and 700 ° C. or lower to epitaxially grow the III-V group compound semiconductor layer.

【0007】[0007]

【作用】上記した手段によれば、ウェハを分割してそれ
を成長用基板として用いるため面積が小さくされること
によりウェハに残っていた応力が低減されるとともに、
成長温度を従来よりも高めに設定しているためウェハの
残留応力が解放され、その結果エピタキシャル成長層表
面に線状欠陥が発生するのを防止することができる。
According to the above-mentioned means, since the wafer is divided and used as a growth substrate, the area is reduced, so that the stress remaining on the wafer is reduced and at the same time,
Since the growth temperature is set higher than the conventional one, residual stress of the wafer is released, and as a result, it is possible to prevent the generation of linear defects on the surface of the epitaxial growth layer.

【0008】[0008]

【実施例】FeドープInP半絶縁性単結晶インゴット
から結晶の(100)面に沿って切断された直径2イン
チのウェハと、このウェハを図2のB−B’線(オリエ
ンテーションフラットと平行な方向)と、C−C’線
(オリエンテーションフラットと直交する方向)に沿っ
て切断して4分割したものを用意した。上記ウェハと分
割ウェハ片を図1に示されている気相成長装置のサセプ
タ4上に設置して、MOCVD法により、成長温度(基
板設置部)620℃、炉内圧力76torr、H2(水
素ガス)流量10l/分、III族原料ガスとV族原料ガ
スとの比(V/III)250、なる条件の下で、InP
層をエピタキシャル成長させた。また、成長温度のみ7
00℃とし、その他の条件は上記と同一にして2インチ
ウェハと分割ウェハ片上にInP層をそれぞれエピタキ
シャル成長させた。
EXAMPLE A wafer having a diameter of 2 inches cut from an Fe-doped InP semi-insulating single crystal ingot along the (100) plane of the crystal, and this wafer were cut along the line BB ′ (parallel to the orientation flat in FIG. 2). Direction) and a CC ′ line (direction orthogonal to the orientation flat) and cut into four pieces. The wafer and the divided wafer pieces are set on the susceptor 4 of the vapor phase growth apparatus shown in FIG. 1, and the growth temperature (substrate setting part) is 620 ° C., the pressure in the furnace is 76 torr, H 2 (hydrogen) by MOCVD. Gas) flow rate 10 l / min, and the ratio of group III source gas to group V source gas (V / III) 250, InP
The layer was grown epitaxially. Also, only the growth temperature is 7
The temperature was set to 00 ° C., and the other conditions were the same as above, and InP layers were epitaxially grown on the 2-inch wafer and the divided wafer piece, respectively.

【0009】さらに、分割ウェハ片については、成長温
度を600℃と650℃として、その他の条件は上記と
同一にしてInP層をそれぞれエピタキシャル成長させ
る実験を行なった。エピタキシャル成長後のウェハ表面
を観察したところ、表1に示すように、直径2インチの
ウェハのままでは成長温度が低くても高くても線状欠陥
が発生していたが、4分割ウェハ片に関しては成長温度
が600℃と620℃では線状欠陥が発生していたが、
成長温度を650℃と700℃としたときには線状欠陥
が発生しなかった。
Further, with respect to the divided wafer pieces, an experiment was conducted in which the growth temperatures were set to 600 ° C. and 650 ° C. and the InP layers were epitaxially grown under the same conditions as above. When the wafer surface after the epitaxial growth was observed, as shown in Table 1, linear defects were generated with the wafer having a diameter of 2 inches as the growth temperature was low or high. Linear defects occurred at growth temperatures of 600 ° C and 620 ° C,
No linear defects occurred when the growth temperature was 650 ° C. and 700 ° C.

【0010】なお、上記実施例では、FeドープInP
基板上にInP層をエピタキシャル成長させる場合を例
にとって説明したが、この発明はそれに限定されず、F
e以外の元素をドープしたInP基板やInP以外のG
aAs基板その他残留応力が存在するような化合物半導
体基板上にエピタキシャル成長を行なう場合に適用する
ことができる。また、本発明はMOCVD法以外の気相
成長方法により半導体基板上にエピタキシャル層を成長
させる場合に利用することができる。
In the above embodiment, Fe-doped InP is used.
The case where the InP layer is epitaxially grown on the substrate has been described as an example, but the present invention is not limited to this.
InP substrate doped with an element other than e or G other than InP
It can be applied when epitaxial growth is performed on an aAs substrate or other compound semiconductor substrate having residual stress. Further, the present invention can be used when an epitaxial layer is grown on a semiconductor substrate by a vapor phase growth method other than the MOCVD method.

【0011】[0011]

【発明の効果】以上説明したように、本発明は、反応管
内に配置された基板上にMOCVD法を用いて化合物半
導体層を成長させる気相エピタキシャル成長方法におい
て、ウェハを分割してそれを成長用基板として反応管内
に入れて、基板設置部の温度を650℃以上700℃以
下に制御してIII−V族化合物半導体層をエピタキシャ
ル成長させるようにしたので、成長用基板の面積が小さ
くされることによりウェハに残っていた応力が低減され
るとともに、成長温度を従来よりも高めに設定している
ためウェハの残留応力が解放され、その結果エピタキシ
ャル成長層表面に線状欠陥が発生するのを防止すること
ができるという効果がある。
As described above, according to the present invention, in a vapor phase epitaxial growth method for growing a compound semiconductor layer on a substrate arranged in a reaction tube by using a MOCVD method, a wafer is divided to grow it. Since the substrate is placed in a reaction tube and the temperature of the substrate installation part is controlled to 650 ° C. or higher and 700 ° C. or lower to epitaxially grow the III-V compound semiconductor layer, the area of the growth substrate is reduced. The stress remaining on the wafer is reduced and the residual stress of the wafer is released because the growth temperature is set higher than before, resulting in the prevention of linear defects on the surface of the epitaxial growth layer. There is an effect that can be.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明方法を適用して好適な気相成長装置の一
例を示す概略構成図である。
FIG. 1 is a schematic configuration diagram showing an example of a suitable vapor phase growth apparatus to which the method of the present invention is applied.

【図2】FeドープInP基板上にInP層を従来のM
OCVD法で成長させた場合のウェハ表面の線状欠陥の
発生状況を示す平面図である。
FIG. 2 shows a conventional M-layered InP layer on a Fe-doped InP substrate.
It is a top view which shows the generation condition of the linear defect of the wafer surface at the time of making it grow by the OCVD method.

【符号の説明】[Explanation of symbols]

1 マニホールド 2 反応管 3 サセプタ 4 半導体基板 5 高周波コイル 6 支持軸 1 Manifold 2 Reaction Tube 3 Susceptor 4 Semiconductor Substrate 5 High Frequency Coil 6 Support Shaft

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 反応管内に配置された基板上に有機金属
気相成長法を用いて化合物半導体層を成長させる気相エ
ピタキシャル成長方法において、ウェハを分割してそれ
を成長用基板として反応管内に入れて、基板設置部の温
度を650℃以上700℃以下に制御してIII−V族化
合物半導体層をエピタキシャル成長させるようにしたこ
とを特徴とする気相エピタキシャル成長方法。
1. In a vapor phase epitaxial growth method for growing a compound semiconductor layer on a substrate arranged in a reaction tube by using a metal organic vapor phase epitaxy method, a wafer is divided and put into the reaction tube as a growth substrate. And a temperature of the substrate installation portion is controlled to 650 ° C. or higher and 700 ° C. or lower to epitaxially grow the III-V compound semiconductor layer.
【請求項2】 上記請求項1記載の気相エピタキシャル
成長方法において、成長用のウェハをオリエンテーショ
ンフラットと平行な方向および直交する方向に沿って4
分割することを特徴とする気相エピタキシャル成長方
法。
2. The vapor phase epitaxial growth method according to claim 1, wherein the wafer for growth is formed along a direction parallel to and perpendicular to the orientation flat.
A vapor phase epitaxial growth method characterized by dividing.
【請求項3】 上記基板はFeドープInP基板であ
り、上記基板上に成長されるIII−V族化合物半導体層
はInP層であることを特徴とする請求項1または請求
項2記載の気相エピタキシャル成長方法。
3. The vapor phase according to claim 1 or 2, wherein the substrate is an Fe-doped InP substrate, and the III-V group compound semiconductor layer grown on the substrate is an InP layer. Epitaxial growth method.
JP3349022A 1991-12-05 1991-12-05 Vapor phase epitaxial growth method Expired - Lifetime JP3030450B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3349022A JP3030450B2 (en) 1991-12-05 1991-12-05 Vapor phase epitaxial growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3349022A JP3030450B2 (en) 1991-12-05 1991-12-05 Vapor phase epitaxial growth method

Publications (2)

Publication Number Publication Date
JPH05160047A true JPH05160047A (en) 1993-06-25
JP3030450B2 JP3030450B2 (en) 2000-04-10

Family

ID=18400964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3349022A Expired - Lifetime JP3030450B2 (en) 1991-12-05 1991-12-05 Vapor phase epitaxial growth method

Country Status (1)

Country Link
JP (1) JP3030450B2 (en)

Also Published As

Publication number Publication date
JP3030450B2 (en) 2000-04-10

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