JPH05159079A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To facilitate removing the bug of a program in a one chip microcomputer. CONSTITUTION:This device is provided with a Microprocessor 11 which can be operated in first/second operation modes, EPROM 12 storing a program for the first operation mode, mask ROM 13 storing a program for the second operation mode, a operation mode selection means 14 which can select either of the first/second operation modes as that of the microprocessor in response to a mode selection signal, and a program writing-in means 15 which is inputted a program signal for the first operation mode by being controlled by the microprocessor 11 in the second operation mode and writes the program for the first operation mode,into EPROM 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly, it has a built-in electrically rewritable read-only memory, which enables rewriting of a program without removing it from the device substrate when removing a bug. And a one-chip semiconductor integrated circuit device for device control.

A large amount of one-chip microcomputers (hereinafter referred to as one-chip microcomputers) that are used as control computers for various devices such as electric appliances and vehicles and that have a read-only memory in which a predetermined program is stored are used. Has been done. Particularly in the case of mass-produced devices, a mask ROM, which is generally low in cost, is used as the read-only memory mounted on the one-chip microcomputer.

Since a program code is created in the mask ROM through ion implantation or the like in the manufacturing process of the one-chip microcomputer, the program cannot be rewritten after the one-chip microcomputer is manufactured. However, a program for controlling a newly developed device generally inevitably has a bug in the program.For example, in the initial product stage immediately after product development, the program must be rewritten to eliminate this bug on the actual product. I need to do it.

[0004]

2. Description of the Related Art FIG. 3 is a block diagram of a one-chip microcomputer which constitutes a control unit at an initial stage of a product. The one-chip microcomputer 3 shown in FIG.
The program for operation 1 is stored in an electrically rewritable read only memory (EPROM) 32.
As described above, in a mass-produced product, a mask ROM is usually adopted as a read-only memory.
In anticipation of the occurrence of a program bug, the program can be rewritten in place of the mask ROM, and an EPROM having a large occupied area and a high cost is generally used.

When it is determined that the program has a bug, the package of the one-chip microcomputer is removed from the device substrate of the product, the existing program is erased through ultraviolet rays, etc., and then the program from which the bug has been removed by the ROM writer It is written and the package of the one-chip microcomputer is mounted again on the device substrate.

[0006] At the product maturity stage where the occurrence of program bugs can no longer be considered, the EPR in which the final program from which the bugs have been removed is stored until then is reached.
A large number of one-chip microcomputers including a mask ROM in which the same program as the final program is written are manufactured from the OM, and cost reduction is achieved by using the mask ROM.

In recent years, in the connection between the package of the one-chip microcomputer and the device substrate, the connection method has been changed from the conventional socket connection to the solder connection which can be further downsized, and the area occupied by the one-chip microcomputer is reduced. The reduction and cost reduction are being attempted. For this reason, when it is necessary to rewrite the program in the initial stage of the product in order to remove the bug as described above, the solder connection part is removed on the device substrate, the one-chip microcomputer chip is removed from the product, and this package is The program is newly written by mounting it on the ROM writer via the socket.

[0008]

In the conventional one-chip microcomputer, when the program needs to be rewritten, the solder connection must be removed and reconnected, and the work such as the solder connection must be done by a skilled person. In addition, there are problems that soldering and the like are particularly difficult due to the package pin which has been reduced in size in recent years, the package pin is likely to be damaged, and the work time tends to be long. ROM if package pins are damaged
There is also a problem that it is difficult for the writer to write the program itself.

In view of the above-mentioned problems of the conventional semiconductor integrated circuit device, the present invention eliminates the need to remove the one-chip microcomputer from the device board when removing a bug of a program in a device control one-chip microcomputer or the like. It is an object of the present invention to provide a semiconductor integrated circuit device that enables easy bug removal without the need for soldering work, etc., and therefore eliminates the need for skilled work and also reduces the time required for bug removal.

Further, in order to achieve the above-mentioned object, the present invention is also possible to do so while maintaining the simplicity of the structure of the one-chip microcomputer as much as possible without significantly changing the configuration such as the connection method and the number of package pins. To aim.

[0011]

FIG. 1 is a block diagram of a semiconductor integrated circuit device which constitutes a one-chip microcomputer according to a first embodiment of the present invention. In the figure, 11 is a microprocessor (CPU), 12 is an electrically rewritable first read-only memory, 13 is a second read-only memory,
Reference numeral 14 is a work mode selection means, 15 is a program writing means, MODE is a mode selection signal, and SIN is a signal relating to a program for the first operation mode.

In order to achieve the above object, the semiconductor integrated circuit device of the first invention of the present invention is, as shown in FIG. 1, a microprocessor (11) operable in first and second operation modes, An electrically rewritable first read-only memory (12) in which a program for the first operating mode is stored and a second read-only in which a program for the second operating mode is stored. A memory (13),
Operation in which the first or second read-only memory is selected in response to a mode selection signal (MODE), and the operating mode of the microprocessor (11) can be selected to either the first or second operating mode. The first mode of operation is controlled by the mode selection means (14) and the microprocessor (11) in the second mode of operation, and a signal (SIN) relating to the program for the first mode of operation is input. Program writing means (1) for writing a program for writing into the first read-only memory (12)
5) and are provided.

FIG. 2 is a block diagram of a semiconductor integrated circuit device which constitutes a one-chip microcomputer according to the second embodiment of the present invention. In the figure, 21 is a microprocessor, 22 is an electrically rewritable first read-only memory, 24 is a mode selecting means, 25 is a program writing means, and 26 is a control circuit section.

In order to achieve the above object, the semiconductor integrated circuit device of the second invention of the present invention is, as shown in FIG. 2, a microprocessor (2) which operates in the first operation mode.
1), an electrically rewritable read-only memory (22) in which a program for the microprocessor (21) is stored, and a signal (SI) relating to the program.
N) is input and the program writing means (2) for writing the program in the read-only memory (22).
5) and a control circuit section (26) for controlling the operation of the program writing means (22) in the second operation mode.
And an operation mode selection means (24) for selecting one of the first and second operation modes in response to a mode selection signal (MODE).

[0015]

In the one-chip microcomputer of the present invention, the program for the first operation mode stored in the electrically rewritable read-only memory is operated through the operation mode selection means responsive to the mode selection signal. The microprocessor is operated to control the controlled device, which is an initial product, and when a bug is found in the program for the first operation mode, the second operation mode is changed by the mode selection signal. And in this second mode of operation,
Since a program signal for the first operation mode in which the bug is removed can be input and a new program can be written to the electrically rewritable read-only memory via the program writing means, the conventional semiconductor Unlike the integrated circuit device, the program can be changed without removing the electrically rewritable read-only memory from the device substrate or the like, and the labor of soldering work requiring skill can be saved.
The work time can be shortened, and the possibility of wiring damage due to soldering work is eliminated.

Further, in the semiconductor integrated circuit device of the present invention, the device to be controlled is not limited to a specific device,
Since only one kind of semiconductor integrated circuit device of the present invention can be used for various products, it is particularly suitable as a general-purpose one-chip microcomputer for controlling a controlled object device in a small-scale production or an initial stage of the product.

[0017]

The present invention will be described in more detail with reference to the drawings. In FIG. 1, the semiconductor integrated circuit device of this embodiment is constructed as a one-chip microcomputer as a whole, and the control in the first and second operation modes is performed by the CPU 11.

The program for operating the CPU 11 is
From the EPROM 12 in which the first operating program constitutes an electrically rewritable first read-only memory, the mask RO in which the second operating program constitutes a second read-only memory.
Each is supplied from M13.

An operation mode selection means (ROM selection circuit) 14 to which a mode selection signal MODE is externally input via an input pin IN1 is provided for switching between the selection of the ROMs 12 and 13. The ROM selection circuit 14 is composed of, for example, a flip-flop, and its output is supplied to the first and second ROMs 12 and 13. In this embodiment, when the mode selection signal MODE is "1". , The mask ROM 13 is selected, and when the mode selection signal is "0", the EPROM 12 is selected.

The EPROM 12 stores a program for the first operation mode for controlling the controlled device, and the CPU 11 causes the mode selection means 14 to operate when the first operation mode is selected. The control program for the first operation mode is received via the data bus 19A from the EPROM 12 in which the chip enable signal XCE (with a top bar of CE, and so on) and the output enable signal XOE are activated.

The mask ROM 13 has a serial I / O controller 15 as a program for the second operation mode.
A predetermined program for communication control of No. 1 and writing control of the EPROM writing circuit 152 is stored.
U11 is a chip enable signal XCE when the second operation mode is selected via the operation mode selection means 14.
And a second operation program is received from the mask ROM 13 in which the output enable signal XOE is activated via the data bus 19A.

In the second operation mode,
In the EPROM 12, the chip enable signal XCE is activated and the output enable signal OCE is inactivated by the operation mode selection means 14.

A program writing means 15 is arranged in front of the EPROM 12, and the program writing means 1 is provided.
5 includes the serial I / O controller 151 and the EPRO.
The M write circuit 152 is provided, and the serial I / O control unit 151 uses the input pin IN2 to generate a program signal S which is a signal related to a program for the first operation mode.
IN, and a sync signal (clock signal) SCLK for a program signal from the input pin IN3, respectively.

The I / O unit 17 transmits the output of the control signal from the CPU 11 to the device to be controlled in the first operation mode, and also transmits the signal in the opposite direction.
The RAM 18 also stores the CP in the first operation mode.
The control signal necessary for the operation of U11 is stored and output at any time.

In the one-chip microcomputer 1 of the above embodiment,
After manufacturing the one-chip microcomputer, first, when the signal "1" for selecting the second operation mode is input from the input pin IN1, the mask ROM program is selected via the output of the ROM selection circuit 14, and the CPU is While operating in the second mode of operation, the EPROM write / read signal is "written".

A clock signal SCLK and a program signal SIN in which the first operation mode is described are given to the serial I / O control unit 151 in synchronization with the clock signal SCLK, and the serial control unit 151 is controlled by the CPU 11. The lever program signal is converted from serial data to parallel data and output via the data bus 19B.

The EPROM writing circuit 152 includes the CPU 1
1 also receives a program signal for the first mode of operation in parallel data from the data bus 19B and sends it to the EPROM via the bus line 19C.
Write to 12.

The program for the first operating mode is E
After being stored in the PROM 12, the mode selection signal is then selectively changed to “0”, and the ROM selection circuit 14 sets the chip enable signal XCE and the output enable signal XOE of the mask ROM 13 to the high level, so that the mask ROM 13 And inactivate
The output enable signal of the EPROM is active, and the write / read signal is "read".

As described above, the CPU 11 operates in the first operation mode, inputs / outputs control signals from / to the control target device via the I / O unit 17, and stores these control signals in the RAM 18 at any time. Alternatively, it can be read out from this and normal device control can be performed.

If a bug is found in the program during operation, the mode selection signal MODE is set to "1" again, the operation mode of the one-chip microcomputer is set to the second operation mode, and then the bug is eliminated. The signal SIN relating to the programmed program for the first operation mode is input again together with the clock signal SCLK via the program writer or the like to rewrite the program.

In the block diagram of the semiconductor integrated circuit device of the embodiment of FIG. 2, instead of the mask ROM 13 in which the program for the second operation mode of FIG. 1 is stored, a control circuit for controlling the second operation mode. The section 26 is arranged. Other configurations are the same as those in FIG. The control circuit section 26 operates when the selection of the mode selecting means 24 enters the second operation mode, and controls the writing in the program writing means 25.

In the case of the second embodiment, since the control circuit section 26 for controlling the program writing means is arranged in place of the mask ROM, its shape becomes larger than that of the first embodiment. However, with the circuit part performing the first operating mode,
There is an advantage that it can be clearly separated from the circuit part that executes the second operation mode.

In each of the above embodiments, since the program writing means is provided with the serial I / O control section, there is only one program signal input pin for the first operation mode, or only one package pin. The increase is kept low.

Further, in each of the above-mentioned embodiments, an example in which the EPROM of the ultraviolet erasing method is adopted as the electrically rewritable (first) read-only memory is given, but it goes without saying that the electrically erasing method is used. It is also possible to adopt the EEPROM. Further, in the second embodiment, the mask ROM which is low in cost and occupies a small area is taken as an example of the second read-only memory. However, instead of this, an EPROM, an EEPROM or the like can also be adopted. ..

When the one-chip microcomputer of each of the above-mentioned embodiments is adopted, it is possible to supply the one-chip microcomputer in which a predetermined program is stored in a very short delivery time as compared with the one-chip microcomputer provided with the mask ROM. Therefore, it is released before mass production. The development and production period of a new product device can be shortened, and even if a bug is found in the program for the product, a new program in which the bug is removed by simply switching the mode selection signal is newly added. Being writable makes it very easy to eliminate bugs in the product program.

With respect to the product, the final program stored in the EPROM is written in the mask ROM at the manufacturing stage when there is no possibility of a bug in the program, and the one-chip microcomputer including this mask ROM is mounted on the device substrate or the like. Will be installed in. As a result, the cost of the device equipped with the one-chip microcomputer can be kept low.

With the configuration of the above-described embodiment, it is not necessary to remove the one-chip microcomputer from the device substrate when removing a program bug, so that soldering work becomes unnecessary and the bug can be removed easily, and the time required to store the program can be shortened. It is possible.

Further, since the one-chip microcomputer of this embodiment is provided with the serial control I / O section, the conventional E
In a one-chip microcomputer equipped with a PROM, an increase in the required number of pins can be suppressed to be small compared to, for example, an EPROM in which pins for writing are simply drawn to the outside. Few.

Further, in the one-chip microcomputer of the present invention,
Since the program for the second operation can be shared regardless of the type of controlled product, this one-chip microcomputer can be a general-purpose one-chip microcomputer common to all controlled products. There are also advantages.

[0040]

As described above, according to the semiconductor integrated circuit device of the present invention, the one-chip microcomputer for controlling the device or the like in the early stage of commercialization can easily remove the bug of the program and needs to be removed. As a result, the time can be shortened, and the package pins of the one-chip microcomputer can be prevented from being easily damaged by soldering work.

[Brief description of drawings]

FIG. 1 is a block diagram of a semiconductor integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a semiconductor integrated circuit according to a second embodiment of the present invention.

FIG. 3 is a block diagram of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 11, 21: Microprocessor (CPU) 12, 22: Electrically rewritable read-only memory 13: Second read-only memory 14, 24: Operation mode selecting means 15, 25: Program writing means 26: Second Control circuit section for operation mode 17, 27: I / O section 18, 28: RAM 151, 251: Serial I / O control section 152, 252: EPROM writing circuit

Claims (3)

[Claims] 1. A microprocessor (11) operable in first and second operating modes, and an electrically rewritable first read-only memory in which a program for the first operating mode is stored. (12)
A second read-only memory (13) in which a program for the second operation mode is stored, and selecting the first or second read-only memory in response to a mode selection signal (MODE). An operation mode selecting means (14) capable of selecting an operation mode of the microprocessor (11) to either a first operation mode or a second operation mode, and controlling the microprocessor (11) in the second operation mode. A program write means (1) for receiving a signal (SIN) relating to the program for the first operation mode and writing the program for the first operation mode in the first read-only memory (12).
5) A one-chip semiconductor integrated circuit device comprising: 2. A microprocessor (21) operating in a first mode of operation, and an electrically rewritable read-only memory (2) in which a program for the microprocessor (21) is stored.
2), a program writing means (25) for receiving the signal (SIN) relating to the program and writing the program into the read-only memory (22), and a program writing means (22) in the second operation mode. A control circuit section (26) for controlling the operation, and an operation mode selecting means (24) for selecting one of the first and second operation modes in response to a mode selection signal (MODE). One-chip semiconductor integrated circuit device. 3. The program writing means (15, 25)
Is a serial I / O control unit (15) to which serial data is input as a signal (SIN) related to the program.
1, 251) is provided.
The semiconductor integrated circuit device described.