JPH05152966A - Pulse density modulation type d/a converter - Google Patents

Abstract

PURPOSE:To improve the response without losing the linearity of D/A conversion in a PDM (pulse density modulation) D/A converter circuit by using an error between a D/A conversion detection value and a 50% command so as to correct the original command thereby forming a new correction value. CONSTITUTION:According to a command and a digital command from an error computing element 3, a PDM circuit 4A implements pulse density adjustment to input PDM pulses of a prescribed number to a linear filter 6A. The pulse is inputted to the computing element 3 via an A/D converter 2, in which a digital command value (true value) is calculated and outputted to have a 50% output to the circuit 4A. Simultaneously, an error epsilonr between the 50% command value and a detected value being the output of the converter 2 is calculated and the error epsilonr is inputted to a correction computing element 5. The computing element 5 uses the error epsilonr with respect to a digital command N to be inputted to implement command correction calculation and inputs the result to a PDM circuit 4B, in which pulse density modulation is implemented to generate a PDM pulse and an analog output equivalent to a command ST is given via a linear filter 6B.

Description

Detailed Description of the Invention

[0001]

This invention relates to pulse density modulation (Puls
The present invention relates to a D / A conversion circuit based on e Density Modulation (PDM), and more particularly to a PDM D / A conversion circuit with improved responsiveness and linearity of D / A conversion.

[0002]

2. Description of the Related Art PDM is known as a modulation method for modulating a signal with the number of pulses (that is, pulse density) existing within a certain fixed period. If this PDM is used, as shown in FIG. 5, for example, the PDM circuit 201
The digital command value “100” input to the D is converted into the analog output value “100” by inputting 100 pulses within the constant period T based on the clock CK and inputting it to the primary filter 202 or the like. The / A conversion circuit 200 can be configured.

The D / A conversion circuit 20 thus configured
In order to improve the responsiveness of D / A conversion by the PDM circuit 201 at 0, the frequency of the clock CK that determines the minimum value of the pulse density may be increased. However, if the clock frequency is increased, the devices used in the PDM circuit 201 Responsiveness becomes a problem. That is, as the clock frequency is increased, the width of the pulse output from the device is shortened. However, as shown in FIG. 6, the delays t _dH and t _dL ( t _dH ≠
t _dL ) becomes significant, and the difference Δt = t _dH −t _dL becomes D
This was a cause of impairing the linearity of the / A conversion.

[0004]

Therefore, in the past,
In the PDM circuit, a low clock frequency is used so that the delay time difference Δt does not cause a problem, but as a result, there is a problem that the responsiveness of D / A conversion cannot be improved. The present invention has been made to solve the above problems, and its purpose is to provide a D / A
An object of the present invention is to provide a PDM type D / A conversion circuit capable of improving the responsiveness without impairing the conversion linearity.

[0005]

In order to achieve the above object, the first invention is a PD to which a digital command value is input.
A pulse density modulation type D / A conversion circuit for obtaining an analog output value corresponding to the command value by performing pulse density modulation by the M circuit, a detector for detecting the analog output value as a digital value, and an output pulse of the PDM circuit. Error calculator for calculating an error generated between the value detected by the detector and the digital command value that gives a 50% output due to the time difference between the rising and falling edges of the signal, and the original digital command using the error. And a command value correction calculator for inputting a new digital command value obtained by correcting the value to the PDM circuit.

A second aspect of the invention is between the detected value obtained by detecting the analog output value as a digital value and the digital command value giving 50% output due to the time difference between the rising and falling edges of the output pulse of the PDM circuit. It is provided with a correction table in which a new digital command value obtained by correcting the original digital command value using the generated error is stored as a command value to be inputted to the PDM circuit.

[0007]

According to the first invention, the rising edge of the PDM pulse /
In order to improve the responsiveness of D / A conversion by detecting the error caused by the time difference of the falling edges and correcting the original digital command value based on this error to obtain a new command value.
Even if the clock frequency of the DM circuit is increased, D / A conversion is performed based on the command value in consideration of the above error.
It does not impair the linearity of the / A conversion. Further, the above-mentioned error changes following changes in the ambient temperature and the like and is reflected in the new command value, so that a D / A conversion circuit having good linearity is always realized without being affected by the ambient temperature and the like. be able to.

According to the second aspect of the invention, the digital command value considering the above error is stored in advance in the correction table, and the command value read from this table is input to the PDM circuit. Comparing with the invention of No. 1), the correction calculation process of the command value is not necessary, and the PDM circuit is single.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the first invention. In the figure, reference numeral 1 is a digital section, inside of which a command value correction calculator 5 to which a digital command value (value to be converted into an analog amount) N is inputted, and a corrected digital command value ST which is its output. One of the PDM circuits 4B is added. Further, 2 is an A / D converter as a detector for detecting the output of the D / A conversion circuit,
The output is added to the command value and the error calculator 3, and the command value and the command value output from the error calculator 3 are the other PDM.
An error ε _r, which will be described later, calculated by the command value and error calculator 3 is added to the circuit 4A and the command value correction calculator 5 described later.

Further, outside the digital section 1, the outputs of the PDM circuits 4A and 4B are the primary filters 6A and 6B.
Of which the primary filter 6B is included.
Is an analog output value of the D / A conversion circuit, and the analog amount output from the primary filter 6A is added to the A / D converter 2.

Next, the operation of this embodiment will be described. First, according to the command value and the digital command value from the error calculator 3, the PDM circuit 4A performs pulse density modulation and inputs a predetermined number of PDM pulses to the primary filter 6A. This PDM pulse is converted into an analog quantity by the primary filter 6A and inputted into the A / D converter 2 to become a digital quantity. Then, this digital amount is input to the command value and the error calculator 3. Here, the command value and the error calculator 3 are
A digital command value (true value) that outputs 50% to the PDM circuit 4A is calculated and output. At the same time, the error ε _r between this 50% command value and the detected value which is the output value of the A / D converter 2 is also calculated, and this error ε _r is input to the command value correction calculator 5.

Then, the command value correction calculator 5 performs a command value correction calculation, which will be described later, using the error ε _r on the originally input digital command value N, and the result is used as a corrected digital command value ST. Input to the PDM circuit 4B. The PDM circuit 4B performs pulse density modulation based on the command value ST to generate a PDM pulse, and this pulse is 1
It becomes an analog output value corresponding to the command value ST via the next filter 6B.

That is, in this embodiment, the PDM circuit 4
A 50% command value is given to A, the D / A conversion value at that time is detected to find an error from the true value, and the command value for the PDM circuit 4B is corrected using this error. Here, the 50% command value is set to the true value for the following reason. That is, PD
When a 50% command value is given to the M circuit, the PDM output pulse has a duty of 50%, a frequency of 1/2 of the basic clock, and the highest frequency. In addition, except for the 50% command value, the number of pulses in which the difference between the rising / falling times is an error decreases, and the error in the PDM pulse width decreases. Therefore, as shown in FIG. 2, when a 50% command value is given to the PDM circuit, a maximum error ε _p occurs, so by correcting this command value by taking this error into account,
The linearity of D / A conversion can be compensated.

The command value correction calculation performed by the command value correction calculator 5 using the command value and the error ε _r output from the error calculator 3 will be described below. First, 0 ≦ N ≦ (M /
In the range of 2), the corrected command value ST output from the command value correction calculator 5 is represented by Formula 1.

[0015]

## EQU1 ## ST = {(50% (D / A conversion output) + ε _r ) / (M / 2)} × N

Further, in the range of (M / 2) <N ≦ M,
The corrected command value ST is as shown in Equation 2.

[0017]

## EQU2 ## ST = {(50% (D / A conversion output) -ε _r ) / (M / 2)} × N + 2ε _p

The above equations 1 and 2 are illustrated as a characteristic line ST in FIG. That is, as shown in FIG.
The command value ST considering the error ε _r is obtained according to the range (size) of the command value N, and the PDM circuit 4B is operated in accordance with this command value to compensate for the characteristic before the command value correction and to obtain a substantially ideal characteristic. It is possible to realize the linearity of D / A conversion as it is. In this embodiment, the error ε _r changes following the change in the ambient temperature and the like, but since this error is immediately reflected in the new command value ST, the error ε _r is always linear without being affected by the ambient temperature and the like. A good D / A conversion circuit can be realized.

Next, FIG. 4 shows an embodiment of the second invention. In this embodiment, the above-mentioned error ε _r is obtained in advance, and the corrected digital command value S calculated by Equations 1 and 2 is used.
T is a correction table 7 in the ROM 7 of the digital section 1 '.
It is stored in a, the command value ST corresponding to the original range of the command value N is read, and is input to the PDM circuit 4. In addition, in FIG. 4, 6 has shown the 1st-order filter.

According to this embodiment, the command value ST already calculated according to the original command value N is read out from the correction table 7a and input to the PDM circuit, so that it is different from the first invention. Therefore, the correction calculation process of the command value becomes unnecessary, and the process speed can be increased. Moreover, since only a single PDM circuit and filter are required, and an A / D converter as a detector and a command value and error calculator are not required, it is possible to simplify the circuit, improve reliability, and reduce cost. Becomes

[0021]

As described above, according to the first invention, D /
Since a new command value is obtained by correcting the original command value using the error between the A conversion detected value and the 50% command value, D /
Even if the clock frequency of the PDM circuit is increased in order to improve the responsiveness of the A conversion, the D / A conversion is always performed based on the command value that takes the above error into consideration, so that the linearity of the D / A conversion is impaired. There is no. In addition, when used with the conventional responsiveness, the resolution can be improved.

According to the second invention, like the first invention, the responsiveness can be enhanced without impairing the linearity of the D / A conversion, and the circuit configuration can be simplified and the cost can be reduced. You can

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of the first invention.

FIG. 2 is a diagram showing a relationship between a command value and an error of a PDM pulse width.

FIG. 3 is a diagram showing D / A conversion characteristics according to the embodiment of FIG.

FIG. 4 is a functional block diagram showing an embodiment of the second invention.

FIG. 5 is a conceptual diagram of a PDM type D / A conversion circuit.

FIG. 6 is a diagram showing rising / falling time delay of a PDM pulse.

[Explanation of symbols]

1, 1'Digital section 2 A / D converter 3 Command value and error calculator 4, 4A, 4B PDM circuit 5 Command value correction calculator 6, 6A, 6B Primary filter 7 ROM 7a Correction table ε _r Error ST Digital command value after correction

Claims (2)

[Claims] 1. A pulse density modulation type D / A conversion circuit which obtains an analog output value corresponding to the command value by performing pulse density modulation by a PDM circuit to which a digital command value is input, wherein the analog output value is a digital value. Error calculator for calculating an error generated between the detector detected as "1" and the digital command value which gives a 50% output by the detector due to the time difference between the rising and falling edges of the output pulse of the PDM circuit. And a command value correction calculator that calculates a new digital command value input to the PDM circuit by correcting the command value according to the range of the original digital command value using the error. A pulse density modulation type D / A conversion circuit. 2. A pulse density modulation type D / A conversion circuit which obtains an analog output value corresponding to the command value by performing a pulse density modulation by a PDM circuit to which a digital command value is input, and a rising edge of an output pulse of the PDM circuit. / Depending on the range of the original digital command value, the error that occurs between the detection value obtained by detecting the analog output value as a digital value and the digital command value that gives 50% output is used due to the time difference between the falling edges. A pulse density modulation type D / A conversion circuit comprising a correction table in which a new digital command value obtained by correcting the lever command value is stored as a command value input to the PDM circuit.