JPH05143186A - Information processor - Google Patents

Abstract

PURPOSE:To reduce the current consumption of a logical circuit block, i.e., the discharge current of a battery, in accordance with the voltage drop of the battery and to extend battery life. CONSTITUTION:Voltage impressed from the battery 14 is converted into voltage data by a voltage monitor 24 and the voltage data are sent to a CPU 26. The CPU 26 detects the reduced quantity of voltage supplied from the battery 14 from the voltage data and reduces the initial value of an initial value setting register in stages. When the initial value is reduced, the period of a carry signal outputted from a counter is changed, so that the frequency of a system clock outputted from a variable clock generating circuit 28 is reduced in stages and the current consumption of the logical circuit block is also gradually reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing device,
In particular, the present invention relates to an information processing device driven by a battery such as a small word processor such as a laptop or a palmtop, or a personal computer.

[0002]

2. Description of the Related Art In an information processing apparatus 1 shown in FIG. 4, a dry battery 2 is used as a power source, and in order to stabilize the supply voltage from the dry battery 2, a voltage boosted by a booster circuit 3 composed of, for example, a DC-DC converter. Is supplied to the logic circuit block 4. In addition, the voltage output from the booster circuit 3 is compared with the reference voltage 6 by the voltage comparator 5, and if the voltage from the booster circuit 3 becomes smaller than the reference voltage 6, a voltage drop signal is output to the CPU 7 and the data is output. After retracting the switch, the switch 8 is turned off.

[0003]

In general, the discharge characteristics of alkaline dry batteries are
As shown in FIG. 5, the voltage drops more slowly than the Ni-Cd battery. The final voltage in the figure indicates a value at which the battery becomes unusable when the final voltage is further reduced. However, FIG.
If the booster circuit 3 is used as in the information processing apparatus 1 of FIG. 5, even if an alkaline dry battery is used as the dry battery 2, the discharge characteristics thereof are similar to those of the Ni—Cd battery shown in FIG. That is, there is a problem that a sudden voltage drop occurs at a certain point in time, and the efficiency is about 80% due to the use of the booster circuit 3, causing a loss, which is not suitable for long-time operation.

Therefore, a main object of the present invention is to provide an information processing apparatus capable of extending the life of a battery serving as a power source.

[0005]

SUMMARY OF THE INVENTION The present invention provides a logic circuit block that operates according to a system clock, a battery that supplies a voltage to the logic circuit block, and a system clock whose frequency decreases as the voltage of the battery drops. The information processing apparatus includes a variable clock generation circuit that generates the clock.

[0006]

The variable clock generating circuit generates a system clock whose frequency is gradually reduced according to the detected voltage drop amount from the battery. As the frequency of the system clock decreases, the battery current consumption in the logic circuit block, which has a relationship approximately proportional to the frequency, also gradually decreases.

[0007]

According to the present invention, the consumption current of the logic circuit block, that is, the discharging current of the current can be gradually reduced according to the voltage drop of the battery, so that the life of the battery can be extended. The above-mentioned objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of the embodiments with reference to the drawings.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 1, an information processing apparatus 10 of this embodiment includes a battery block 12, and the battery block 12 is
It includes a battery 14 such as an alkaline battery. The battery 14 supplies voltage to the logic circuit block 22 through the power supply line 20 via the switch 18 which is included in the power supply block 16 and can be controlled by software, and also supplies the voltage to the voltage monitor 24. The voltage monitor 24 includes an AD converter, for example, and outputs voltage data digitally indicating the voltage of the battery 14 to the CPU 26. CPU26
Then, the load signal for setting the frequency based on the input voltage data is output to the variable clock generation circuit 28.

As shown in FIG. 2, the variable clock generation circuit 28 includes an initial value setting register 30 in which initial value data similarly output from the CPU 26 is set in response to a load signal from the CPU 26. The initial value data is input to the 5-bit counter 32, for example. The original clock is applied to the counter 32 from the crystal oscillator 34, and a carry signal is input to the clock input of the D-FF 36 each time the counter 32 counts up. This D
The -FF 36 is for shaping the carry signal as a system clock having a duty ratio of 50%.

The CPU 26 and the variable clock generation circuit 28 are connected via a system bus 38 to a display unit 40 for displaying an internal state and a peripheral control unit memory 42. It should be noted that in the information processing apparatus 10 of this embodiment, the frequency of the system clock output from the variable clock generation circuit 28 is gradually reduced as the voltage of the battery 14 is lowered by a command from the CPU 26, whereby the battery is reduced. That is, the discharge current of 14 is gradually reduced. The lower the system clock frequency, the smaller the current consumption in the logic circuit block 22 and the smaller the discharge current of the battery 14 for the following reason.

The power consumption of a CMOS-IC generally used to form the logic circuit block 22 is expressed by the equation (1).

[0012]

[Equation 1] P = α · F · V ² + β P: Power consumption F: Operating frequency V: Operating voltage α, β: Constant In addition, the current consumption of the CMOS-IC is obtained by dividing both sides of Equation 1 by the operating voltage V. As a result, the relationship shown in Expression 2 is obtained.

[0013]

[Equation 2] I∝F · V I: Current consumption As can be seen from Equation 2, the current consumption I is proportional to the operating frequency F and the operating voltage V. Therefore, to reduce the operating current I, the operating frequency F or The operating voltage V should be reduced. Therefore, in this embodiment, the power supply voltage, that is, the battery 14
By reducing the operating frequency F with the decrease in the voltage of, the current consumption I in the logic circuit block 22 is reduced. As is clear from FIG. 3, the smaller the consumption current I, that is, the discharge current, the longer the life of the battery (alkaline dry battery in this graph). Therefore, reducing the frequency of the system clock from the variable clock generating circuit 28 leads to reducing the discharge current of the battery 14, and as a result, the life of the battery 14 can be extended.

In the information processing apparatus 10 of the embodiment, the voltage supplied from the battery 14 is supplied to the logic circuit block 22 when the switch 18 is on, and
It is also supplied to the voltage monitor 24. The voltage monitor 24 sends the input voltage to the CPU 26 as voltage data. CPU
At 26, the amount of drop of the voltage supplied from the battery 14 is detected based on the input voltage data, and an initial value is set such that the voltage gradually decreases by, for example, 0.1V each time the voltage drops by 0.1V. Load into register 30. For example, the voltage supplied from the battery 14 is 6V-4
Since 20 steps are required to decrement the initial value by 1 each time the voltage V decreases by 0.1 V, the counter 32 is configured as a 5-bit 32-bit counter as described above. Then, when the initial value of the initial value setting register 30 is decreased by 1, the cycle of the carry signal output from the counter 32 is gradually increased accordingly, and therefore D-
The frequency of the system clock output from the FF 36 gradually decreases.

When the CPU 26 detects voltage data indicating that the voltage supplied from the battery 14 has reached 4V, it outputs a signal to the switch 18 to turn off the power, and the switch 18 is turned off. Needless to say, the relationship between the amount of change in the voltage supplied from the battery 14 and the amount of change in the initial value of the initial value setting register 30 can be set arbitrarily.

In the above embodiment, the voltage monitor 24
Although the variable clock generation circuit 28 is controlled by using the CPU and the CPU 26, instead of this method, a VF converter is used as the variable clock generation circuit 28, and the voltage supplied from the battery 14 is directly converted to the VF converter. You may make it input and output the system clock proportional to a voltage. Further, the battery 14 is not only a dry battery but also a Ni battery.
It may be composed of a secondary battery such as a -Cd battery or a Ni-H battery.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing in detail the variable clock generation circuit of the embodiment of FIG.

FIG. 3 is a graph showing discharge characteristics of an alkaline dry battery using discharge current as a parameter.

FIG. 4 is a block diagram showing a conventional technique.

FIG. 5 is a graph showing discharge characteristics of a dry battery and a Ni—Cd battery.

[Explanation of symbols]

 10 ... Information processing device 14 ... Battery 24 ... Voltage monitor 26 ... CPU 28 ... Variable clock generation circuit

Claims (1)

[Claims] 1. A logic circuit block that operates according to a system clock, a battery that supplies a power supply voltage to the logic circuit block, and a variable clock generator that generates a system clock whose frequency decreases according to the voltage drop of the battery. An information processing device including a circuit.