JPH0514093A - Resistance ladder type graphic equalizer - Google Patents

Resistance ladder type graphic equalizer

Info

Publication number
JPH0514093A
JPH0514093A JP16129191A JP16129191A JPH0514093A JP H0514093 A JPH0514093 A JP H0514093A JP 16129191 A JP16129191 A JP 16129191A JP 16129191 A JP16129191 A JP 16129191A JP H0514093 A JPH0514093 A JP H0514093A
Authority
JP
Japan
Prior art keywords
inverting input
resistance ladder
input terminal
resistance
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16129191A
Other languages
Japanese (ja)
Inventor
Tetsuya Murayama
哲也 村山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16129191A priority Critical patent/JPH0514093A/en
Publication of JPH0514093A publication Critical patent/JPH0514093A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize the resistance ladder type graphic equalizer in which shock noise caused at a change of a gain is reduced by the inexpensive method, deviation of the state at boosting and cutting is eliminated and increase in externally mounted components is prevented in the case of semiconductor circuit integration. CONSTITUTION:An analog switch 11 is inserted between termination of a resistance ladder section 7 and an inverting input terminal of a noninverting input amplifier 3 and each resistance ladder section 7 is turned on only in the moment when the section 7 is not in the connection state to the noninverting input amplifier 3 and switched to the connection state.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、グラフィックイコラ
イザに関し、特に半導体集積化が容易な抵抗ラダー式グ
ラフィックイコライザに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a graphic equalizer, and more particularly to a resistance ladder graphic equalizer which can be easily integrated into a semiconductor.

【0002】[0002]

【従来の技術】図3は従来の抵抗ラダー式グラフィック
イコライザを示す構成図である。同図において、1はオ
ーディオ信号入力端子、2はカット時(減衰時)に必要
な抵抗器、3は非反転入力端子が抵抗器2を介してオー
ディオ信号入力端子1に接続された非反転入力アンプ、
4は非反転入力アンプ3の出力側に接続されたオーディ
オ信号出力端子、5はオーディオ信号入力端子1とグラ
ンドとの間に設けられた非反転入力アンプ3用のバイア
ス抵抗器、6は非反転入力アンプ3の出力端子と反転入
力端子間に設けられたフィードバック抵抗器、7は複数
のブースト、カット利得設定用抵抗ラダー部であり、そ
れぞれ複数個の直列接続された抵抗器、および数個の抵
抗器に接続されたトランスミッションゲートからなる抵
抗値設定用スイッチからなり、これらの設定用スイッチ
のオンによって抵抗値が可変設定されるようになってい
る。さらに、8a,8bはトランスミッションゲートか
らなる接続手段としてのカット用及びブースト用アナロ
グスイッチであり、各抵抗ラダー部7それぞれに対し
て、一組のスイッチ8a,8bが設けられ、一端が非反
転入力アンプ3の非反転入力端子、反転入力端子にそれ
ぞれ接続され、ブースト時(増幅時)にいずれか1つ又
は2つ以上のスイッチ8bが選択されてオンし、カット
時にいずれか1つ又は2つ以上のスイッチ8aが選択さ
れてオンする。また、9は各抵抗ラダー部7の終端にそ
れぞれ接続された、半導体インダクタを使用した共振回
路部、10は各抵抗ラダー部7の終端とグランドとの間
に設けられ、スイッチ8a,8bの切換え動作時に発生
するショックノイズを抑えるための高抵抗(例えば1M
Ω程度)のショックノイズ防止用抵抗器である。
2. Description of the Related Art FIG. 3 is a block diagram showing a conventional resistance ladder type graphic equalizer. In the figure, 1 is an audio signal input terminal, 2 is a resistor required at the time of cutting (at the time of attenuation), 3 is a non-inverting input terminal whose non-inverting input terminal is connected to the audio signal input terminal 1 via the resistor 2. Amplifier,
4 is an audio signal output terminal connected to the output side of the non-inverting input amplifier 3, 5 is a bias resistor for the non-inverting input amplifier 3 provided between the audio signal input terminal 1 and the ground, and 6 is non-inverting A feedback resistor provided between the output terminal and the inverting input terminal of the input amplifier 3 is a plurality of boost and cut gain setting resistor ladder sections, each of which is a plurality of series-connected resistors and several resistors. The resistance value setting switch includes a transmission gate connected to a resistor, and the resistance value is variably set by turning on these setting switches. Further, 8a and 8b are cut and boost analog switches as a connecting means composed of a transmission gate. A pair of switches 8a and 8b are provided for each resistance ladder section 7, and one end is a non-inverting input. It is connected to the non-inverting input terminal and the inverting input terminal of the amplifier 3, respectively, and any one or two or more switches 8b are selected and turned on at the time of boosting (amplifying), and any one or two at the time of cutting. The above switch 8a is selected and turned on. Further, 9 is a resonance circuit section using a semiconductor inductor, which is connected to the end of each resistance ladder section 7, and 10 is provided between the end of each resistance ladder section 7 and the ground, and switches between the switches 8a and 8b. High resistance (eg 1M) to suppress shock noise generated during operation
It is a resistor for shock noise prevention of about Ω).

【0003】次に動作について説明する。ブースト時に
は、各ブースト用スイッチ8bのうちいずれかのスイッ
チ8bがオンされ、オンされたスイッチ8bを介し抵抗
ラダー部7が非反転アンプ3の反転入力端子に接続され
接続された抵抗ラダー部7の抵抗値とこの抵抗ラダー部
7に接続されている共振回路部9のインダクタンス、容
量とによる共振インピーダンスによって、ブースト時の
非反転入力アンプ3の利得及び周波数帯域が決定され
る。一方、カット時には、各カット用スイッチ8aのう
ちいずれかのスイッチ8aがオンされ、オンされたスイ
ッチ8aを介し抵抗ラダー部7が非反転入力アンプ3の
非反転入力端子に接続され、接続された抵抗ラダー部7
の抵抗値とこの抵抗ラダー部7に接続されている共振回
路部9のインダクタンス、容量とによる直列共振インピ
ーダンスによって、カット時の非反転入力アンプ3の利
得及び周波数帯域が決定される。このように、スイッチ
8a,8bの組合せによってオーディオ信号入力端子1
より入力されたオーディオ信号に、ある特定の周波数特
性をもたせることが可能となる。ところで、スイッチ8
a,8bをオンさせる場合、抵抗ラダー部7の電位がフ
ロート電位であるため、非反転入力アンプ3の電位がス
イッチ8a,8bのオンによって瞬間的にフロート電位
に引っ張られ、これによってオーディオ信号出力端子4
に大きなショックノイズが発生する。このショックノイ
ズを抑えるために、1MΩ程度の高い抵抗値の抵抗器1
0を抵抗ラダー部7の終端とグランドとの間に挿入し、
抵抗ラダー部7の電位とアンプ3の非反転入力端子の電
位との差を低減し、スイッチ8a,8bのオン時のショ
ックノイズを低減している。
Next, the operation will be described. At the time of boosting, one of the boost switches 8b is turned on, and the resistor ladder unit 7 is connected to the inverting input terminal of the non-inverting amplifier 3 via the turned-on switch 8b. The gain and frequency band of the non-inverting input amplifier 3 at the time of boosting are determined by the resonance impedance of the resistance value and the inductance and capacitance of the resonance circuit unit 9 connected to the resistance ladder unit 7. On the other hand, at the time of cutting, one of the switches 8a for cutting is turned on, and the resistance ladder unit 7 is connected to and connected to the non-inverting input terminal of the non-inverting input amplifier 3 via the turned-on switch 8a. Resistance ladder section 7
The gain and frequency band of the non-inverting input amplifier 3 at the time of cutting are determined by the series resonance impedance due to the resistance value of 1 and the inductance and capacitance of the resonance circuit unit 9 connected to the resistance ladder unit 7. In this way, the audio signal input terminal 1 is formed by the combination of the switches 8a and 8b.
It becomes possible to give the input audio signal a certain specific frequency characteristic. By the way, switch 8
When a and 8b are turned on, since the potential of the resistance ladder unit 7 is a float potential, the potential of the non-inverting input amplifier 3 is instantaneously pulled to the float potential by turning on the switches 8a and 8b, thereby outputting the audio signal. Terminal 4
A big shock noise occurs. In order to suppress this shock noise, a resistor 1 with a high resistance value of about 1 MΩ
0 is inserted between the end of the resistance ladder 7 and the ground,
The difference between the potential of the resistance ladder unit 7 and the potential of the non-inverting input terminal of the amplifier 3 is reduced, and the shock noise when the switches 8a and 8b are turned on is reduced.

【0004】[0004]

【発明が解決しようとする課題】従来の抵抗ラダー式グ
ラフィックイコライザは以上のように構成され、抵抗ラ
ダー部7の終端とグランドとの間に抵抗器10が常時接
続されているため、ブースト、カット時の利得が微妙に
ずれるという問題点があった。また、これらの抵抗器1
0は抵抗値が1MΩと大きく、この種のグラフィックイ
コライザを集積化する場合に、抵抗器10を一緒に集積
化するとチップが増大することになり、コストもかさむ
ことから、従来抵抗器10は集積化せずに、カーボン抵
抗器などを外付けしているため外付け部品が多くなると
いう問題点があった。
The conventional resistance ladder type graphic equalizer is constructed as described above, and since the resistor 10 is always connected between the end of the resistance ladder section 7 and the ground, boosting and cutting are performed. There was a problem that the time gain deviated slightly. Also, these resistors 1
The resistance value of 0 is as large as 1 MΩ, and when the graphic equalizer of this kind is integrated, if the resistors 10 are integrated together, the number of chips will increase and the cost will increase. However, there is a problem in that the number of external parts increases because the carbon resistors are externally attached without changing.

【0005】この発明は上記のような問題点を解決する
ためになされたもので、半導体集積化する場合に、コス
トアップを極力抑えてブースト、カットの切換え時に発
生するショックノイズを低減すると共にブースト時、カ
ット時の利得の微妙なずれを抑制できる抵抗ラダー式グ
ラフィックイコライザを得ることを目的とする。
The present invention has been made in order to solve the above-mentioned problems, and in the case of semiconductor integration, the cost increase is suppressed as much as possible and the shock noise generated at the time of switching between boost and cut is reduced and boosted. At the same time, it is an object to obtain a resistance ladder type graphic equalizer capable of suppressing a slight deviation of the gain at the time of cutting.

【0006】[0006]

【課題を解決するための手段】この発明に係る抵抗ラダ
ー式グラフィックイコライザは、非反転入力端子が信号
入力端子に接続された非反転入力アンプと、抵抗値が可
変設定自在の複数の抵抗ラダー部と、該各抵抗ラダー部
の始端を上記非反転入力アンプの反転入力端子又は非反
転入力端子のいずれかに選択的に接続する接続手段と、
上記各抵抗ラダー部の終端にそれぞれ接続された共振回
路部と、上記各抵抗ラダー部の終端と上記非反転入力ア
ンプの反転入力端子との間に接続され、上記各抵抗ラダ
ー部が上記接続手段により非接続状態から接続状態に切
り換わる過渡期間だけオンし、上記各抵抗ラダー部の電
位をそれぞれ上記非反転入力アンプの反転入力端子の電
位と同電位に保持するスイッチとを備えたものである。
A resistance ladder type graphic equalizer according to the present invention comprises a non-inverting input amplifier having a non-inverting input terminal connected to a signal input terminal, and a plurality of resistance ladder sections whose resistance values can be variably set. And connecting means for selectively connecting the starting end of each resistance ladder portion to either the inverting input terminal or the non-inverting input terminal of the non-inverting input amplifier,
Resonant circuit sections respectively connected to the ends of the resistance ladder sections, connected between the ends of the resistance ladder sections and the inverting input terminal of the non-inverting input amplifier, and the resistance ladder sections being the connecting means. It is provided with a switch that is turned on only during a transition period in which the non-connection state is switched to the connection state by the above, and holds the potential of each of the resistance ladder units at the same potential as the potential of the inverting input terminal of the non-inverting input amplifier. .

【0007】[0007]

【作用】この発明においては、各抵抗ラダー部の終端と
非反転入力アンプの反転入力端子との間に夫々ショック
ノイズ防止用スイッチを接続し、このスイッチを各抵抗
ラダー部が非接続状態から接続状態に切り換わる過渡期
間だけオンさせる。これにより、上記過渡期間には抵抗
ラダー部の電位と非反転入力アンプの反転入力端子の電
位が同電位に保持されるので、急激な電位の変化が発生
せず、ショックノイズが大幅に抑制されると共にブース
ト時、カット時の利得のずれも抑制される。また、従来
のような高抵抗の外付け抵抗器も不要となる。
According to the present invention, a shock noise preventing switch is connected between the end of each resistance ladder section and the inverting input terminal of the non-inverting input amplifier, and this switch is connected from the non-connection state of each resistance ladder section. It is turned on only during the transition period when it switches to the state. As a result, the potential of the resistance ladder section and the potential of the inverting input terminal of the non-inverting input amplifier are held at the same potential during the transition period, so that no sudden potential change occurs and shock noise is greatly suppressed. In addition, the gain deviation during boosting and cutting is suppressed. Further, it is not necessary to use a high resistance external resistor as in the conventional case.

【0008】[0008]

【実施例】実施例1. 以下、この発明の一実施例を図について説明する。図1
はこの発明の一実施例を示す構成図である。同図におい
て、図3と対応する部分には同一符号を付し、その説明
を省略する。本実施例では非反転入力アンプ3の非反転
入力端子と各抵抗ラダー部7の終端との間にノイズ防止
用アナログスイッチ11を接続する。そして、このアナ
ログスイッチ11を、各抵抗ラダー部7が接続手段とし
てのスイッチ8a,8bにより非反転入力アンプ3の非
反転入力端子、反転入力端子に夫々接続される前後の過
渡期間すなわち各抵抗ラダー部7がスイッチ8a,8b
により非接続状態から接続状態に切り換わる瞬間だけオ
ンさせ、非反転入力アンプ3の非反転入力端子の電位と
各抵抗ラダー部7の終端の電位を同電位に保持するよう
にする。このアナログスイッチ11としてはドレインー
ソース間の距離が長くて、幅の小さいものを使用するこ
とが好ましい。
EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. Figure 1
FIG. 1 is a configuration diagram showing an embodiment of the present invention. In the figure, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and description thereof will be omitted. In this embodiment, a noise prevention analog switch 11 is connected between the non-inverting input terminal of the non-inverting input amplifier 3 and the end of each resistance ladder section 7. Then, the analog switch 11 is connected to the non-inverting input terminal and the inverting input terminal of the non-inverting input amplifier 3 by the switches 8a and 8b serving as connecting means, respectively. The part 7 has switches 8a and 8b.
Thus, the switch is turned on only at the moment of switching from the non-connected state to the connected state, and the potential of the non-inverting input terminal of the non-inverting input amplifier 3 and the potential of the terminal end of each resistance ladder unit 7 are held at the same potential. As the analog switch 11, it is preferable to use a switch having a long drain-source distance and a small width.

【0009】次に動作について図2を参照して説明す
る。スイッチ8a,8bがオフしている状態では、アナ
ログスイッチ11をオンさせることにより、抵抗ラダー
部7の(終端)の電位はアナログスイッチ11のオン抵
抗(〜数百KΩ)を介して非反転入力アンプ3の反転入
力端子の電位すなわち入力信号電位と同電位となる。次
に、図2(a)に示すようにスイッチ8a,8bがオフ
状態よりオン状態になる瞬間、アナログスイッチ11を
図2(b)に示すようにオン状態に保持したままとな
し、そしてスイッチ8a,8bが完全にオンしたのち
に、図2(b)に示すようにアナログスイッチ11をオ
フする。これにより、スイッチ8a,8bをオンさせて
も、抵抗ラダー部7の終端すなわち始端の電位はアナロ
グスイッチ11の作用により入力信号電位と同電位とな
るので、急激な電位の変化が発生せず、オーディオ信号
出力端子4に発生するショックノイズを低減することが
できる。特にスイッチ8bがオンする場合、回路はブー
スト状態であるので発生したショックノイズは非反転入
力アンプ3で増幅されて図3の従来例では特に大きなシ
ョックノイズとなってオーディオ信号出力端子4にあら
われていたが、本実施例ではスイッチ8bがオンする以
前に抵抗ラダー部7の電位と非反転入力アンプ3の反転
入力端子の電位がアナログスイッチ11により同電位と
なっているので、ブースト時に発生するショックノイズ
を従来例に比べ大幅に低減することが可能となる。ま
た、スイッチ8a,8bが完全にオンされた状態の後
に、アナログスイッチ11をオフすることで、抵抗ラダ
ー部7に余分の抵抗成分が付加されず、ブースト時、カ
ット時の利得のずれをなくすことが可能となる。
Next, the operation will be described with reference to FIG. When the switches 8a and 8b are off, the analog switch 11 is turned on so that the potential at the (termination) of the resistance ladder unit 7 is non-inverted input via the on resistance (up to several hundred KΩ) of the analog switch 11. The potential of the inverting input terminal of the amplifier 3 is the same as the potential of the input signal. Next, as shown in FIG. 2 (a), at the moment when the switches 8a and 8b change from the off state to the on state, the analog switch 11 remains held in the on state as shown in FIG. 2 (b), and the switches After 8a and 8b are completely turned on, the analog switch 11 is turned off as shown in FIG. 2 (b). As a result, even if the switches 8a and 8b are turned on, the potential at the terminal end, that is, the starting end of the resistance ladder unit 7 becomes the same potential as the input signal potential due to the action of the analog switch 11, so that no abrupt potential change occurs. Shock noise generated at the audio signal output terminal 4 can be reduced. In particular, when the switch 8b is turned on, the shock noise generated because the circuit is in the boost state is amplified by the non-inverting input amplifier 3 and becomes a particularly large shock noise in the audio signal output terminal 4 in the conventional example of FIG. However, in this embodiment, since the potential of the resistance ladder unit 7 and the potential of the inverting input terminal of the non-inverting input amplifier 3 are made the same potential by the analog switch 11 before the switch 8b is turned on, the shock generated during boosting It is possible to significantly reduce noise as compared with the conventional example. In addition, by turning off the analog switch 11 after the switches 8a and 8b are completely turned on, an extra resistance component is not added to the resistance ladder unit 7, and the gain deviation at the time of boosting and cutting is eliminated. It becomes possible.

【0010】[0010]

【発明の効果】以上のように、この発明によれば、非反
転入力端子が信号入力端子に接続された非反転入力アン
プと、抵抗値が可変設定自在の複数の抵抗ラダー部と、
該各抵抗ラダー部の始端を上記非反転入力アンプの反転
入力端子又は非反転入力端子のいずれかに選択的に接続
する接続手段と、上記各抵抗ラダー部の終端にそれぞれ
接続された共振回路部と、上記各抵抗ラダー部の終端と
上記非反転入力アンプの反転入力端子との間に接続さ
れ、上記各抵抗ラダー部が上記接続手段により非接続状
態から接続状態に切り換わる過渡期間だけオンし、上記
各抵抗ラダー部の電位をそれぞれ上記非反転入力アンプ
の反転入力端子の電位と同電位に保持するスイッチとを
備えたので、半導体集積化する場合に、コストアップを
極力抑えてブースト,カットの切換え時に発生するショ
ックノイズを安価な方法で低減させることができると共
にブースト時,カット時の利得のずれをなくすることが
でき、しかも外付け部品が多くなるのを防止できるとい
う効果がある。
As described above, according to the present invention, a non-inverting input amplifier whose non-inverting input terminal is connected to a signal input terminal, and a plurality of resistance ladder sections whose resistance values can be set variably,
Connecting means for selectively connecting the starting end of each resistance ladder section to either the inverting input terminal or the non-inverting input terminal of the non-inverting input amplifier, and the resonance circuit section respectively connected to the terminal ends of the resistance ladder sections. Is connected between the end of each of the resistance ladder sections and the inverting input terminal of the non-inverting input amplifier, and is turned on only during a transitional period when the resistance ladder sections are switched from the non-connection state to the connection state by the connection means. , And a switch for holding the potential of each of the resistance ladder sections at the same potential as the potential of the inverting input terminal of the non-inverting input amplifier, so boosting and cutting can be performed while minimizing the cost increase in the case of semiconductor integration. It is possible to reduce the shock noise generated at the time of switching by an inexpensive method, eliminate the gain deviation at the time of boosting and cutting, and also to attach externally. There is an effect that it is possible to prevent the goods from becoming many.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明による抵抗ラダー式グラフィックイコ
ライザの一実施例を示す構成図である。
FIG. 1 is a configuration diagram showing an embodiment of a resistance ladder type graphic equalizer according to the present invention.

【図2】図1の動作説明に供するためのタイミング図で
ある。
FIG. 2 is a timing diagram for explaining the operation of FIG.

【図3】従来の抵抗ラダー式グラフィックイコライザを
示す構成図である。
FIG. 3 is a configuration diagram showing a conventional resistance ladder graphic equalizer.

【符号の説明】[Explanation of symbols]

3 非反転入力アンプ 7 抵抗ラダー部 8(a) カット用アナログスイッチ 8(b) ブースト用アナログスイッチ 9 共振回路部 11 ショックノイズ防止用アナログスイッチ 3 Non-inverting input amplifier 7 Resistor ladder section 8 (a) Cut analog switch 8 (b) Boost analog switch 9 Resonance circuit section 11 Shock noise prevention analog switch

Claims (1)

【特許請求の範囲】 【請求項1】 非反転入力端子が信号入力端子に接続さ
れた非反転入力アンプと、 抵抗値が可変設定自在の複数の抵抗ラダー部と、 該各抵抗ラダー部の始端を上記非反転入力アンプの反転
入力端子又は非反転入力端子のいずれかに選択的に接続
する接続手段と、 上記各抵抗ラダー部の終端にそれぞれ接続された共振回
路部と、 上記各抵抗ラダー部の終端と上記非反転入力アンプの反
転入力端子との間に接続され、上記各抵抗ラダー部が上
記接続手段により非接続状態から接続状態に切り換わる
過渡期間だけオンし、上記各抵抗ラダー部の電位をそれ
ぞれ上記非反転入力アンプの反転入力端子の電位と同電
位に保持するスイッチと を備えたことを特徴とする抵抗ラダー式グラフィックイ
コライザ。
Claims: 1. A non-inverting input amplifier, a non-inverting input terminal of which is connected to a signal input terminal, a plurality of resistance ladder sections whose resistance values can be variably set, and a starting end of each resistance ladder section. To a non-inverting input terminal or a non-inverting input terminal of the non-inverting input amplifier, a resonance circuit section connected to the end of each resistance ladder section, and each resistance ladder section. Connected between the terminating end of the non-inverting input amplifier and the inverting input terminal of the non-inverting input amplifier, and is turned on only during a transient period in which each of the resistance ladder sections is switched from the non-connection state to the connection state by the connecting means. A resistor ladder type graphic equalizer, characterized in that it comprises a switch for holding each potential at the same potential as that of the inverting input terminal of the non-inverting input amplifier.
JP16129191A 1991-07-02 1991-07-02 Resistance ladder type graphic equalizer Pending JPH0514093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16129191A JPH0514093A (en) 1991-07-02 1991-07-02 Resistance ladder type graphic equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16129191A JPH0514093A (en) 1991-07-02 1991-07-02 Resistance ladder type graphic equalizer

Publications (1)

Publication Number Publication Date
JPH0514093A true JPH0514093A (en) 1993-01-22

Family

ID=15732321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16129191A Pending JPH0514093A (en) 1991-07-02 1991-07-02 Resistance ladder type graphic equalizer

Country Status (1)

Country Link
JP (1) JPH0514093A (en)

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