JPH05136686A - Substrate voltage generating circuit - Google Patents

Abstract

PURPOSE:To prevent a negative voltage of a substrate from being too small even when a large current flows suddenly to the substrate. CONSTITUTION:The subject circuit is provided with a substrate voltage generating section 20 to output a negative voltage as a voltage VBB to be given to a substrate and a substrate voltage detection section 10 to control the operation of the substrate voltage generating section 20 in response to a change in the substrate voltage. The substrate voltage generating section 20 has 1st and 2nd voltage generating circuits 22, 23 outputting a different negative voltage. The substrate voltage detection section 10 has a 1st voltage detection circuit 11 using -3V as its set voltage and a 2nd voltage detection circuit 12 using -2V as its set voltage. When the substrate voltage VBB decreases and is lower than -3V, the 2nd voltage generating circuit 23 to output a small negative voltage is selected and when the substrate voltage VBB rises and is smaller than -2V, the 1st voltage generating circuit 22 to output a larger negative voltage is selected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate voltage generating circuit for applying a negative voltage to a substrate so that a semiconductor device on the substrate operates stably.

[0002]

2. Description of the Related Art Recently, a semiconductor device having various elements formed on a semiconductor substrate has been increasingly used. The voltage applied to the substrate of the semiconductor device is an important factor that determines various characteristics of the entire semiconductor device. For example, it affects the threshold value of the N-channel MOS transistor on the substrate and other transistor characteristics. In addition,
In the random access memory, the data retention time of the memory cell on the substrate is also greatly affected.

First, a conventional substrate voltage generating circuit for applying a negative voltage to a semiconductor substrate will be described with reference to FIGS.

FIG. 12 is a circuit diagram showing a conventional example of a substrate voltage generating circuit. In the figure, VCC is the power supply voltage, VSS
Is the ground voltage, VBB is the substrate voltage, Qp101 to Qp224 are P channel type MOS transistors, Qn101 to Qn212 are N channel type MOS transistors, N101 to N222 are node names,
BBE is a control signal, and C221 and C222 are capacitors.

This substrate voltage generation circuit is formed on the same substrate as various semiconductor elements whose operation is to be guaranteed, and is roughly divided into two parts, a substrate voltage detection part 10 and a substrate voltage generation part 20. Consists of parts. Of these, the substrate voltage detection unit 10 includes a first voltage detection circuit 11 having a detection setting voltage of -3V and a second voltage detection circuit 12 having a detection voltage of -2V. The substrate voltage generator 20 includes an oscillator circuit 21 and a voltage generator circuit 22.

FIG. 14 is a waveform diagram of the substrate voltage VBB and the signal at each node of the conventional substrate voltage generating circuit having the above structure. The operation of the conventional substrate voltage generating circuit will be described with reference to FIG. However, the first voltage detection circuit 11 outputs when the substrate voltage VBB becomes deeper (lower) than -3V, the output node N111 becomes the logical voltage "L", and when the negative substrate voltage VBB becomes shallower (higher) than -3V. Node N
111 becomes the logic voltage "H". Similarly, in the second voltage detection circuit 12, when the substrate voltage VBB becomes deeper (lower) than -2V, the output node N121 becomes the logical voltage "L", and when the negative substrate voltage VBB becomes shallower (higher) than -2V. The output node N121 becomes the logic voltage "H".

Now, as shown in FIG. 14, the substrate voltage VBB
Is lower than 0V which is equal to the ground voltage VSS, and is (higher) than -2V (period), the substrate voltage detection unit 10 outputs the output nodes N111 of the first and second voltage detection circuits 11 and 12. N121 is a logic voltage "H", and the P-channel MOS transistor Qp101 having the gate connected to the output node N111 of the first voltage detection circuit 11 is connected.
Is off, and the output node N121 of the second voltage detection circuit 12 is connected to the gate of an N-channel MOS transistor Q.
n101 turns on. Therefore, the node N101 at the connection point between the two MOS transistors Qp101 and Qn101 has the logic voltage "L", and the output node N102 of the substrate voltage detection unit 10 has the logic voltage "H". Next, when the substrate voltage VBB further decreases and falls within the range of −2V to −3V (period), the output node N121 of the second voltage detection circuit 12 changes from the logic voltage “H” to the logic voltage “L”, The N-channel MOS transistor Qn101 having the output node N121 connected to the gate turns off, but the output node N102 of the substrate voltage detection unit 10 is turned off.
Holds the logic voltage "H". When the substrate voltage VBB further drops and becomes deeper (lower) than -3V (period), the output node N111 of the first voltage detection circuit 11 has the logic voltage "H".
Becomes a logical voltage "L", and the output node N111 is connected to the gate of a P-channel type MOS transistor Qp101.
Is turned on, the P-channel MOS transistor Q
The node N101 at the connection point between the p101 and the N-channel type MOS transistor Qn101 which has already been turned off has the logic voltage "H", and the output node N102 of the substrate voltage detection unit 10 has the logic voltage "L".

Next, the substrate voltage VBB starts to rise and becomes -3V.
Even if it is shallower (higher), deeper (lower) than -2 V (period), the output node N of the first voltage detection circuit 11
111 changes from the logic voltage "L" to the logic voltage "H", and the P-channel type MON whose output node N111 is connected to the gate.
Although the S transistor Qp101 turns off, the output node N102 of the substrate voltage detection unit 10 holds the logic voltage "L". Finally, when the substrate voltage VBB further rises and becomes shallower (higher) than -2V (period), the second voltage detection circuit 12
Of the output node N121 changes from the logic voltage "L" to the logic voltage "H", the N-channel type MOS transistor Qn101 whose output node N121 is connected to the gate is turned on, and the N-channel type MOS transistor Qn101 is already turned off. The node N101 at the connection point with the existing P-channel type MOS transistor Qp101 becomes the logic voltage "L", and the output node N102 of the substrate voltage detection unit 10 returns to the logic voltage "H".

As described above, the substrate voltage detecting unit 10 changes the logic voltage of the output node N102 in a form having hysteresis according to the change of the substrate voltage.

On the other hand, the oscillator circuit 2 in the substrate voltage generator 20
1 operates when the control signal BBE is at the logic voltage "H" and outputs a pulse signal having a constant frequency from the output node N211. The control signal BBE is always held at the logic voltage "H" during the operation of the semiconductor device to which the substrate voltage generating circuit is applied. Output node N211 of oscillator circuit 21
Is connected to the first input node N221 of the input NAND gate of the voltage generating circuit 22, and the output node N102 of the substrate voltage detecting unit 10 is connected to the second input node N222 of the same input NAND gate. As a result, the voltage generation circuit 2
2 outputs a negative voltage as a voltage to be applied to the substrate, that is, the substrate voltage VBB when the output node N102 of the substrate voltage detection unit 10 is the logical voltage "H", while the output node N102 outputs the logical voltage "L". In the case of ", the output function of the substrate voltage is stopped.

FIG. 13 is a relational diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristics of the substrate voltage generating circuit described above. L1 in the figure is a relational line between the positive power supply voltage VCC and the negative substrate voltage VBB, assuming that the voltage generating circuit 22 is always operating. As described above, the voltage generation circuit 22 is actually the output node N10 of the substrate voltage detection unit 10.
When the substrate voltage VBB changes in the direction of becoming deeper (lower) under the control of the logic voltage of 2, the operation is stopped when the voltage becomes deeper (lower) than -3V, and the substrate voltage VBB becomes shallower (higher). If the voltage becomes shallower (higher) than -2V in the case of the change to the direction, it is restarted and works to deepen (lower) the substrate voltage VBB. Therefore, the change of the actual substrate voltage VBB is limited as shown by the solid line and hatching in FIG. That is, when the power supply voltage Vcc is 3.7 V or more, the actual substrate voltage VBB is -2V to -3V.
It becomes the voltage value between.

[0012]

In the above conventional substrate voltage generating circuit, the negative substrate voltage VBB is deeper (lower) than -3V.
When this happens, the structure in which the function of the voltage generation circuit 22 is stopped through the control by the substrate voltage detection unit 10 is adopted, so there was the following problem in dynamic characteristics.

That is, when a large current suddenly flows through the substrate for some reason while the function of the voltage generating circuit 22 is stopped, the substrate voltage detecting unit 10 cannot restart the voltage generating circuit 22 in time. That is, the voltage of the substrate becomes too shallow (high). For example, when the substrate voltage VBB rises to near 0V, the substrate voltage generation circuit itself cannot operate, or even if it operates, the negative voltage applied to the substrate is too shallow (too high) on the substrate. The threshold value of the N-channel MOS transistor becomes small, the substrate current consumed by the entire semiconductor device increases, and the voltage generating circuit 22 cannot supply such a substrate current. Therefore, the substrate voltage VBB cannot be made deeper (lower) again, and normal stable operation of the entire semiconductor device cannot be guaranteed.

An object of the present invention is to improve the dynamic characteristics of the substrate voltage generation circuit so that the substrate voltage does not become too shallow (high) even if a large current suddenly flows through the substrate.

[0015]

In order to achieve the above object, the present invention provides a plurality of voltage generating circuits for outputting negative voltages different from each other, and the plurality of voltage generating circuits are provided according to a voltage change of a substrate. It employs a configuration for operating any one of the voltage generating circuits of.

Specifically, the invention of claim 1 is as follows.
As shown in FIG. 1 or FIG. 7, a substrate voltage for outputting a negative voltage as a voltage VBB to be applied to the substrate in order to apply a negative voltage to the substrate so that the semiconductor device on the substrate operates stably. In a substrate voltage generation circuit including a generation unit 20 and a substrate voltage detection unit 10 for controlling the operation of the substrate voltage generation unit 20 according to a change in the substrate voltage, the substrate voltage generation units 20 are the same. Negative voltage (for example, the straight line L in FIG.
1 and L2, a plurality of voltage generating circuits 22 and 23 for outputting a substrate voltage VBB) are provided, and the substrate voltage detecting unit 10 generates the plurality of voltage according to the change of the voltage of the substrate. It has a function of selecting one of the circuits 22 and 23 and outputting a negative voltage as the voltage VBB to be applied to the substrate to the selected voltage generating circuit.

Further, as shown in FIGS. 1 to 3, the invention of claim 2 is the same as the invention of claim 1, wherein the substrate voltage generator 20 is represented by a negative voltage (for example, represented by a straight line L1 in FIG. 2). The first voltage generating circuit 22 for outputting the substrate voltage VBB) and the negative voltage shallower than the negative voltage output by the first voltage generating circuit 22 for the same positive power supply voltage VCC (for example, in FIG. 2). And a second voltage generating circuit 23 for outputting the substrate voltage VBB represented by the straight line L2 of the substrate voltage detecting circuit 10, and the substrate voltage detecting unit 10 detects that the substrate voltage is the first negative set voltage (for example,-). 3V), a first voltage detection circuit 11 for detecting whether or not a deep negative voltage has been reached, and a second negative set voltage shallower than the first negative set voltage of the first voltage detection circuit 11. The voltage of the substrate becomes a shallower negative voltage than (for example, -2V). Second for detecting whether or not
The voltage detection circuit 12 of FIG. Moreover, the first voltage detection circuit 11 detects that the negative voltage of the substrate has become a deeper negative voltage than the first negative set voltage when the negative voltage of the substrate changes in a deeper direction. In that case, the function of the first voltage generating circuit 22 is stopped and the negative voltage as the voltage VBB to be applied to the substrate is output to the second voltage generating circuit 23. Further, the second voltage detection circuit 12 detects that the negative voltage of the substrate becomes a shallow negative voltage as compared with the second negative set voltage when the negative voltage of the substrate changes in a direction of becoming shallow. In this case, the function of the second voltage generating circuit 23 is stopped and the function of causing the first voltage generating circuit 22 to output a negative voltage as the voltage VBB to be applied to the substrate. is there.

Further, as shown in FIG. 4, the invention of claim 3 is the same as the invention of claim 2, wherein the first voltage generating circuit 22 outputs the substrate voltage VBB represented by, for example, a straight line L1. Then, the second voltage generating circuit 23 outputs a negative voltage that matches the first negative setting voltage (for example, -3V) of the first voltage detecting circuit 11 of the first voltage generating circuit 22. At the same positive power supply voltage as the positive power supply voltage Vcc (for example, 3.7 V) at the time, the second voltage detection circuit 12
The second negative set voltage (eg, -2 V) deeper than the second negative set voltage (eg, substrate voltage VBB represented by the straight line L2) is output.

Further, in the invention of claim 4 according to the invention of claim 1, the substrate voltage generating section 20 is provided with a voltage generating circuit for each of the plurality of voltage generating circuits 22 and 23, as shown in FIGS. 5 and 6. This configuration adopts a configuration further including an oscillation circuit 21 that outputs a variable frequency pulse signal for changing the current driving capability. Moreover, the oscillating circuit 21 includes the plurality of voltage generating circuits 22, 2 by the substrate voltage detecting unit 10.
When a voltage generating circuit (for example, the second voltage generating circuit 23) for outputting a shallow negative voltage of 3 is selected, the pulse is generated so as to enhance the current driving capability of the selected voltage generating circuit 23. If another voltage generating circuit (for example, the first voltage generating circuit 22) for increasing the frequency of the signal and outputting a negative voltage deeper than the voltage generating circuit 23 is selected, the selected voltage generating circuit is selected. It has a function of lowering the frequency of the pulse signal so as to reduce the current drive capability of the other voltage generating circuit 22.

Further, as shown in FIGS. 7 to 9, the invention of claim 5 is the invention of claim 2, wherein the substrate voltage generator 20 outputs a negative voltage ( For example, the substrate voltage VBB represented by the straight line L2 in FIG. 8)
The third voltage generating circuit 24 for outputting a shallow negative voltage (for example, the substrate voltage VBB represented by the straight line L3 in FIG. 8) with respect to the same positive power supply voltage VCC as compared with Is a deeper negative voltage than the third negative set voltage (eg, −3.5V) in which the voltage of the substrate is deeper than the first negative set voltage (eg, −3V) of the first voltage detection circuit 11. In this configuration, a third voltage detection circuit 13 for detecting whether or not the voltage has been exceeded is further provided. Moreover, the third voltage detection circuit 13 detects that the negative voltage of the substrate has become a deeper negative voltage than the third negative set voltage when the negative voltage of the substrate changes in a deeper direction. In such a case, the function of the second voltage generating circuit 23 is stopped, a negative voltage as the voltage VBB to be applied to the substrate is output to the third voltage generating circuit 24, and the negative voltage of the substrate is When it is detected that the voltage has become a shallow negative voltage as compared with the third negative set voltage when the voltage changes to become shallow, the third voltage generating circuit 2
Voltage VBB to stop the function of 4 and apply to the substrate
It has a function of causing the second voltage generating circuit 23 to output a negative voltage as.

Further, the invention of claim 6 is the same as the invention of claim 1, wherein the substrate voltage detecting section 10 is provided with a structure shown in FIGS.
As shown in FIG. 1, when a specific control signal LT is given, a specific voltage generation circuit (for example, a circuit shown in FIG. 1) among the plurality of voltage generation circuits 22 and 23 is irrespective of the magnitude of the voltage of the substrate. Substrate voltage V represented by straight line L1 in 11
The first voltage generating circuit 22) that outputs BB is selected, and a configuration having a function of causing the selected voltage generating circuit 22 to output a negative voltage as the voltage VBB to be applied to the substrate is adopted.

[0022]

According to the first aspect of the present invention, one of the plurality of voltage generating circuits 22 and 23 is selected by the substrate voltage detecting section 10 in accordance with the voltage change of the substrate, and the selected voltage generating circuit is generated. The circuit outputs a negative voltage as the voltage VBB to be applied to the substrate, and the plurality of voltage generating circuits 2
One of 2,23 is always working. Therefore, even if a large current suddenly flows through the substrate for some reason, the voltage generation circuit operating at that time responds to the change in the substrate current, and the substrate voltage becomes too shallow (high). Never.

According to the second aspect of the invention, when the negative voltage of the substrate changes in the direction of deepening, the voltage becomes a deeper negative voltage than the first negative set voltage (for example, -3V). When the first voltage detection circuit 11 detects that the negative voltage is reached, a deep negative voltage (for example, the substrate voltage V represented by the straight line L1 in FIG. 2) is detected.
The second voltage for outputting the shallow negative voltage (for example, the substrate voltage VBB represented by the straight line L2 in FIG. 2) at the same time that the function of the first voltage generating circuit 22 for outputting BB) is stopped. The generation circuit 23 receives activation. On the contrary, when the negative voltage of the substrate changes in the direction of becoming shallow, the second voltage detection circuit 12 indicates that the voltage becomes a shallow negative voltage as compared with the second negative set voltage (for example, −2V). Upon detection, the function of the second voltage generating circuit 23 in operation is stopped, and at the same time, the first voltage generating circuit 22 for outputting a deep negative voltage is activated. That is, since one of the first and second voltage generation circuits 22 and 23 is always operating, the substrate voltage VBB rises (rises) even when a large current suddenly flows through the substrate for some reason. Not only is suppressed, but the voltage of the substrate can always be kept between the first negative setting voltage and the second negative setting voltage.

According to the third aspect of the invention, the first voltage generating circuit 22 has the first negative set voltage (for example, -3V).
For a positive power supply voltage higher than the positive power supply voltage Vcc (for example, 3.7 V) when outputting a negative voltage that matches the above, the output voltages of the first and second voltage generation circuits 22 and 23 are both the second output voltage. Since the negative voltage is deeper than the negative set voltage (eg, -2V) of, the effect of suppressing the rise (rise) of the substrate voltage becomes great.

According to the fourth aspect of the present invention, in the oscillator circuit 21, the substrate voltage detector 10 selects the voltage generating circuit (for example, the second voltage generating circuit 23) for outputting the shallow negative voltage. In this case, the current driving capability of the selected voltage generating circuit 23 is increased by increasing the frequency of the output pulse signal. As a result, the effect of suppressing the rise (rise) of the substrate voltage becomes great. On the other hand, when another voltage generating circuit for outputting a deep negative voltage (for example, the first voltage generating circuit 22) is selected, the frequency of the output pulse signal is lowered to reduce the other voltage selected. The current drive capability of the voltage generation circuit 22 is reduced. As a result, useless power consumption is suppressed.

According to the fifth aspect of the present invention, the third voltage detection circuit 13 has a third negative set voltage (for example, -3V) in which the substrate voltage is deeper than the first negative set voltage (-3V, for example). It always checks whether it becomes a deeper negative voltage than -3.5V), and when the substrate voltage becomes a deeper negative voltage than the third negative set voltage, the voltage generation that should operate is generated. The circuit is switched from the second voltage generation circuit 23 to the third voltage generation circuit 24, and conversely, when the substrate voltage becomes a negative voltage shallower than the third negative set voltage, the voltage generation to be operated The circuit is switched from the third voltage generating circuit 24 to the second voltage generating circuit 23. That is, the two voltage detection circuits 1
Compared with the case of the invention of claim 2, which is provided with 1, 12 and two voltage generating circuits 22, 23, three voltage generating circuits 2 are provided.
The output of each of 2, 23, and 24, that is, the substrate voltage VBB,
It is finely controlled by the three voltage detection circuits 11, 12, and 13. Moreover, since one of these three voltage generating circuits 22, 23, 24 is always operating, even if a large current suddenly flows through the substrate for some reason, any one of the voltage generating circuits operating Responds to the change in the substrate current to pull down the substrate voltage. Therefore, the voltage of the substrate does not become too shallow (high).

Further, according to the sixth aspect of the invention, when the specific control signal LT is applied to the substrate voltage detecting section 10, the plurality of voltage generating circuits 2 are irrespective of the magnitude of the voltage of the substrate.
2 and 23, a specific voltage generating circuit (for example, the first voltage generating circuit 22 that outputs the deep (low) substrate voltage VBB represented by the straight line L1 in FIG. 11) is selected, and the selected voltage generating circuit is generated. The circuit 22 outputs a negative voltage as the voltage VBB to be applied to the substrate. As a result, the reliability acceleration test of the semiconductor device can be performed.

[0028]

The present invention will be described in more detail below with reference to the illustrated embodiments.

First, a substrate voltage generating circuit according to a first embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a circuit diagram showing a substrate voltage generating circuit according to the first embodiment of the present invention. In the figure, VCC is a power supply voltage, VSS is a ground voltage, VBB is a substrate voltage, and Qp101 to Qp.
p236 is a P-channel MOS transistor, Qn101 to Qn2
12 is an N channel type MOS transistor, N101 to N232
Is a node name, BBE is a control signal, and C221 to C232 are capacitors.

The substrate voltage generating circuit is roughly divided into two parts, a substrate voltage detecting portion 10 and a substrate voltage generating portion 20. Of these, the substrate voltage detection unit 10 includes a first voltage detection circuit 11 having a detection setting voltage of -3V and -2V.
And a second voltage detection circuit 12 having a detection voltage set as a detection setting voltage, and two output nodes N having logic voltages having opposite phases to each other.
102 and N103. On the other hand, the substrate voltage generator 20
The oscillator circuit 21, the first voltage generating circuit 22 for outputting a deep negative voltage, and a shallow negative voltage with respect to the same power supply voltage VCC as compared with the negative voltage output by the first voltage generating circuit 22. And a second voltage generating circuit 23 for outputting. The output node N211 of the oscillator circuit 21 is
The first input node N221 of the input NAND gate of the voltage generating circuit 22 and the input NAND of the second voltage generating circuit 23
The first output node N102 of the substrate voltage detection unit 10 is commonly connected to the first input node N231 of the gate and the second input node N222 of the input NAND gate of the first voltage generation circuit 22 is connected to the same substrate. The second output node N103 of the voltage detector 10 is connected to the second input node N232 of the input NAND gate of the second voltage generating circuit 23, respectively.

FIG. 3 shows a first embodiment of the present invention having the above construction.
FIG. 6 is a waveform diagram of the substrate voltage VBB of the substrate voltage generating circuit and the signal at each node of the embodiment. The difference from the waveform diagram of FIG. 14 described above is only that the substrate voltage detection unit 10 outputs a signal having a logic voltage opposite in phase to the signal of the first output node N102 from the second output node N103. Therefore, detailed description of the operation of the first and second voltage detection circuits 11 and 12 will be omitted.

On the other hand, the oscillator circuit 2 in the substrate voltage generator 20
1, the control signal BBE is always held at the logic voltage "H" during the operation of the semiconductor device, so that a pulse signal having a constant frequency is output to both the first and second voltage generating circuits 22 and 23 through the output node N211. give. Moreover, in this embodiment,
When the first voltage detection circuit 11 detects that the voltage has become deeper (lower) than −3V when the negative voltage of the substrate has changed to a deeper (lower) direction, the substrate voltage detection unit 1
Since the first output node N102 of 0 becomes the logic voltage "L" (the second output node N103 becomes the logic voltage "H"),
At the same time that the function of the voltage generating circuit 22 is stopped, the second voltage generating circuit 23 starts outputting a shallow negative voltage as the voltage VBB to be applied to the substrate. On the other hand, when the second voltage detection circuit 12 detects that the voltage becomes shallower (higher) than -2V when the negative voltage of the substrate changes to the shallower (higher) direction. Means that the first output node N102 of the substrate voltage detection unit 10 becomes the logic voltage "H" (the second output node N103 has the logic voltage "L"), and thus the function of the second voltage generation circuit 23 is stopped. At the same time, the first voltage generation circuit 22 starts outputting a deep negative voltage as the voltage VBB to be applied to the substrate.

FIG. 2 is a relational diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristic of the substrate voltage generating circuit of this embodiment. In the figure, L1 is a relational line between the power supply voltage VCC and the substrate voltage VBB on the assumption that the first voltage generating circuit 22 is always operating, and L2 is the second voltage generating circuit 23.
Supply voltage Vcc assuming that is always operating
And the substrate voltage VBB. As described above, when the negative voltage of the substrate actually changes in the direction of becoming deeper (lower), if the voltage becomes deeper (lower) than -3V, the substrate voltage V
The voltage generating circuit for generating BB is switched from the first voltage generating circuit 22 to the second voltage generating circuit 23, and when the negative voltage of the substrate changes in the direction of becoming shallow (high), the voltage is -2V. When it becomes shallower (higher), the voltage generating circuit for generating the substrate voltage VBB is switched from the second voltage generating circuit 23 to the first voltage generating circuit 22, so that the actual substrate voltage VBB is indicated by a solid line and a hatching in FIG. As shown, when the change is limited and the power supply voltage Vcc is in the range of 3.7V to 5.0V, the substrate voltage VBB becomes a voltage value between -2V and -3V.

In addition, according to the first embodiment described above, any one of the first and second voltage generating circuits 22 and 23 is always operating, so that the substrate is suddenly damaged for some reason. Even when a large current flows, the voltage rise (rise) of the substrate is suppressed.

Next, a substrate voltage generating circuit according to the second embodiment of the present invention will be described with reference to FIG.

In the second embodiment, in the substrate voltage generating circuit shown in the same circuit diagram as FIG. 1 described above, the negative output voltage of the second voltage generating circuit 23 is deepened (lowered). .. FIG. 4 is a relationship diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristics of the substrate voltage generating circuit of this embodiment. In the figure, L1 is a relational line between the power supply voltage VCC and the substrate voltage VBB on the assumption that the first voltage generating circuit 22 is always operating, and L2 is the second voltage generating circuit 23.
Supply voltage Vcc assuming that is always operating
Is a relational line between the substrate voltage VBB and the substrate voltage VBB. In the second voltage generating circuit 23 of the present embodiment, the first voltage generating circuit 22 is a straight line L.
1, the set voltage of the first voltage detection circuit 11 is -3V
Power supply voltage Vcc (3.7 when a negative voltage corresponding to
For the same power supply voltage as V), a negative voltage deeper than the set voltage -2V of the second voltage detection circuit 12 is output on the straight line L2.

According to the second embodiment having the above configuration, both the output voltages of the first and second voltage generating circuits 22 and 23 are -2 in the range of the power supply voltage Vcc of 3.7 V or higher.
Since the negative voltage is deeper than V, the effect of suppressing the rise (rise) of the substrate voltage when a large current suddenly flows in the substrate becomes great.

Next, a substrate voltage generating circuit according to a third embodiment of the present invention will be described with reference to FIGS.

FIG. 5 is a circuit diagram showing only the oscillator circuit in the substrate voltage generating circuit of the third embodiment of the present invention. In this embodiment, the oscillator circuit 21 in the substrate voltage generating unit 20 of FIG. Figure 5
It is replaced with the oscillation circuit 21 shown in FIG. In FIG. 5, VCC is the power supply voltage, VSS is the ground voltage, and Qp511 to Qp5.
32 is a P channel type MOS transistor, Qn511 to Qn532
Is an N-channel type MOS transistor, N501 to N511 are node names, and BBE is a control signal. The output node N511 of the oscillation circuit 21 in the figure is similar to the output node N211 of the oscillation circuit of FIG. 1 in that the first input node N221 and the second input node N221 of the input NAND gate of the first voltage generation circuit 22 are connected to each other. The input NAND gate of the voltage generating circuit 23 is commonly connected to the first input node N231.

The oscillating circuit 21 of FIG. 5 operates while the control signal BBE is held at the logic voltage "H" during the operation of the semiconductor device to which the present substrate voltage generating circuit is applied, and the output node N511.
To output a pulse signal. Moreover, when the control node N502 is at the logic voltage "L", the inverting control node N503 is at the logic voltage "H", and the upper P-channel type M
Both the OS transistor Qp511 and the N-channel type MOS transistor Qn511 are turned on, and the lower P-channel type MO transistor is turned on.
Since both the S-transistor Qp521 and the N-channel type MOS transistor Qn521 are turned off, the oscillating circuit corresponds to a circuit in which five negating circuits are connected in a ring shape.
On the other hand, when the control node N502 is at the logic voltage "H", the inversion control node N503 is at the logic voltage "L", and the upper P-channel type MOS transistor Qp511 and the N-channel type MOS transistor Qn511 are both off and the lower stage is. Since both the P-channel type MOS transistor Qp521 and the N-channel type MOS transistor Qn521 are turned on, the oscillation circuit becomes an oscillation circuit corresponding to a circuit in which seven stages of negative circuits are connected in a ring shape, and the oscillation frequency is lowered.

FIG. 6 shows the oscillator circuit 2 of FIG. 5 described above.
FIG. 7 is a waveform diagram of signals of a control node N502 of 1 and an output node N511 for outputting a pulse signal. As shown in the figure, when the control node N502 is at the logical voltage "H", a pulse signal having a frequency lower than that when the control node N502 is at the logical voltage "L" is output from the output node N511.

The control node N502 of the oscillation circuit 21
Is the first output node N of the substrate voltage detector 10 in FIG.
Connected to 102. As a result, the logic voltage of the first output node N102 of the substrate voltage detection unit 10 is set to "L" (the logic voltage of the second output node N103 is "H"), and the second negative voltage for outputting the shallow negative voltage is output. When the voltage generation circuit 23 is operated, the oscillation frequency of the oscillation circuit 21 is increased and the current driving capability of the second voltage generation circuit 23 is increased. As a result, the effect of suppressing the rise (rise) of the substrate voltage VBB becomes great. On the contrary, in order to output a deep negative voltage by setting the logic voltage of the first output node N102 of the substrate voltage detection unit 10 to "H" (the logic voltage of the second output node N103 is "L"). When operating the first voltage generating circuit 22, the oscillation frequency of the oscillating circuit 21 is lowered and the current driving capability of the first voltage generating circuit 22 is reduced, resulting in suppressing unnecessary power consumption. ..

Next, a substrate voltage generating circuit according to a fourth embodiment of the present invention will be described with reference to FIGS.

FIG. 7 is a circuit diagram showing a substrate voltage generating circuit according to the fourth embodiment of the present invention. In this substrate voltage generation circuit, a third voltage detection circuit 13 having a detection set voltage of −3.5V is added to the substrate voltage detection unit 10 in the configuration of FIG. 1 described above (first embodiment). At the same time, a third voltage generating circuit 24 for outputting a shallow negative voltage to the same power supply voltage VCC as compared with the negative voltage output from the second voltage generating circuit 23 is added to the substrate voltage generating section 20. Is. In the substrate voltage detection unit 10 in FIG. 7, Qp131 is a P-channel type MOS transistor, and Qn131 to Qn134 are N-type.
Channel type MOS transistors, N104 to N106, N13
1 is the node name, these are newly introduced. Further, in the substrate voltage generator 20 in the figure,
Qp241 to Qp248 are P-channel MOS transistors, N
241, N242 are node names, and C241, C242 are capacitors, which are newly introduced for the third voltage generating circuit 24. The same reference numerals as those in FIG. 1 represent the same components.

In the substrate voltage generating circuit of this embodiment, the output node N211 of the oscillating circuit 21 is the first input NAND gate of each of the first to third voltage generating circuits 22, 23 and 24.
Input nodes N221, N231, and N241 are commonly connected. The signals of the first and second output nodes N102 and N103 of the substrate voltage detection unit 10 based on the outputs of the first and second voltage detection circuits 11 and 12 are the third voltage detection circuit 1
The third to fifth output nodes N104, N105 of the substrate voltage circuit 10 are processed together with the signal of the third output node N131.
, N106. Then, the substrate voltage detector 1
The third output node N104 of 0 is connected to the first voltage generating circuit 22.
To the second input node N222 of the input NAND gate and the fourth output node N105 of the substrate voltage detection unit 10 to the second input node N232 of the input NAND gate of the second voltage generation circuit 23. The fifth output node N106 of the detection unit 10 is connected to the second input node N242 of the input NAND gate of the third voltage generating circuit 24, respectively.

FIG. 9 shows a fourth embodiment of the present invention having the above construction.
FIG. 6 is a waveform diagram of the substrate voltage VBB of the substrate voltage generating circuit and the signal at each node of the embodiment. The operation of the substrate voltage generating circuit of this embodiment will be described with reference to FIG. However,
The substrate voltage VBB of the third voltage detection circuit 13 is -3.5V.
When it becomes deeper (lower), the output node N131 becomes the logic voltage "L", and when the negative substrate voltage VBB becomes shallower (higher) than -3.5V, the output node N131 becomes the logic voltage "H".

As shown in FIG. 9, while the substrate voltage VBB drops from 0V, the substrate voltage detector 10 detects the first to third voltages during a period (period) shallower (higher) than -2V. The output nodes N111, N121 of the circuits 11 to 13,
N131 is a logic voltage "H", and the output node N111 of the first voltage detection circuit 11 is connected to the gate of P.
The channel type MOS transistor Qp101 is turned off, and the N channel type MOS transistor Qn101 having the output node N121 of the second voltage detection circuit 12 connected to the gate is turned on. Therefore, both MOS transistors Qp101, Qn101
The node N101 at the connection point of is a logical voltage "L", the first output node N102 of the substrate voltage detection unit 10 is a logical voltage "H", and the second output node N103 is a logical voltage "L". As a result, the logical voltage of each of the third to fifth output nodes N104, N105, N106 of the substrate voltage detection unit 10 becomes
They are "H", "L", and "L", respectively. next,
When the substrate voltage VBB further decreases and falls within the range of −2V to −3V (period), the output node N121 of the second voltage detection circuit 12 changes from the logic voltage “H” to the logic voltage “L”, and the output node N121. N-channel type M in which is connected to the gate
Although the OS transistor Qn101 turns off, the first and second output nodes N102 and N103 of the substrate voltage detecting unit 10 hold the logic voltages "H" and "L", respectively, so that the substrate voltage detecting unit 10 outputs the first voltage. Third to fifth output nodes N104, N105
, N106 hold logic voltages "H", "L", "L", respectively. Next, the substrate voltage VBB further decreases to -3V to-
In the range of 3.5V (period-1), the output node N111 of the first voltage detection circuit 11 changes from the logic voltage "H" to the logic voltage "L", and the output node N111 is connected to the gate of the P channel. Type MOS transistor Qp101 is turned on, the P-channel type MOS transistor Qp101 and the N-channel type MOS transistor Qn1 already turned off
The node N101 at the connection point with 01 becomes the logic voltage "H",
The first output node N102 of the substrate voltage detector 10 has a logic voltage "L", and the second output node N103 has a logic voltage "H". Therefore, the third to fifth output nodes N104, N105, N106 of the substrate voltage detection unit 10 are at the logic voltages "L", "H", "L", respectively. When the substrate voltage VBB further drops and becomes deeper (lower) than -3.5V (period-
2) Since the output node N131 of the third voltage detection circuit 13 changes from the logic voltage "H" to the logic voltage "L", the third to fifth output nodes N104, N105 of the substrate voltage detection unit 10 are connected.
The logic voltages of N106 are logic voltages “L”, “L”,
It becomes "H".

Next, the substrate voltage VBB starts to rise and -3.
In the range of 5V to -3V (period-3), the output node N131 of the third voltage detection circuit 13 changes from the logic voltage "L" to the logic voltage "H", so that the third to third voltages of the substrate voltage detection unit 10 are detected. The logic voltages of the fifth output nodes N104, N105 and N106 are "L", "H" and "L", respectively. Substrate voltage V
Even if BB further rises and becomes shallower (higher) than -3V, -2
During a period (period) deeper than V (lower), the output node N111 of the first voltage detection circuit 11 changes from the logic voltage "L" to the logic voltage "H", and the output node N111 is connected to the gate of the P-channel type. Although the MOS transistor Qp101 turns off, the first and second output nodes N102 and N103 of the substrate voltage detection unit 10 hold the logic voltages "L" and "H", respectively, so that the third to fifth output nodes are held. N104, N105, N
106 holds logic voltages "L", "H", "L", respectively. Finally, when the substrate voltage VBB further rises and becomes shallower (higher) than -2V (period), the second voltage detection circuit 12
Of the output node N121 changes from the logic voltage "L" to the logic voltage "H", the N-channel type MOS transistor Qn101 whose output node N121 is connected to the gate is turned on, and the N-channel type MOS transistor Qn101 is already turned off. Since the node N101 at the connection point with the existing P-channel MOS transistor Qp101 has the logic voltage "L", the first output node N102 of the substrate voltage detection unit 10 has the logic voltage "H" and the second output node N103 has The logic voltage becomes “L”. Therefore, the logic voltages of the third to fifth output nodes N104, N105, N106 of the substrate voltage detector 10 are restored to "H", "L", "L", respectively.

As described above, the substrate voltage detection unit 10 of the present embodiment has the third to fifth output nodes N104, N105, N with a partial hysteresis according to the change of the substrate voltage.
Change the logic voltage of 106.

On the other hand, the oscillator circuit 2 in the substrate voltage generator 20
1 is that the control signal BBE is always held at the logic voltage "H" during the operation of the semiconductor device, so that the pulse signal having a constant frequency is output to any of the first to third voltage generating circuits 22 to 24 through the output node N211. give. Moreover, in the present embodiment, the first fact is that when the negative voltage of the substrate changes to the deeper (lower) direction, the voltage becomes deeper (lower) than -3V.
When the detection circuit 11 detects the voltage, the substrate voltage detection unit 1
Since the third output node N104 of 0 changes to the logic voltage "L" and the fourth output node N105 changes to the logic voltage "H" at the same time, the function of the first voltage generating circuit 22 stops and the second The voltage generation circuit 23 starts to output a shallow negative voltage as the voltage VBB to be applied to the substrate. When the third detection circuit 13 detects that the negative voltage of the substrate has become deeper (lower) than −3.5V when the negative voltage has changed to the deeper (lower) direction, the substrate voltage is detected. Since the fourth output node N105 of the section 10 turns to the logic voltage "L" and the fifth output node N106 turns to the logic voltage "H" at the same time, the function of the second voltage generating circuit 23 is stopped and at the same time, The voltage V to be applied to the substrate by the voltage generating circuit 24 of 3
Output of a shallower negative voltage as BB is started. On the other hand, when the third detection circuit 13 detects that the voltage becomes shallower (higher) than -3.5 V when the negative voltage of the substrate changes to the shallower (higher) direction. Indicates that the fifth output node N106 of the substrate voltage detection unit 10 has the logic voltage "L".
At the same time, the fourth output node N105 changes to the logic voltage "H", so that the function of the third voltage generating circuit 24 is stopped, and at the same time, the voltage VBB to be applied to the substrate by the second voltage generating circuit 23 is changed. Start output of deep negative voltage. When the second detection circuit 12 detects that the voltage becomes shallower (higher) than −2V when the negative voltage of the substrate changes to become shallower (higher), the substrate voltage detection unit 10 At the same time that the fourth output node N105 changes to the logic voltage "L" and the third output node N104 changes to the logic voltage "H".
Since the function of the second voltage generating circuit 23 is stopped, the first voltage generating circuit 22 starts to output a deeper negative voltage as the voltage VBB to be applied to the substrate.

FIG. 8 is a relational diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristics of the substrate voltage generating circuit of this embodiment. In the figure, L1 is a relational line between the power supply voltage VCC and the substrate voltage VBB on the assumption that the first voltage generating circuit 22 is always operating, and L2 is the second voltage generating circuit 23.
Supply voltage Vcc assuming that is always operating
Is a relational line between the substrate voltage VBB and the substrate voltage VBB, and L3 is a relational line between the power supply voltage Vcc and the substrate voltage VBB assuming that the third voltage generating circuit 24 is always operating. As described above, the voltage generation circuit that actually generates the substrate voltage VBB according to the substrate voltage is the first to third voltage generation circuits 22 and 2.
Since it is possible to finely switch between 3 and 24, the change of the actual substrate voltage VBB is limited as shown by the solid line and hatching in FIG.

Moreover, according to the above fourth embodiment, any one of the first to third voltage generating circuits 22, 23, 24 is always operating, so that the substrate may be damaged by some cause. Even when a large current suddenly flows, the floating (rise) of the voltage of the substrate is suppressed.

Next, a substrate voltage generating circuit according to a fifth embodiment of the present invention will be described with reference to FIGS. 10 and 11.

FIG. 10 is a circuit diagram showing only the substrate voltage detecting unit in the substrate voltage generating circuit of the fifth embodiment of the present invention. In this embodiment, the substrate voltage detecting unit 10 of FIG. 1 is shown in FIG. The substrate voltage detector 10 shown in FIG. Figure 10
, LT is a newly introduced special control signal, and when the control signal LT is given, the first output node N102 of the substrate voltage detection unit 10 unconditionally becomes the logic voltage “H”, The second output node N103 is unconditionally set to the logic voltage "L".

For example, a reliability test mode signal of the semiconductor device is given as a specific control signal LT for the substrate voltage detection unit 10. When the specific control signal LT becomes the logic voltage "H", the first voltage generating circuit 22 for outputting a deep negative voltage is unconditionally activated, and a large voltage is applied to the element such as a transistor on the substrate. Becomes That is, it is possible to impose severer conditions than the normal operation of the semiconductor device, which is effective as an accelerated test of the reliability of the semiconductor device.

[0057]

As described above, according to the first aspect of the present invention, a plurality of voltage generating circuits 22 and 23 for outputting negative voltages different from each other are provided, and the voltage generating circuits 22 and 23 are provided according to the voltage change of the substrate. Since a configuration for operating any one of the plurality of voltage generating circuits 22 and 23 is adopted, even if a large current suddenly flows through the substrate due to some cause, the operating voltage generating circuit keeps the substrate current flowing. In response to the change of the substrate voltage, the rise (rise) of the substrate voltage is suppressed. In other words, the dynamic characteristics of the substrate voltage generating circuit are improved, and a great effect that the normal and stable operation of the entire semiconductor device can be guaranteed can be obtained.

According to the second aspect of the present invention, two voltage generating circuits 22 and 23 having different output voltages are provided, and one of the two voltage generating circuits 22 and 23 has a different set voltage. Since the configuration is adopted in which the two voltage detection circuits 11 and 12 operate under the control, even if a large current suddenly flows through the substrate for some reason, the floating of the substrate voltage is suppressed and the voltage of the substrate is also suppressed. Can always be within a predetermined range.

According to the third aspect of the invention, the output voltage of the second voltage generating circuit 23 for outputting the shallow negative voltage of the first and second voltage generating circuits 22 and 23 is set to be too shallow. Since the non-use structure is adopted, the effect of suppressing the rise of the substrate voltage becomes great.

According to the fourth aspect of the invention, in the oscillator circuit 21, the substrate voltage detector 10 selects the voltage generating circuit (for example, the second voltage generating circuit 23) for outputting the shallow negative voltage. In this case, while increasing the frequency of the output pulse signal to increase the current driving capability of the selected voltage generating circuit 23, another voltage generating circuit (for example, the first voltage generating circuit) for outputting a deep negative voltage is generated. When the circuit 22) is selected, a configuration having a function of lowering the frequency of the output pulse signal to reduce the current driving capability of the other selected voltage generating circuit 22 is adopted.
When the voltage generation circuit 23 for outputting the shallow negative voltage is selected, the effect of suppressing the rise of the substrate voltage is great, and another voltage generation circuit 22 for outputting the deep negative voltage is selected. In this case, power consumption is suppressed.

According to the invention of claim 5, three voltage generating circuits 22, 23, 24 having different output voltages are provided,
Any one of the three voltage generation circuits 22 to 24 is connected to three voltage detection circuits 11, 12, 1 having different set voltages.
Since the configuration which operates under the control of No. 3 is adopted, even if a large current suddenly flows through the substrate for some reason, the floating of the substrate voltage is suppressed, and the voltage of the substrate can always be kept within a predetermined range. Not only is there an effect that the substrate voltage is finely controlled.

Further, according to the invention of claim 6, when a specific control signal LT is applied, a specific voltage of the plurality of voltage generating circuits 22 and 23 is irrespective of the magnitude of the voltage of the substrate. Since the substrate voltage detecting unit 10 selects the generation circuit, the substrate voltage V is applied to the specific voltage generation circuit.
When outputting a deep negative voltage as BB, there is an effect that a reliability acceleration test of a semiconductor device can be performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a substrate voltage generating circuit according to a first embodiment of the present invention.

FIG. 2 is a relationship diagram between a power supply voltage VCC and a substrate voltage VBB showing static characteristics of the substrate voltage generation circuit of FIG.

3 is a waveform diagram of a substrate voltage VBB of the substrate voltage generating circuit of FIG. 1 and a signal of each node.

FIG. 4 is a relationship diagram between a power supply voltage VCC and a substrate voltage VBB showing static characteristics of a substrate voltage generating circuit according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram of an oscillator circuit in a substrate voltage generating circuit according to a third embodiment of the present invention.

6 is a waveform diagram of signals at respective nodes of the oscillation circuit of FIG.

FIG. 7 is a circuit diagram of a substrate voltage generating circuit according to a fourth embodiment of the present invention.

8 is a relationship diagram between a power supply voltage VCC and a substrate voltage VBB showing static characteristics of the substrate voltage generation circuit of FIG.

9 is a waveform diagram of the substrate voltage VBB of the substrate voltage generating circuit of FIG. 7 and the signal of each node.

FIG. 10 is a circuit diagram of a substrate voltage detection unit of a substrate voltage generation circuit according to a fifth embodiment of the present invention.

11 is a relationship diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristic of the substrate voltage generation circuit including the substrate voltage detection unit of FIG.

FIG. 12 is a circuit diagram showing a conventional example of a substrate voltage generating circuit.

13 is a relationship diagram between the power supply voltage VCC and the substrate voltage VBB showing the static characteristics of the substrate voltage generation circuit of FIG.

14 is a waveform chart of the substrate voltage VBB of the substrate voltage generation circuit of FIG. 12 and the signal of each node.

[Explanation of symbols]

 10 Substrate Voltage Detection Section 11 First Voltage Detection Circuit 12 Second Voltage Detection Circuit 13 Third Voltage Detection Circuit 20 Substrate Voltage Generation Section 21 Oscillation Circuit 22 (First) Voltage Generation Circuit 23 Second Voltage Generation Circuit 24 Third voltage generation circuit VCC Power supply voltage VSS Ground voltage VBB Substrate voltage Qp101 to Qp532 P-channel MOS transistor Qn101 to Qn532 N-channel MOS transistor N101 to N511 Node name BBE, LT Control signal C221 to C242 Capacity L1 to L3 Power supply Relationship between voltage and substrate voltage

Claims (6)

[Claims] 1. A substrate voltage generator for outputting a negative voltage as a voltage to be applied to the substrate in order to apply a negative voltage to the substrate so that a semiconductor device on the substrate operates stably, and the substrate. Is a substrate voltage generation circuit including a substrate voltage detection unit for controlling the operation of the substrate voltage generation unit according to the change of the voltage of, the substrate voltage generation unit, for the same positive power supply voltage A plurality of voltage generation circuits for respectively outputting negative voltages different from each other, wherein the substrate voltage detection unit is any one of the plurality of voltage generation circuits according to a change in the voltage of the substrate. And a substrate voltage generating circuit having a function of outputting a negative voltage as a voltage to be applied to the substrate to the selected voltage generating circuit. 2. The substrate voltage generation circuit according to claim 1, wherein the substrate voltage generation unit outputs a negative voltage, and a negative voltage output from the first voltage generation circuit. And a second voltage generation circuit for outputting a shallow negative voltage with respect to the same positive power supply voltage, the substrate voltage detection unit is configured such that the substrate voltage is equal to a first negative set voltage. A first voltage detection circuit for detecting whether or not a deeper negative voltage is obtained, and a second negative set voltage shallower than the first negative set voltage of the first voltage detection circuit. A second voltage detection circuit for detecting whether or not the voltage of the substrate has become a shallower negative voltage, wherein the first voltage detection circuit has changed so that the negative voltage of the substrate becomes deeper. At that time, the voltage became a deeper negative voltage than the first negative set voltage. In the case of detecting, the function of the first voltage generating circuit is stopped and a negative voltage as a voltage to be applied to the substrate is output to the second voltage generating circuit, and the second voltage detecting circuit is When the negative voltage of the substrate changes in the direction of becoming shallower, it is detected that the voltage becomes a shallower negative voltage than the second negative set voltage, the second voltage generation A substrate voltage generating circuit having a function of stopping the function of the circuit and outputting a negative voltage as a voltage to be applied to the substrate to the first voltage generating circuit. 3. The substrate voltage generation circuit according to claim 2, wherein in the second voltage generation circuit, the first voltage generation circuit matches a first negative set voltage of the first voltage detection circuit. And a positive power supply voltage that is the same as the positive power supply voltage when outputting the negative voltage, the negative voltage deeper than the second negative set voltage of the second voltage detection circuit is output. Substrate voltage generator circuit. 4. The substrate voltage generating circuit according to claim 1, wherein the substrate voltage generating unit outputs a pulse signal having a variable frequency for changing a current driving capability of each of the plurality of voltage generating circuits. The oscillating circuit further includes a circuit, and when the substrate voltage detecting unit selects a voltage generating circuit for outputting a shallow negative voltage from the plurality of voltage generating circuits, the selected voltage is generated. If another voltage generating circuit for increasing the frequency of the pulse signal so as to increase the current driving capability of the generating circuit and outputting a negative voltage deeper than the voltage generating circuit is selected, A substrate voltage generating circuit having a function of lowering the frequency of the pulse signal so as to reduce the current driving capability of another voltage generating circuit. 5. The substrate voltage generation circuit according to claim 2, wherein the substrate voltage generation unit outputs a shallow negative voltage for the same positive power supply voltage as compared with the negative voltage output by the second voltage generation circuit. The substrate voltage detection unit is configured to perform a third voltage setting circuit that is deeper than the first negative setting voltage of the first voltage detection circuit. Third for detecting whether a deep negative voltage has been reached
The third voltage detection circuit further includes a voltage detection circuit that is deeper than the third negative set voltage when the negative voltage of the substrate changes to a deeper negative voltage. When it is detected that the voltage has been reached, the function of the second voltage generating circuit is stopped, a negative voltage as a voltage to be applied to the substrate is output to the third voltage generating circuit, and the substrate is When it is detected that the negative voltage becomes shallower than the third negative set voltage when the negative voltage changes to a shallower direction,
A substrate voltage generating circuit having a function of stopping the function of the third voltage generating circuit and outputting a negative voltage as a voltage to be applied to the substrate to the second voltage generating circuit. 6. The substrate voltage generation circuit according to claim 1, wherein the substrate voltage detection unit, when a specific control signal is applied, irrespective of the magnitude of the voltage of the substrate, the plurality of voltages. A substrate voltage generating circuit having a function of selecting a specific voltage generating circuit from among the generating circuits and outputting a negative voltage as a voltage to be applied to the substrate to the selected voltage generating circuit.