JPH0513044Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to an integrated oscillation circuit using complementary MOS transistors using a mechanical-electrical resonator such as a crystal resonator.

[Conventional technology]

A conventional oscillation circuit will be explained based on the drawings.

FIG. 1 shows a conventional general integrated oscillation circuit using complementary MOS transistors, in which the input terminal and output terminal of an oscillation inverter 1 using complementary MOS transistors are connected by a feedback resistor 2 for self-biasing. Furthermore, an output stabilizing resistor 3 is connected to the output end of the inverter 1. As shown by broken lines in the figure, the external output terminal 4 and the external input terminal 5 are connected to a mechanical and electrical resonator (hereinafter simply referred to as a resonator) Q such as a crystal resonator, and oscillation capacitors Cin and Cout. The oscillation capacitors Cin and Cout may be integrated into an integrated circuit, but the vibrator Q is provided outside the integrated circuit. Note that the vibrator Q and the oscillation capacitances Cin and Cout are omitted from illustration in the following FIGS. 2, 3, and 4.

In order to use such an oscillator in ultra-low power devices such as wristwatches, the power consumed for oscillation must also be kept to an extremely small value. The energy generated by the oscillator Q also becomes very small, and the vibrator Q is not driven sufficiently, making it difficult to oscillate. The feedback resistor 2 for bias has a negative feedback effect, so reducing its value will further hinder oscillation. Therefore, in order to maintain normal oscillation with low power consumption, the feedback resistor 2 must be The value is extremely large (number 10
(megohm or higher) is set. As a result, the bias potential at the input terminal of the inverter 1 becomes susceptible to external influences, and when the external input terminal 5 is drawn to a specific potential due to leakage of external dirt, humidity, etc., the bias potential of the inverter 1 becomes fluctuates,
In some cases, oscillation may stop.

In order to solve this problem, the configuration shown in FIG. 2 has been proposed. In FIG. 2, a DC cut capacitor 2 is inserted between the external input terminal 5 and the biased input terminal of the inverter 1. In this way, even if the external input terminal 5 is drawn to a specific potential due to dirt or the like, the bias potential of the inverter 1 will not change, and therefore problems such as stopping oscillation will not occur. It will be done.

When the configuration shown in FIG. 2 was actually implemented, a great effect was certainly obtained in terms of oscillation sustainability, and the above-mentioned improvements were somewhat successful.

[The problem that the idea aims to solve]

However, during a more detailed investigation, a phenomenon in which the oscillation frequency slightly fluctuated was discovered. After searching for the cause, it was determined that this phenomenon was caused by the presence of protection diodes, which are essential for complementary MOS integrated circuits. In other words, although not shown in Figures 1 and 2, in complementary MOS integrated circuits, MOS
In order to prevent electrostatic damage to the structure, the insertion of protective diodes 7 and 8 is actually used as a conventional technique, as shown in FIG. 3 (corresponding to FIG. 2).

In FIG. 3, the waveform of the input voltage applied to the external input terminal 5 is ideally a sine wave. Now, the amplitude is the power supply voltage range |Vdd−Vss+1.2|
(The forward voltage of the protection diode is 0.6V.) If the outside is in an ideal state with no dirt or the like, the potential of the external input terminal 5 is undefined, and therefore it is unknown where the center potential of the input voltage is. The top of the input voltage (hereinafter referred to as H) is lower than Vdd + 0.6,
and the lowest point (hereinafter referred to as L) of the input voltage is
No explanation is required for cases where the voltage is higher than Vss−0.6.

Assuming that the H exceeds Vdd + 0.6, the diode 7 in FIG. Current flows from 5 to Vdd.

This current discharges the equivalent capacitance of the vibrator Q connected to the external input terminal 5 and brings about a change in the DC potential of the external input terminal 5, but the direction is the DC potential of the external input terminal 5. The direction is to lower the value.

Since this effect continues until the diode 7 is turned off, the DC potential of the external input terminal 5 will eventually reach a state where no current flows through the diode 7, that is, a state where no distortion occurs in the input voltage. will be automatically adjusted.

Similarly, when L falls below Vss-0.6, a current flows from Vss to the vibrator Q through the diode 8, charging the equivalent capacitance of the vibrator Q and raising the DC potential of the external input terminal 5.

In this way, the DC potential of the external input terminal 5 is automatically adjusted, and the waveform of the input voltage is oscillated in an ideal state without distortion, making it possible to obtain a stable oscillation frequency.

However, due to external dirt etc., the external input terminal 5
If it is pulled to Vdd or Vss, the above-mentioned effect will not be performed completely, and the input voltage will be distorted, causing the oscillation frequency to fluctuate. For example, assuming that the external input terminal 5 leaks from Vdd, the DC potential of the external input terminal 5 increases toward Vdd, and when the H exceeds Vdd + 0.6, the above-mentioned effect is activated and the external An attempt is made to lower the DC potential of input terminal 5. Ultimately, the DC potential of the external input terminal 5 is determined by the rising force due to leakage and the diode 7.
This results in a stable state in which the downward force due to the current flowing in is balanced.

In this state, since current flows through the diode 7 at the H level, the waveform of the input voltage is naturally clamped by the diode 7 and oscillation is connected in a distorted state. If the amount of leakage is constant, the oscillation frequency will not change even if oscillation is connected in such a state (with the exception of humidity characteristics unique to the oscillator, etc.).

However, leakage due to external dirt, etc. is not constant and changes depending on temperature and humidity, so this change also changes the rising power of the DC potential of the external input terminal 5, which should be balanced by the The descending force also changes, so the current flowing through the diode 7 also changes, and the amount of distortion of the input voltage waveform also changes, resulting in the oscillation frequency changing with changes in temperature, humidity, etc. It will become.

In the above explanation, the amplitude of the input voltage is |Vdd−Vss
+1.2|, but if the amplitude is larger than |Vdd-Vss+1.2|, the oscillation is connected in a state where both the H and L are distorted. In this case as well, if there is no fluctuation leak, the frequency will not fluctuate (excluding the effect of temperature change on the forward voltage of the protection diode 7), but if there is fluctuation leak, the oscillation frequency will change due to changes in temperature, humidity, etc. It will change over time.

This invention was made based on the above analysis results, and was made for the purpose of reducing fluctuations in the DC potential of the external input terminal 5 due to leakage due to external dirt, etc., and stabilizing the oscillation frequency. It is.

[Means for solving problems]

The means used by the present invention to solve the above problems include an oscillating inverter 1 constituted by complementary MOS transistors, a biasing means 2 for biasing the input terminal of the inverter, and the oscillating inverter 1 biased by the biasing means 2. In the integrated oscillation circuit in which all of the DC cut capacitance 6 connecting the input end of the input terminal and the external input terminal 5, and the protection diodes 7 and 8 connected to the external input terminal 5 are integrated, A means for biasing the external input terminal 5 is provided.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings. FIG. 4 is a circuit diagram of a main part of an oscillation circuit showing an embodiment of the present invention.

In FIG. 4, the input end and the output end of the oscillation inverter 1 constituted by complementary MOS transistors are connected by a bias means 2, and the input end of the oscillation inverter 1 biased by the bias means 2 and the external input The terminal 5 is connected by a DC cut capacitor 6, protection diodes 7 and 8 are connected between the external input terminal 5 and the power supply, and an output stabilizing resistor 3 is connected between the output terminal of the inverter 1 and the external output terminal 4. The connection is the same as in the conventional example shown in FIG. The present invention is characterized in that the above circuit is further provided with bias means 9 for applying a bias potential to the external input terminal.

That is, in the embodiment shown in FIG. 4, the bias means 9 is a single resistor 9, one end of which is connected to the external input terminal 5, and the other end connected to the output of the inverter 1. It is connected to the terminal or the external output terminal 4.

With this configuration, the DC potential of the external terminal 5 will not become unstable, and even if some leakage occurs in the external terminal 5, fluctuations in the DC potential of the external terminal 5 can be reduced. frequency fluctuation can be reduced.

In the above description, the causes of leakage are assumed to be dirt, humidity, etc., but the present invention is also effective against leakage caused by light and disadvantageous characteristics of the semiconductor itself. Further, the materials of the bias means 2 and 9 are not limited to semiconductor resistors, polysilicon resistors, etc. For example, one end of the connection point of the bias means 2 may be changed to the output end of the inverter 1 and used as the external output terminal 4, and the DC potential of the external input terminal 5 is connected to the protection diode 7,
It is clear from the above explanation that it is desirable to connect diodes 7 and 8 to the center of the power supply. When the level is different from the level of the connected power supply, it may be better to use a general fixed bias method as the bias means 9.

Further, as described above, the oscillation inverter 1 constituted by complementary MOS transistors, the bias means 2, the DC cut capacitor 6, and the protection diode 7,
8 must be integrated and built-in, but the bias means 9 does not necessarily need to be included in the integrated circuit.

[Effect of idea]

As described above, according to the present invention, it is possible to provide a complementary MOS oscillation circuit that does not stop oscillation, has little variation in oscillation frequency due to external leakage, etc., and has extremely excellent environmental resistance.

Of course, as is clear from the above explanation, if the protection diode does not exist, the external input terminal 5
Even if a leak occurs in the external input terminal 5,
The DC potential of the input voltage is only Vdd or Vss at most, and the input voltage waveform is not clamped and distortion does not occur. Therefore, in bipolar oscillation circuits that do not require protection diodes, the present invention is effective. is completely unnecessary, and the present invention has a special effect only in the case of integrated circuits that require protection diodes.
In most fields that require low power, such as integrated circuits for watches, complementary MOS is used, and the implementation of the present invention will have a significant effect.

[Brief explanation of the drawing]

1 to 3 are circuit diagrams showing the configuration of a conventional oscillation circuit, and FIG. 4 is a circuit diagram of a main part of an oscillation circuit showing an embodiment of the present invention. 1... Complementary MOS inverter, 2... Bias means (feedback resistor), 3... Output stabilizing resistor, 4
...External output terminal, 5...External input terminal, 6...
DC cut capacity, 9...bias means, Q...vibrator.

Claims (1)

[Scope of utility model registration request] An oscillating inverter 1 constituted by complementary MOS transistors, a biasing means 2 for biasing the input end of the inverter, and a direct current connecting the input end of the oscillating inverter 1 biased by the biasing means 2 and an external input terminal 5. In an integrated oscillation circuit in which a cut capacitor 6 and protection diodes 7 and 8 connected to the external input terminal 5 are all integrated, a means for biasing the external input terminal 5 is provided. oscillation circuit.