JPH05129921A - Gate turn-off thyristor drive circuit - Google Patents

Abstract

PURPOSE:To supply an intermittent DC current to a GTO thyristor whose interrupting period is not subject to limit due to a minimum OFF time. CONSTITUTION:This circuit is provided with an on-gate current generating circuit 2 and an off-gate current generating circuit 3 supplying respectively an on-gate current and an off-gate current to a GTO thyristor 4. The on-gate current generating circuit 2 consists of a steady-gate current generating circuit 13 and a high gate current generating circuit 12 supplying respectively a steady- state gate current and a high gate current. The high gate current 12 is acted for a prescribed time every time a one-shot circuit 6 generates an on-signal 15 synchronously with the leading of an interrupting DC current. The operation of the steady-gate current generating circuit 13 is acted in response to the production of the on-signal 15 with a latch circuit 7 and stopped in response to the production of the off-signal 16 with a latch circuit 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a GTO thyristor drive circuit, and more particularly to a GTO thyristor drive circuit for driving the GTO thyristor when an intermittent direct current is passed through the GTO thyristor.

[0002]

2. Description of the Related Art An ON signal for turning on a GTO thyristor drives a high gate in order to quickly turn on the GTO thyristor. That is, a gate current that is considerably larger than the steady-state gate current is made to flow initially, and only a small value of the steady-state gate current is made to flow after the elapse of a predetermined time.

FIG. 3 shows a circuit diagram of an already proposed example of a GTO thyristor driving circuit (see Japanese Patent Application No. 3-012375) for driving a GTO thyristor with a high gate as described above. In FIG. 3, the GTO gate drive circuit 21 includes an on-gate current generation circuit 22 for supplying an on-gate current to the GTO thyristor 33, an off-gate current generation circuit 23 for similarly supplying an off-gate current to the GTO thyristor 33, and a DC power supply 24 for feeding them. 25 and a one-shot circuit 26 such as a monostable multivibrator.

The on-gate current generating circuit 22 is composed of current limiting resistors 27 and 28 and switch elements 29 and 30, and the resistor 27 and the switch element 29 constitute a high gate current generating circuit 31 for supplying a high gate current to the GTO thyristor 33. The resistor 28 and the switch element 30 are GT
A steady gate current generation circuit 32 that supplies a steady gate current to the O thyristor 33 is configured.

As the switch elements 29 and 30,
For example, a field effect transistor or the like is used. Also,
The resistance value of the resistor 27 is set smaller than the resistance value of the resistor 28 so that a relatively large current can be passed through the gate of the GTO thyristor 33. In the on-gate current generating circuit 22, when the on-signal 34 to the GTO thyristor 33 rises, the switch elements 29 and 30 are turned on at the same time. The switch element 29 maintains the ON state for a fixed time (about 10 to 20 μsec) after the ON signal 34 rises by the action of the one-shot circuit 26, and then turns OFF. Further, the switch element 30 continuously maintains the ON state while the ON signal 34 is at the high level, and turns OFF when the ON signal 34 falls.

When the switch element 30 is turned on, the DC power source 24 passes through the resistor 28 and the switch element 30 and G
A steady gate current flows through the gate of the TO thyristor 33. Further, when the switch element 29 is turned on, the GT from the DC power source 24 through the resistor 27 and the switch element 29.
A high gate current flows through the gate of the O thyristor 33.
Therefore, when the ON signal 34 rises, the steady gate current plus the high gate current flows for a certain time immediately after that, and only the steady gate current flows until the ON signal 34 falls after the lapse of the certain time. It will be.

G from the DC power source 24 through the resistor 28
The current flowing through the gate of the TO thyristor 33 is shown in FIG.
As shown in (a), it has a constant value, and the ON signal 34 continues to flow during a high level period (steady gate current).
On the other hand, the current flowing from the DC power supply 24 to the gate of the GTO thyristor 33 through the resistor 27 flows for a fixed time (set by the one-shot circuit 26) immediately after the rising of the ON signal 34, as shown in FIG. 4B. , Then becomes zero.

Therefore, the combined gate current flowing through the gate of the GTO thyristor 33 is as shown in FIG. 4C, and a considerably larger current flows for a certain period of time immediately after the rising of the ON signal 34 than in the steady state. After this, GTO
When the ON signal 34 to the thyristor 33 falls,
When the switch element 30 is turned off, an off signal to the GTO thyristor 33 (a signal obtained by inverting the above on signal 34) rises, and this time the off gate current generation circuit 23 operates using the direct current power supply 25 as a drive power supply, and the GT
A current of opposite polarity is applied to the gate of the O thyristor 33 to cause GT.
The O thyristor 33 is turned off. Note that the specific circuit configuration of the off-gate current generation circuit 23 is not directly related to the present invention, so is not shown.

A snubber circuit 35 and a free wheeling diode 36 are connected in parallel to the GTO thyristor 33.

[0010]

In the GTO thyristor drive circuit described above, the GTO thyristor 33 is turned off and turned on with one signal. That is, the GTO thyristor 33 is turned on at the rising of the ON signal 34, and the GTO thyristor 33 is turned off at the falling of the ON signal 34.

In such a configuration in which the turn-on and turn-off of the GTO thyristor 33 are controlled by the rising and falling of a single signal, the GTO thyristor 33 is used as a holding circuit in a circuit in which intermittent DC current flows. In this case, that is, in the case where the GTO thyristor 33 is turned off when the intermittently flowing DC current becomes excessive, a serious problem as described below occurs.

When the GTO thyristor 33 is turned on and off in response to the interruption of the direct current by causing the on-gate current and the off-gate current to flow through the GTO thyristor 33 in synchronization with the interruption of the direct current flowing to the GTO thyristor 33, when the GTO thyristor 33 is turned on and off. It is necessary to set the minimum off period in terms of characteristics, and there is a limit in operating characteristics. In other words, it cannot be applied to intermittent energization of direct current in which the time until the next current flows after the current is cut off is shorter than the minimum off time. In such a circuit configuration, the intermittent period of the DC current flowing through the GTO thyristor 33 is limited by the minimum off time, which makes it difficult to realize the circuit configuration.

Hereinafter, with reference to FIG. 5, it will be described in detail that the above-mentioned configuration limits the intermittent period of the direct current to the minimum off time. FIG. 5 is a waveform diagram of each part when the on-gate current and the off-gate current are made to flow in the GTO thyristor 33 in synchronization with the intermittent DC current as described above, and FIG. 5A shows the waveform synchronized with the intermittent DC current. The synchronized pulse, that is, the ON signal 34, is shown in FIG.
The gate current flowing through the TO thyristor 33 is shown.

Next, the operation of the GTO thyristor drive circuit shown in FIG. 3 will be described with reference to FIG. As shown in FIG. 5A, the ON signal 34 synchronized with the intermittent DC current is at time t.
_When it rises at ₁ , the switch elements 29 and 30 of FIG. 3 are turned on at the same time, and a gate current larger than that in the steady state flows through the gate of the GTO thyristor 33, as shown in FIG. 5B.

At time t ₂ thereafter, the switch element 29 is turned off, and the steady gate current flows through the GTO thyristor 33. The period in which the steady gate current is flowing continues until time t ₃ , and the current flowing at this time is the on-gate current I _ON . When the ON signal 34 falls at time t ₃ , the ON gate current I _ON disappears and the _OFF gate current I _OFF flows, which continues until time t ₄ .

When the ON signal 34 rises again at the time t ₅ , the _ON gate current I _ON flows as in the time between the times t ₁ and t ₃ . When the ON signal 34 falls at time t ₆ , the ON gate current I _ON disappears and the _OFF gate current I _OFF flows, which continues until time t ₈ . This off period T ₂ is G
Due to the characteristics of the TO thyristor 33, the minimum off period is set, and when the low level period T ₁ of the on signal 34 is shorter than the off period T ₂ , that is, when the on signal 34 rises at time t ₇ before time t _8. , The GTO thyristor 33 cannot be supplied with the on-gate current, and the GTO thyristor 33 cannot be turned on.

Therefore, an object of the present invention is to provide a GTO thyristor drive circuit capable of supplying an intermittent DC current to a GTO thyristor without the intermittent cycle being restricted by the minimum off time.

[0018]

A GTO thyristor drive circuit according to the present invention drives a GTO thyristor which causes an intermittent DC current to flow, and includes an on-gate current generating circuit, a one-shot circuit, a latch circuit, and an off-gate current generating circuit. Consists of. The on-gate current generating circuit is composed of a steady gate current generating circuit for supplying a steady gate current to the GTO thyristor and a high gate current generating circuit for supplying a high gate current to the GTO thyristor. The one-shot circuit operates the high gate current generation circuit for a fixed time each time an ON signal is generated in synchronization with the intermittent rise of the DC current. The latch circuit operates the steady gate current generation circuit in response to the generation of the ON signal, and stops the operation of the steady gate current generation circuit in response to the generation of the OFF signal independent of the ON signal. The off-gate current generation circuit supplies an off-gate current to the GTO thyristor in response to the off signal.

[0019]

According to the structure of the present invention, when the ON signal synchronized with the intermittent DC current is generated, the latch circuit operates and the steady gate current generating circuit is continuously operated to keep the steady gate current in the GTO thyristor. The ON state of the GTO thyristor is maintained by flowing the high gate current to the GTO thyristor, and the one-shot circuit operates each time the ON signal is generated to operate the high gate current generating circuit for a fixed time to flow the high gate current to the GTO thyristor.

That is, when the intermittent DC current starts to flow, the steady gate current is continuously supplied, and the high gate current is supplied each time the DC current rises. This steady gate current continues until the off signal is generated and the latch circuit is restored, and in response to the generation of the off signal independent of the on signal, the off gate current generation circuit operates to flow the off gate current to the GTO thyristor, Turn off the GTO thyristor.

[0021]

1 is a circuit diagram of a GTO thyristor drive circuit according to an embodiment of the present invention. In FIG. 1, a GTO gate drive circuit 1 includes an on-gate current generation circuit 2 for supplying an on-gate current to a GTO thyristor 14, an off-gate current generation circuit 3 for similarly supplying an off-gate current to the GTO thyristor 14, and a DC power supply 4 for supplying them. 5, a one-shot circuit 6 including, for example, a monostable multivibrator, and a latch circuit 7 including, for example, a bistable multivibrator.

The on-gate current generating circuit 2 comprises resistors 8 and 9 for limiting current and switch elements 10 and 11, and the resistor 8 and the switch element 10 constitute a high gate current generating circuit 12 for flowing a high gate current to the GTO thyristor 14. The resistor 9 and the switch element 11 form a steady gate current generation circuit 13 that allows a steady gate current to flow through the GTO thyristor 14.

As the switch elements 10 and 11,
For example, a field effect transistor or the like is used as in the already proposed example. Further, the resistance value of the resistor 8 is set smaller than the resistance value of the resistor 9 so that a relatively large current can be passed through the gate of the GTO thyristor 14. The on-gate current generation circuit 2 includes a GTO thyristor 14
When the ON signal 15 for
0 and 11 are turned on at the same time. The ON signal 15 is G
The TO thyristor 14 is composed of a synchronizing pulse synchronized with the intermittent DC current to be passed.

The switch element 10 of the high gate current generating circuit 12 maintains the ON state only for a certain time (about 10 to 20 μsec) after the ON signal 15 rises because the one-shot circuit 6 operates when the ON signal 15 rises. Then turn off. In addition, the switch element 11 of the steady gate current generation circuit 13 maintains the ON state continuously even if the ON signal 15 disappears after that because the latch circuit 7 operates once the ON signal 15 rises. When the off signal 16 independent of the signal rises, the latch circuit 7 is restored and turned off. The off signal is generated when it is necessary to turn off the GTO thyristor 14 for protection or the like.

When the switch element 11 is turned on, the GTO from the DC power source 4 is passed through the resistor 9 and the switch element 11.
A steady gate current flows through the gate of the thyristor 14. When the switch element 10 is turned on, a high gate current flows from the DC power supply 4 to the gate of the GTO thyristor 14 through the resistor 8 and the switch element 10. Therefore, every time the ON signal 15 rises, the steady gate current plus the high gate current flows for a fixed time immediately thereafter, and only the steady gate current flows after the lapse of the fixed time, and the OFF signal rises in this state. Will continue until.

It should be noted that the GT from the DC power source 4 through the resistor 8
It goes without saying that the high gate current flowing in the gate of the O thyristor 14 and the steady gate current flowing in the gate of the GTO thyristor 14 through the resistor 9 flow at the same level as in the previously proposed example. Also, GTO thyristor 1
4, a snubber circuit 17 and a free wheeling diode 18 are connected in parallel.

In the GTO thyristor driving circuit of this embodiment, when the ON signal 15 synchronized with the intermittent DC current is generated, the latch circuit 7 operates to continuously operate the steady gate current generating circuit 13 and the GTO thyristor 14 A steady gate current is continuously supplied to the GTO thyristor 14 to maintain the ON state, and each time the ON signal 15 is generated, the one-shot circuit 6 operates to operate the high gate current generating circuit 12 for a certain period of time so as to operate the GTO. A high gate current is passed through the thyristor 14.

That is, when the intermittent DC current starts to flow, the steady gate current is continuously supplied, and the high gate current is supplied each time the DC current rises. This steady gate current continues until the off signal 16 is generated and the latch circuit 7 is restored, and in response to the generation of the off signal 16 which is independent of the on signal 15, the off gate current generation circuit 3 operates and G
An off-gate current is passed through the TO thyristor 14 to turn off the GTO thyristor 14.

FIG. 2 is a waveform diagram of each part when the on-gate current and the off-gate current are made to flow through the GTO thyristor 14 in synchronism with the intermittent DC current as described above. Indicates the flowing direct current,
FIG. 3B shows a synchronizing pulse, that is, an ON signal 15, which is synchronized with the intermittent DC current, FIG. 3C shows an OFF signal 16, and FIG. 3D shows a gate current flowing in the GTO thyristor 14. There is.

Next, the operation of the GTO thyristor drive circuit shown in FIG. 1 will be described with reference to FIG. When the DC current is intermittent as shown in FIG. 2A, when the ON signal 15 as shown in FIG. 2B which is synchronized with the intermittent DC current rises at time t ₁ , the switching element 10 of FIG. 11 are turned on at the same time, and as shown in FIG. 2D, an on-gate current larger than that in the steady state flows through the gate of the GTO thyristor 14.

At time t ₂ thereafter, the switch element 10 is turned off and only the steady gate current flows through the GTO thyristor 14. During the period in which the steady gate current is flowing, the time t ₉ when the off signal 16 is generated as described later.
Continues until. The ON signal 15 falls at time t ₃ , but after that, the steady gate current continues to flow, and when the ON signal 15 rises again at time t ₄ , the switch element 10 is turned ON again, and the gate of the GTO thyristor 14 is turned on. More on-gate current than usual flows again, and at time t ₅ , the switch element 10 is turned off, and the high gate current disappears.
Only the steady gate current flows through the TO thyristor 14. The ON signal 15 falls at time t ₆ . The times t ₇ and t ₈ are the same as the times t ₄ and t ₅ .

At time t ₉ thereafter, when the off signal 16 rises as shown in FIG. 2C, the switch element 11 is turned off and the steady gate current disappears, and the off gate current flows to the GTO thyristor 14. The GTO thyristor 14 is turned off. As described above, according to this GTO thyristor drive circuit, the OFF signal 16 is provided independently of the ON signal 15, and the latch circuit 7 is operated in response to the generation of the ON signal 15 to cause the GTO thyristor 14 to have a steady gate. A current is continuously supplied to maintain the ON state of the GTO thyristor 14, and each time the ON signal 15 is generated, the one-shot circuit 6 is operated to flow a high gate current and latched in response to the generation of the OFF signal 16. The circuit 7 is restored to cut off the steady gate current of the GTO thyristor 14, and at the same time, the off gate current is passed through the GTO thyristor 14 to turn off the GTO thyristor 14, so that the GTO thyristor 14 is turned off during the period when the intermittent DC current is flowing. The ON state of the thyristor 14 is maintained, and a high gate current is required at each rising of the required DC current. It can flow bets current.

As a result, the intermittent DC current can flow through the GTO thyristor 14 without the intermittent cycle being restricted by the minimum off time.

[0034]

According to the GTO thyristor drive circuit of the present invention, the OFF signal is provided independently of the ON signal, and the latch circuit is operated in response to the generation of the ON signal to maintain the steady gate current in the GTO thyristor. Flow through the GTO thyristor to maintain the ON state of the GTO thyristor, operate the one-shot circuit every time the ON signal is generated to flow the high gate current, and restore the latch circuit in response to the generation of the OFF signal to restore the GTO. Since the steady gate current of the thyristor is cut off and the GTO thyristor is turned off by supplying the off-gate current to the GTO thyristor, the ON state of the GTO thyristor is maintained while the intermittent DC current is flowing, and the gate is kept. A high gate current can be made to flow at every rising of a direct current, which requires a large amount of current.

As a result, the intermittent DC current can flow through the GTO thyristor without the intermittent cycle being restricted by the minimum off time.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a GTO thyristor drive circuit according to an embodiment of the present invention.

FIG. 2 is a time chart of each part showing the operation of the GTO thyristor drive circuit of FIG.

FIG. 3 is a circuit diagram showing a configuration of an already proposed example of a GTO thyristor drive circuit.

FIG. 4 is a time chart showing a pattern of high gate driving.

5 is a time chart of each part showing the operation of the GTO thyristor drive circuit of FIG.

[Explanation of symbols]

 1 GTO thyristor drive circuit 2 On-gate current generation circuit 3 Off-gate current generation circuit 4, 5 DC power supply 6 One-shot circuit 7 Latch circuit 8, 9 Resistor 10, 11 Switch element 12 High gate current generation circuit 13 Steady gate current generation circuit 14 GTO thyristor 15 ON signal 16 OFF signal 17 Snubber circuit

Claims (1)

[Claims] 1. A GTO thyristor drive circuit for driving a gate turn-off thyristor (hereinafter abbreviated as GTO thyristor) which supplies intermittent DC current, comprising a steady gate current generation circuit for supplying a steady gate current to the GTO thyristor, and the GTO. An on-gate current generating circuit composed of a high gate current generating circuit for supplying a high gate current to a thyristor, and a one-shot circuit for operating the high gate current generating circuit for a fixed time each time an ON signal synchronized with the rising of the intermittent DC current is generated. A latch circuit for operating the steady gate current generation circuit in response to the generation of the on signal and stopping the operation of the steady gate current generation circuit in response to the generation of an off signal independent of the on signal; An off-gate current is passed through the GTO thyristor in response to a signal being generated. GTO thyristor drive circuit that includes a off-gate current generating circuit.