JPH05122268A - Inter-equipment signal circuit - Google Patents

Abstract

PURPOSE:To attain normal power-on/off for each device even when a control power of a signal transmission control circuit is not supplied by setting each device to the local mode. CONSTITUTION:The inter-equipment signal circuit is made up of n-sets of signal transmission circuits 5-1-5-n, n-sets of signal reception circuits 6-1-6-n, a power-on reset circuit 3 and a signal latch circuit 2. Power is supplied to each device when relay contacts rl2-1-rl2-n are closed and power is interrupted from each device when they are opened. When switches SW2-1-SW2-n are once opened, a route for supplying a current to relay coils RL2-1-RL2-n is lost and the relay contacts rl2-1-rl2-n are opened, then power of each device is interrupted. Thus, even when no VCC1 is in existence, normal power on/off is attained by having only to set each device to the local mode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inter-device signal circuit, and more particularly to an inter-device signal circuit for connecting devices having different power supplies.

[0002]

2. Description of the Related Art A conventional inter-device signal circuit of this type is shown in FIG.
As shown in FIG. 3, the signal transmitting circuits 50-1 to 50-n, the signal receiving circuits 60-1 to 60-n, and the power-on reset circuit 30 are included. Signal receiving circuits 60-1 to 60
Each device having -n has a relay contact rl _2-1
When ~rl _2-n is closed has become as to power-on, has become as to the power off when the contact rl _2-1 ~rl _2-n relays are open. Also, V _ec1 and V _ec2 are separate power supplies, but the voltage values are at the same level.

Next, the operation will be described with reference to FIG.

[0004] (1) 2-way switch SW _3-1 ~SW _3-n wherein R side when V _cc2 → commissioning V _cc1 in the order of V _cc1 rise POR (remote mode)
^* POW ON1 to PO with "L" → "H"
When the W ONn signal is “L” → “H” → “L”, it is once “H”
Then, the ICs Z _{6-1 to} Z _6-n and Z _{3-1 to} Z _3-n are turned on once, and the relay switches RL _{2-1 to} RL _2-n are connected to the dual switches SW _{3-1 to} SW _{3 respectively. A} current once flows through _{-n and} the nodes rl _{2-1 to} rl _{2-n of the} relay close. Relay contact r
When l _{2-1 to} rl _2-n are closed, each device is powered on.

Next, POW OFF ^* 1 to POW OF
F ^* n signal, if a state in which the state does not put out clogging power-off signal of the signal of the EPO ^* 1~EPO ^* n is "H" I
CZ _{2-1 to} Z _2-n are in the ON state, so the relay coil R
L _{2-1 to} RL _2-n → current continues to flow through the double switches SW _{3-1 to} SW _{3-n on} the b side → IC Z _{2-1 to} Z _2-n . Therefore, each device unit continues to be in the power-on state. If V _cc1 disappears in this state, IC Z _{2-1 to} Z
_2-n turns off, so relay coil RL _{2-1 to} RL _2-n
There is no loop in which current flows to the relay contact rl _2-1
Since ~ rl2 _-n is opened, each device is powered off.

[0006] (2) 2-way switch SW _3-1 ~SW _3-n is the L-side start-up in the order of V _cc2 → V _cc1 when the (local mode), V _cc1 is rising POR ^*
SW _1-1 to SW when the signal changes from "L" to "H"
Once closed the _1-n, if EPO ^* ~EPO ^* n signal is "H" state to state, that EPO ^* signal is not issued (the device apparatus is a signal to the power-off regardless of the remote / local) of, IC Z _{4-1 to} Z _4-n , Z
_{1-1 to} Z _1-n are on, so relay coil RL _2-1
To RL _2-n , double switch SW _{3-1 to} SW _3-n a side →
Current once flows through the switches SW _{1-1 to} SW _1-n → IC Z _{1-1 to} Z _1-n , and relay contacts rl _{2-1 to} rl
_2-n closes. The relay contacts rl _{2-1 to} rl _2-n close. When the contacts rl _{2-1 to} rl _{2-n of the} relay are closed, each device is powered on.

[0007] Next, EPO ^* 1~EPO ^* n signal is "H"
In the case of the state, IC Z _{4-1 to} Z _4-n , Z _{1-1 to} Z _1-n
Is on, relay coils RL _{2-1 to} RL _2-n →
Relay contacts rl _{2-1 to} rl _2-n → 2 switches SW
B side of _{3-1 to} SW _3-n → switch SW _{2-1 to} SW _2-n →
IC Z _1-1 current continues to flow through to Z _1-n. Therefore, each device unit continues the power-on state.

If V _cc1 disappears in this state, IC Z
_1-1 ~ Z _1-n turns off, so relay coil RL _2-1 ~
Since the loop through which the current flows in RL _2-n disappears and the relay contacts rl _{2-1 to} rl _2-n open, each device unit is powered off. Also, switch SW without V _cc1
Even _if you close _{1-1 to} SW _1-n once, Z _{1-1 to} Z _1-n are off, so there is no loop through which current flows in the relay coils RL _{2-1 to} RL _2-n . The contacts rl _{2-1 to} rl _2-n are not closed. Therefore, each device cannot be powered on.

[0009]

In the above-mentioned conventional inter-device signal circuit, when each device is in the power-on state,
If the control power supply for the signal transmission circuit is accidentally turned off, there is a drawback in that all the device units are powered off.

Further, there is a drawback in that the power cannot be turned on / off even if each device is set to the local mode unless the power source for controlling the signal transmission circuit is turned on, such as when the device is maintained.

[0011]

SUMMARY OF THE INVENTION A signal holding circuit of the present invention comprises a first input terminal for inputting a power-on reset signal for releasing reset at an allowable operating voltage or higher, and an emitter connected to a power source to connect the base to the first input terminal. First connected to the input terminal of
PNP transistor, a first NPN transistor having a base connected to the collector of the first PNP transistor and having a grounded emitter, and a first NPN transistor having one end connected to a power supply and the other end connected to the collector of the first NPN transistor. , A second resistor whose one end is connected to the other end of the first resistor, a second PNP transistor whose collector is connected to the other end of the second resistor, and the number of signals to be retained, respectively. A plurality of input terminals for input and all cathodes for the number of signals to be held are connected to the emitter of the second PNP transistor, and individual anodes are connected to the plurality of input terminals for the number of signals to be held. A diode, a third resistor whose one end is connected to the base of the second PNP transistor, and a base whose collector is the collector of the first NPN transistor. A second NPN transistor with an emitter installed, the collector of which is connected to the other end of the third resistor; a relay contact whose one end is connected to the emitter of the second PNP transistor and the other end of which is installed; It is characterized by being composed of a relay coil which is connected to a power source and whose multiple ends are grounded.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which n signal transmitting circuits 5-1 to 5-n, n signal receiving circuits 6-1 to 6-n, and power are provided. ON reset circuit 3
And a signal holding circuit 2. Signal receiving circuit 6-1
6-n exist in each device, and the signal transmission circuit 5
-1 to 5-n, the power-on reset circuit 3, and the signal holding circuit 2 form a signal transmission control circuit 4. Each device apparatus, when the relay contact rl _2-1 ~rl _2-n are closed and turned as to power-on, the contacts of the relay rl _2-1 ~
When rl2 _-n opens, it turns off the power.

The operation will be described below with reference to the time chart shown in FIG.

[0015] V _cc2 → commissioning in order of V _cc1, the V _cc1 reaches Oite V _{1 at} time t _1, PNP transistor to Q ₁ power-on reset circuit 3 and the signal holding circuit 2,
Q ₃ and the NPN transistors Q ₂ and Q ₄ are in an operable state. When V _cc1 reaches the operation start voltage V ₂ of the relay, the contact rl ₁ of the relay breaks from the make, and V _cc1
There Upon reaching _{IC Z 1-1 ~Z 1-n,} Z 2-1 ~Z 2-n operation starting voltage V ₃ of, POR ^* signal is being reset "L" and is therefore, IC Z _{1 -1 to} Z _1-n and Z _{2-1 to} Z
_2-n turns on.

Next, since the POR ^* signal continues to be reset for a certain period of time T even after V _cc1 reaches V ₃ , it is "H".
During that period, no current flows from the emitter of the PNP transistor Q ₁ to the base thereof, so that the PNP transistor Q ₁ is off from the time t ₁ to t ₂ . PNP transistor Q ₁
But from the time t ₁ since the current does not flow and is turned off from the base of the NPN transistor Q ₂ to the emitter of the t ₂ NP
N transistor Q ₂ is off. When the NPN transistor Q ₂ is off, the NPN transistor Q ₄
Since there is a route in which a current flows from the base of the transistor through the emitter, the PNP transistor Q ₃ and the NPN transistor Q ₄ are in the ON ENABLE state from time t _{1 to} t ₂ . POR signal past the time t ₂ releases the reset PNP transistor Q ₁ to become the "L" is turned on, also turned on NPN transistor Q _2.

(1) When the double switches SW _{3-1 to} SW _3-n are on the R side (remote mode) At time t ₃ , the POW ON1 to POW ONn signals are "L" → "H" → "L". Once it goes to "H", IC
Z _{6-1 to} Z _6-n and Z _{3-1 to} Z _3-n are turned on once, and the relay switches RL _{2-1 to} RL _2-n are connected to the double switch SW _3-1.
~ A side of SW _3-n → current once flows through IC Z _{3-1 to} Z _3-n , and contacts rl _{2-1 to} rl _{2-n of} the relay are closed, so that each device turns POW ON.

Next, POW OFF ^* 1 to POW OF
F ^* n signal, if in a state that does not issue a state, that is power-off signal of EPO ^* 1~EPO ^* n signal is "H",
Since the ICZ _{2-1 to} Z _2-n are in the ON state, the relay coils RL _{2-1 to} RL _2-n → the relay contacts rl _{2-1 to} rl _2-n
→ Double switch b side of SW _{3-1 to} SW _3-n → IC Z
Current continues to flow through _{2-1 to} Z _2-n . Therefore, each device unit continues the power-on state.

In this state, when V _cc1 disappears and the _voltage rises again, when V _cc1 drops to V _{3 at} time t ₄ , the POR signal starts resetting and becomes "H", P
The NP transistor Q ₁ is turned off and the NPN transistor Q ₂ is also turned off. At this time, the PNP transistor Q ₃ and the NPN transistor Q ₄ are ON ENABL
The state becomes E, and the relay coil RL _{2-1 to} Z _2-n → relay contact rl _{2-1 to} rl _2-n → dual switch SW _3-1 to
SW _3-n of b-side → the diode D _1-2 ~D _n-2 → Because the current flows from the emitter of the PNP transistor Q ₃ through the base → resistor R _3, PNP transistors Q ₃ and NPN
The transistor Q ₄ turns on. Where R ₄ is Q ₁
Reference numeral ₅ is a bypass resistor for preventing Q ₃ from accidentally turning on, and R ₆ and C are bypass resistors and bypass capacitors for preventing Q ₃ from accidentally turning on.

Next, when V _cc1 drops to the minimum operating voltage V ₄ of the relay at time t ₅ , the contact rl of the relay closes. At this time, the PNP transistor Q ₃ and the NPN transistor Q ₄ do not operate (turn off), so that the current that has been flowing continues to flow while changing the route to the relay contact rl _{1 of} the NPN transistor Q ₃ → resistor R ₃ → NPN transistor Q _4. ..

[0021] Then a V _cc1 again at start-up time t ₆ when V _cc1 reaches V _2, contact rl ₁ relays a break from the make. At this time, as described above, the PNP transistor Q ₃ and the NPN transistor Q ₄ are ON ENA.
Since IC Z _{2-1 to} Z _2-n are in the BLE state and have not reached the operation start voltage, the current flowing through the contact rl ₁ of the relay changes its route from PNP transistor Q _{3 to} NPN transistor Q ₄ and flows. to continue.

Therefore, even if V _cc1 disappears and the device units rise again when the device is in the power-on state, there is a loop in which a current flows through the relay coils RL _{2-1 to} RL _2-n , and the relay contact rl _2-1. ~ Rl _2-n keeps the make state, and each device unit normally continues the power-on state.

(2) When the double switches SW _{3-1 to} SW _3-n are on the L side (local mode) At time t ₃ , SW _{1-1 to} SW _1-n are once closed.
EPO ^* 1~EPO ^* n signal state, that is EP of the "H"
O ^* signal (the device apparatus remote / local power off to cause the signal irrespective) have not state a long if IC Z _4-1 ~Z _4-n which issued, since Z _1-1 ~Z _1-n which is turned on Relay coils RL _{2-1 to} RL _2-n have a double switch on the side of SW _{3-1 to} SW _3-n → switches SW _{1-1 to} SW 1
_-n → ICZ _{1-1 to} Z _1-n , current once flows and the relay contacts rl _{2-1 to} rl _2-n close. Relay contact r
When l _{2-1 to} rl _2-n are closed, each device is powered on.

[0024] Next, EPO ^* 1~EPO ^* n signal is "H"
In the state of, IC Z _{4-1 to} Z _{4- n} , Z _{1-1 to} Z _1-n
Is on, relay coils RL _{2-1 to} RL _2-n →
Relay contacts rl _{2-1 to} Z _2-n → Double switch SW _3-1
~ SW _3-n b side → switch SW _2-1 ~ SW _2-n → IC
Current continues to flow through Z _{1-1 to} Z _1-n . Therefore, each device unit continues the power-on state.

In this state, the operation when V _cc1 disappears and rises again is as described above in (1) _Dual switch SW _{3-1 to} S-S.
The time t ₄ is the same as when W _3-n is on the R side (remote mode).
To t ₅ are PNP transistor Q ₃ → NPN transistor Q ₄ , and times t _{5 to} t ₆ are relay contacts rl ₁ and time t _6.
At _{~ t 7} , there is a route for current to flow from the PNP transistor Q _{3 to the} NPN transistor Q ₄ , so that even if V _cc1 disappears and the device rises again in a power-on state, the relay coil RL _2- There is a loop through which current flows from _{1 to} RL _2-n , and relay contacts rl _{2-1 to} Z _2-n
Holds the make state, and each device unit normally continues the power-on state.

In addition, the switch SW _1-1 without V _cc1
~ Once SW _1-n is closed, relay coil RL _2-1 ~
RL _2-n has dual switches SW _{3-1 to} SW _3-n on a side → switches SW _{1-1 to} SW _1-n → diodes D _{1-1 to} D _n-1
→ Current flows through the relay contact rl ₁ and the relay contacts rl _{2-1 to} rl _2-n are closed. Relay contact rl _2-1
~ Rl _2-n closed, relay coil RL _2-1 ~ RL
_2-n → relay contact rl _{2-1 to} rl _2-n → dual switch SW _{3-1 to} SW _3-n b side → switch SW _{2-1 to} SW
_2-n → diode D _{1-1 to} D _n-1 → relay contact rl ₁
Since the current continues to flow through the devices, each device remains in the power-on state.

Next, once the switches SW _{2-1 to} SW _2-n are opened, there is no route for the current to flow through the relay coils RL _{2-1 to} RL _2-n , and the relay contacts rl _{2-1 to} rl.
_2-n opens, so each device will be powered off. Therefore, even when there is no _Vcc1 , power can be properly turned on / off by setting each device in the local mode.

[0028]

As described above, according to the present invention, the resistance and N
By combining a PN transistor, a PNP transistor, a capacitor, a relay, a diode, and a thyristor, when each device is in a power-on state, the control power supply of the signal transmission control circuit is erroneously turned off. Even in the case of the above, each device has an effect that it can be kept in the power-on state without being turned off.

Further, if each device unit is set in the local mode, each device unit can be normally powered on / off without turning on the control power source of the signal transmission control circuit. There is an effect that can improve the sex.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is an operation time chart of the present invention.

FIG. 3 is a circuit diagram showing a conventional example.

[Explanation of symbols]

Z _{1-1 to} Z _1-n , Z _{6-1 to} Z _6-n IC SW _{1-1 to} SW _1-n , SW _{2-1 to} SW _2-n switch SW _{3-1 to} SW _3-n 2 Series switch RL ₁ , RL _{2-1 to} RL _2-n Relay coil rl ₁ , rl _{2-1 to} rl _2-n Relay contacts D _n-1 , D _{1-2 to} D _n-2 diode Q ₂ , Q ₄ NPN transistors Q _1, Q ₃ PNP transistor R ₁ to R ₆ resistance 1,1-1, ... n-1,1-2, ... n-2 terminal 2 signal holding circuit 3, 30 power-on reset circuit 4, 40 signal transmission control circuit 5-1 to 5-n, 50-1 to 50-n signal transmission circuit c capacitor 6-1 to 6-n, 60-1 to 60-n signal reception circuit

Claims (1)

[Claims] 1. A first input terminal for inputting a power-on reset signal for releasing reset at an allowable operating voltage or higher, and a first PNP transistor having an emitter connected to a power supply and a base connected to the first input terminal. A first NPN transistor having a base connected to the collector of the first PNP transistor and having a grounded emitter; a first resistor having one end connected to a power supply and the other end connected to the collector of the first NPN transistor; A second resistor having one end connected to the other end of the first resistor, and a second PN having a collector connected to the other end of the second resistor
The P-transistor, a plurality of input terminals for inputting the number of signals to be retained, and all the cathodes for the number of signals to be retained are connected to the second PN.
A plurality of diodes connected to the emitter of the P-transistor and having respective anodes respectively connected to the plurality of input terminals for the number of signals to be held, and a third resistor having one end connected to the base of the second PNP transistor, A second NPN transistor with an emitter installed, the base of which is connected to the collector of the first NPN transistor and the collector of which is connected to the other end of the third resistor; and one end of which is connected to the emitter of the second PNP transistor An inter-device signal circuit comprising a relay contact with one end installed and a relay coil with one end connected to a power supply and the other end grounded.