JPH05113802A - Signal controller - Google Patents

Abstract

PURPOSE:To obtain the signal controller which stabilizes negative feedback at the time of automatic adjustment even the time constant of a control system for the negative feedback is set sufficiently large and reduces the circuit scale and power consumption, and is suitable for, specially, white balance adjustment. CONSTITUTION:When a comparison part 106 compares the detection output of a detection part 107 detecting the operation state of a driven object 104 like an image receiving tube with a reference value to obtain an error signal and a signal control part 103 is applied with the error signal to perform negative feedback control, the error signal is passed through a time control part 105 to vary its time characteristics and then the signal is inputted to the signal control part 103 to perform the control.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention detects a state of a signal supplied to a controlled object, feeds back an error signal between the detected value and a reference value, and controls a signal supplied to the controlled object. The present invention relates to a signal control device in which, when controlling, the error signal is not immediately fed back to the control section, but the error signal is subjected to control of its temporal characteristics and then fed back to the control section.

The control target is a character graphic display, a television receiver, a display typified by a monitor, or the like, which enables good image quality control even when noise is mixed in the feedback control system. It aims at such things.

[0003]

2. Description of the Related Art Now, as a description of the prior art, a description will be given below in accordance with a concrete example. With regard to color receivers, the white balance adjustment that was conventionally performed at the time of factory shipment may change after a long time of use due to the effects of secular changes such as cathode emission of the picture tube and circuit drift. There was a problem that it was easy.

2 and 3 are block diagrams of a conventional automatic white balance adjusting circuit for detecting a change in the white balance in such a receiver and restoring it based on the change (the details of this prior art are shown). Is Japanese Patent Application No. 1-292280
And Japanese Patent Application No. 2-278985).

FIGS. 2 and 3 are block diagrams showing a conventional automatic white balance adjustment circuit when they are connected and integrated at the broken line. In these figures, input terminals 1R, 1
R (red), G (green), B input to G and 1B respectively
The (blue) primary color signals are the signal combining circuits 8R and 8R, respectively.
Variable gain amplifier circuit 1 for drive adjustment via G and 8B
Video output circuit 11 amplified by 0R, 10G, 10B
It is further amplified by R, 11G, and 11B to an amplitude capable of driving the picture tube.

After that, the primary color signals are level-shifted by the level correction circuits 12R, 12G, 12B for cutoff adjustment, and passed through the cathode current detection circuits 9R, 9G, 9B to the cathode terminals 7R, 7G, of the picture tube 6. Added to 7B. The automatic white balance adjustment operation performed at that time will be described below.

Signal generation circuit 2 for automatic white balance adjustment
Uses the horizontal and vertical blanking pulses input to the input terminals 3H and 3V, respectively, to generate the following signals. The white balance adjustment reference signal (two types for cutoff adjustment and drive adjustment) output via the reference signal line 4 is synchronized with the reference signal output via the gate signal lines 5 and 77 and 78. It is a gate pulse.

Of these generated signals, the reference signal output via the reference signal line 4 and the gate pulse output via the gate signal line 5 are the signal synthesizing circuits 8R, 8G and 8B, respectively. It is supplied to the switch circuit 15.
Focusing on the B primary color signal system, the cathode current detection circuit 9
A comparator which detects voltage proportional to the cathode current from the cathode 7B flowing into the emitter of the transistor 209 in B is used both at the time of drive adjustment and at the time of cutoff adjustment via the cathode current detection signal line 30B. In the writing, it means a comparator or an OP amplifier) 16B.

In the level correction circuit 12B, the clamping voltage source 201 whose level is controlled to a voltage substantially equal to the cutoff adjustment voltage is connected to the base of the clamp transistor 203 via the clamp switch 202, so that the coupling capacitor 204 is connected. The picture tube side of is clamped.

In synchronism with the timing when the video signal becomes the cutoff adjustment voltage, the discharge current flowing through the coupling capacitor 204 during the clamp period when the clamp switch 202 is closed is used as the return current between the emitter and collector of the transistor 203. This eliminates fluctuations in the clamp level due to leakage of the discharge current into the peripheral circuits.

The resistor 205 functions to raise the base voltage of the transistor 203 to the power supply voltage 206 connected to one end of the resistor 205 during the unclamping period when the switch 202 is opened. Therefore, when unclamped, a reverse voltage is applied to the diode 207 and the emitter of the transistor 203 is cut off from the coupling capacitor 204. The diode 208 is a protection diode that guarantees a reverse breakdown voltage condition between the base and the emitter of the transistor 203 during unclamping or discharge of the picture tube.

During cutoff adjustment, the switch circuit 74
B selects the output of the comparator 16B, and by the negative feedback action,
The optimum adjustment level in the level correction circuit 12B for cutoff adjustment is determined. Further, the output of the comparator 16B is taken in by the signal generating circuit 2 for the automatic white balance adjustment, and is stored in the built-in storage section if necessary. After the adjustment is completed, the switch circuit 74B is inverted to select the control signal stored in the storage section, which is output via 80B, and outputs the selected control signal to the control line 20B.

The switch circuit 73 is also used during drive adjustment.
The optimum adjustment gain is determined in B, the comparator 16B, the signal generating circuit 2 for automatic white balance adjustment, and the variable gain amplifying circuit 10B for drive adjustment, and the same operation is performed. Here, the comparison voltage sources 21 and 22 are switched and used to control the cathode currents at the cutoff adjustment and the drive adjustment to the specified values, respectively. The above actions are R and G
The same applies to the primary color signal circuit of.

Further, the reference voltage sources 21 and 22 are commonly used for the comparators 16R, 16G and 16B corresponding to the three primary color signals. By setting the value of the cathode current detection resistor 210 connected to the inverting terminal (−) of each of these comparators to a predetermined ratio required for the three primary color signals, the cathode of each primary color is The current can be controlled to the predetermined ratio required to maintain white balance.

In other words, the white balance is controlled by controlling the cathode current of each primary color of the picture tube 6 at the time of inserting the reference signal from the signal generating circuit 2 through the signal synthesizing circuit 8 to a constant value at a predetermined ratio. Can be stabilized.

[0016]

In the conventional automatic white balance adjusting circuits shown in FIGS. 2 and 3, the cathode current is detected and compared with a reference value, and the error signal is fed back to control the cathode current. By doing so, white balance adjustment is performed, but at that time, if noise generated in the surroundings mixes in the cathode current detection line, there is a problem in that control stability cannot be maintained.

In particular, the time constant around the hold capacitor used to sample and hold the detected cathode current value is increased within the period of the negative feedback control for white balance adjustment to stabilize the negative feedback control (feedback control). Even if an attempt is made to realize this, since the time constants of the clamping voltage source 201 and the cathode current detection unit of the level correction circuit are large, the phase delay becomes excessive and the negative feedback control becomes unstable.

Further, since the synchronous clamp system synchronized with the above clamp switch 202 is used, it is necessary to switch the base of the clamp transistor 203 with a high-speed pulse of about 50 V, and an increase in circuit scale and power consumption cannot be avoided. There was also a problem.

The object of the present invention is, of course, useful for solving the above-mentioned various problems described with respect to the conventional automatic white balance adjusting circuit, but similar problems may occur in other techniques. It is an object of the present invention to provide a signal control device useful for solving the above problem.

[0020]

In order to achieve the above object, the present invention has an input terminal, an output terminal and a control terminal, and a signal to be supplied from a signal source to a controlled object is input from the signal source. And a signal control unit that outputs to the control target through the output terminal after performing control according to the control signal that is input via the control terminal,

With the signal supplied to the controlled object, a detection unit for detecting the state of the signal after being controlled by the signal control unit is compared with a detection output by the detection unit and a reference value to obtain an error signal. A comparison section to output,

Prior to applying the error signal from the comparison section to the control terminal of the signal control section, a time control section that controls the time characteristic of the error signal and then applies the control signal to the control terminal is used as a signal control device. Configured.

In other words, control of an input signal to a target such as a character graphic display, a television receiver, a display typified by a monitor, and the like,
A non-simultaneous control method is used in which the generation of a control signal (error signal) by detecting the state of the input signal is not performed simultaneously. That is, a time control unit is newly provided on the output side of the comparison unit that receives the detection output from the detection unit that detects the state of the input signal to the control target and generates a control signal (error signal) by comparing it with a reference value. The signal control unit controls the input signal to the controlled object by the control signal (error signal) that has passed through the time control unit.

[0024]

In the above technical means, the comparing section functions to generate a necessary control signal (error signal) by comparing the state detection value of the input signal to the controlled object such as the display with the reference value. The time control unit implements non-simultaneous control by delaying the control signal (error signal) for an appropriate time, adding transient response characteristics with an appropriate time constant, and then passing the signal to the signal control unit. is doing.

The signal control unit controls the amplitude of the input signal to the controlled object, the DC component, the frequency characteristic, and the linearity represented by the γ characteristic based on the control signal passed from the time control unit. By non-simultaneous control, automatic control (feedback control) even if the time constant of the control signal system is set to a large value
Can be continuously converged by the dividing operation.
This enables stabilization by sufficiently increasing the time constant of the control signal system as compared with the time constants of other components in the automatic control system. Furthermore, by sufficiently increasing the time constant of the control signal system, it is possible to reduce the circuit scale and power consumption by making the signal control unit a low-speed configuration used in a non-automatic control system.

[0026]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a signal control device as an embodiment of the present invention. In the figure, 101 is an input signal source, 102 is a reference signal synthesis unit, 103 is a signal control unit,
104 is a drive target (control target), 105 is a time control unit,
Reference numeral 106 is a comparison unit, and 107 is a detection unit.

Referring to FIG. According to the example of the automatic white balance adjustment circuit described in the related art, the detection unit 107 is, for example, a cathode current detection circuit of a picture tube and detects a cathode current, or a sensor or a video camera. By detecting the uneven brightness and the uneven chromaticity on the picture tube surface, the deviation of the white balance and the like are detected, quantified, and output as data.

The detection value data thus detected by the detecting section is sent to the comparing section 106 where it is compared or calculated with a preset reference value, and the result is used to determine the amount of white balance deviation or the like. Calculation is performed to obtain correction data for correcting the deviation. This correction data is stored in the time control unit 105.
And is subjected to time control by being subjected to a delay process for an appropriate time, adding a transient response characteristic with an appropriate time constant, and the like.

Next, the correction data time-controlled by the time controller 105 is given to the signal controller 103 and used as a control signal for controlling the output signal from the reference signal synthesizer 102. Here, the input signal sent from the input signal source 101 to the reference signal synthesizing unit 102 and input is subjected to calculation such as addition with a predetermined reference value in the reference signal synthesizing unit 102, or the input signal Is sent to the signal control unit 103 after receiving an operation such as switching to the reference value and outputting.

In the signal controller 103, the reference signal synthesizer 1
In 02, a signal that has undergone a required operation is input, and in order to correct the deviation of the white balance of the input signal, correction is performed by the correction data. As the correction, control of amplitude and DC level is performed, It is sent to the drive target 104 represented by a display or the like. Therefore, the drive target 104 is not limited to a display or the like, and may be a camera,
It is possible to target a general one driven by a motor or the like.

As can be seen from the above operation, the comparison unit 10
By supplying the correction data from 6 to the signal control unit 103 after the time control unit 105 controls the time, the non-simultaneous control described above becomes possible. Such non-simultaneous control increases the degree of freedom in designing the control system. For example, by effectively separating the detection / control signal system and the controlled signal system from each other, the former can be stabilized by sufficiently increasing the time constant.

Further, by constructing a negative feedback loop of low speed and low noise by using the control unit of the conventional non-automatic control system, it is possible to realize a low cost control system in which the circuit scale and power consumption are suppressed. .. Further, in the non-simultaneous control system of the present invention, the drive target is not particularly required, and the drive target 104 can be excluded from the embodiment shown in FIG. Further, as will be described later, the reference signal synthesis unit 102
Is not essential, and a configuration without this is one of the embodiments.

FIGS. 4 and 5 are block diagrams showing a display provided with an automatic white balance adjusting circuit as an embodiment of the present invention. That is, FIGS. 4 and 5 are block diagrams showing a display provided with an automatic white balance adjusting circuit when they are combined and integrated at a broken line. In these figures, 12R, 12G and 12B are cutoff adjustment level correction circuits, 9R, 9G and 9B are cathode current detection circuits, 10R, 10G and 10B are drive adjustment gain variable amplification circuits, and 8R and 8G. , 8B represents a signal synthesizing circuit, and 33 represents a white balance control circuit.

In FIG. 4, input terminals 1R, 1G, 1B
Each of the primary color signals input to the
After passing through R, 8G, and 8B, it is amplified by a drive adjustment gain variable amplification circuit 10R, 10G, and 10B having a built-in video output circuit, and a cutoff adjustment level correction circuit 12 is provided.
It is level-shifted by R, 12G and 12B and is applied to the cathodes 7R, 7G and 7B of the picture tube 6 through the cathode current detection circuits 9R, 9G and 9B.

The signal synthesizing circuits 8R, 8G, and 8B during the automatic white balance adjustment period output the signals from the respective input primary color signals or from the signal generating circuit 2 for automatic white balance adjustment to the reference signal line 4.
It is operated to switch to the reference signal sent via. At this time, the white balance adjustment is performed by controlling the cathode current ratio between the primary colors or the cathode current value to be constant.

In FIGS. 4 and 5, the hold capacitors 17R, 17G and 17B in the white balance control circuit 33 are provided.
And 18R, 18G and 18B with resistors 61R and 61
G, 61B and 62R, 62G, 62B connected low-pass filter type sample and hold circuit (hereinafter, LPF
S / H circuit) is used as the time controller.

By using these LPF type S / H circuits, comparators (that is, OP amplifiers) 16R, 16G, 1
It is possible to set a sufficiently large time constant for stabilizing the negative feedback control during the negative feedback via 6B. Even if there is a decrease in the convergence speed due to a large time constant, the sample / hold operation is repeated as needed, so that the automatic control can be intermittently continued without repeating the restart, so that the control steadily converges. In addition, since the LPF type average value control is used, the cathode current detection timing and cutoff adjustment
Even if the drive adjustment timings do not match, the control is steadily converged by repeating the sample / hold operation as needed.

That is, non-simultaneous control is possible, and an asynchronous clamp circuit in which the base of the clamp transistor 203 is directly connected to the clamp voltage source 201 can be provided. Further, the non-simultaneous control increases the degree of freedom in design, and the synchronization frequency band can be expanded to easily make the display device the multi-scan system.

In the asynchronous clamp circuit, the diode 207 automatically conducts only during the blanking period when the potential of the video signal reaches the maximum level, and the cathode terminal of the picture tube is clamped. Also called a clamp circuit. By using an asynchronous clamp circuit, high-speed, large-amplitude pulses are unnecessary, and power consumption and circuit scale can be greatly reduced.

6 and 7 are block diagrams showing an embodiment of the present invention shown in FIGS. 4 and 5, and circuit diagrams showing concrete circuit examples. That is, FIGS. 6 and 7 are circuit diagrams showing a concrete embodiment of the present invention when they are combined and integrated at the broken line.

6 and 7, the signal sources 91R and 91R
The primary color signals input from G and 91B are input to the video processing IC 4 via the input signal control units 41R, 41G and 41B.
2 is input and drive adjustment and the like are performed. The respective primary color signals are then subjected to cutoff adjustment in 43R, 43G and 43B including a video output amplifier and a cathode current comparison section, and are passed through the cathode current detection circuits 9R, 9G and 9B to the cathode ray tubes of the picture tube. Input to the terminal. Hereinafter, the present embodiment will be described focusing on the B primary color signal system, but it goes without saying that each primary color signal system has the same configuration.

Input signal control section 41R, 41G, 41B
Has a function of interrupting the input primary color signal in order to stabilize the control and improve the accuracy during automatic white balance adjustment. When the input primary color signal is cut off, the voltage of the gate signal source 407 becomes high level, and the transistor 402 is cut off via the transistor 404. The primary color signal sent from the emitter follower circuit composed of the transistor 402 and the resistor 403 via the capacitor 406 includes a video processing IC.
Contrast adjustment (same gain variable between each primary color signal) is performed in 92B of 42, bright adjustment (same level shift between each primary color signal) is performed in 93B, and drive adjustment is performed in 94B.

The drive adjustment is controlled by the drive control voltage applied to the control terminal 44B from the above comparison section (or time control section), but since a circuit similar to the cutoff adjustment section described later is used, 6, omitted in FIG. 7. Here, the brightness adjustment is performed by the signal source 41.
The switch 409 that opens and closes in synchronization with the pedestal clamp pulse supplied from the switch 3 and the negative feedback system of the comparison circuit 408 changes the output voltage of G to the brightness adjustment volume 41.
It is performed by controlling the voltage equal to the voltage input from the switch 4 through the switch 415.

By using the hold capacitor 410, the bright control is maintained even during the non-clamping period when the switch 409 is open (the switch 411 is closed except during the automatic white balance adjustment). In this embodiment, in order to suppress the occurrence of crosstalk due to the addition of a circuit shared between the primary color signal systems, a new method is used in which the bright adjustment function of the existing circuit is utilized for the above reference signal synthesis. I am using.

That is, when the input primary color signal is switched to the reference signal, the switch 415 controlled by the timing signal source 417 is used to change the brightness control voltage applied to the video processing IC 42 from the voltage of the brightness adjustment volume 414 to the switch 416. Is switched to the voltage of the reference signal source 462 or 463 that can be used via (when there is a constraint on the voltage dynamic range, the reference signal is transmitted in the current format, and then converted into a voltage for use. Is also good).

The reference signal sources 462 and 463 for the cutoff adjustment and the drive adjustment are the timing signal source 4 respectively.
It is switched by 18 and used. Further, in order to speed up the response of the video processing IC 42 when switching to the bright control by the reference signal source 462 or 463, the phase compensation capacitor 41 having a lower capacity than the hold capacitor 410 is used.
2 is inserted in 410 in series. The serial insertion is performed by opening the switch 411 by the timing signal source 417.

The output signal of the video processing IC 42 is the grounded-emitter transistor 422 and the grounded-base transistor 4.
It is amplified by a video output amplifier having a cascade configuration of 28. Resistor 423, capacitor 446, coil 4
Reference numeral 27 is a peak for widening the band of the video output amplifier.
It is a king element. The amplified signal is then level-shifted for cutoff adjustment by a peak clamp type cathode clamp circuit using a transistor 434, and then applied to the cathode terminal of the picture tube as described above.

Further, a blanking pulse is generated by the signal source 420.
By the transistor 419 input more, the transistor 428 is cut off during blanking,
The peak clamp operation is performed at the same time when the video signal is blanked. The clamp voltage of the cathode clamp circuit is composed of an OP amplifier 439, a grounded-emitter transistor 448, and a base-grounded transistor 442, to which the output of the emitter follower transistor 450 that performs output impedance conversion of the LPF type S / H circuit is input. Obtained from a high precision voltage amplifier.

The grounded base transistor 442 controls the clamp voltage range of the cathode clamp circuit to the power supplies 464 and 47.
It is suppressed to a voltage value of 0 to prevent the cut-off control voltage from being lowered during the automatic control to cause the picture tube to emit excessively high brightness. Due to the functions of the diode 432 and the resistor 429, the collector of the transistor 434 is connected to the collector of the transistor 428 only for the peak clamp operation, and the frequency of the video output amplifier due to the parasitic capacitance between the collector and the emitter of the transistor 434. Bandwidth deterioration can be suppressed.

The output of the cathode current detection circuit 9B is compared with the comparison voltage source 21, and the comparison output obtained from the comparator 16B is the LPF type S / H circuit (61B, 17B) controlled by the timing signal source 449. Entered in. A bipolar transistor 450, which is a current control element, is used in the next stage of the LPF type S / H circuit. Transistor 450
By flowing the base current of the above into the hold capacitor 17B, the voltage of the capacitor 17B can be always suppressed in the direction of decreasing the brightness of the picture tube (ground potential in this case) during non-adjustment. In this way, by using the current control element in the next stage of the S / H circuit, control starts from the high-luminance side, the safety circuit of the power supply operates, and the risk of X-ray emission does not occur, and the low-luminance is safely achieved. The automatic control can be started from the screen.

By using the peak clamp type cathode clamp circuit as the level correction circuit for cutoff adjustment, the base voltage Vkc of the cathode clamp transistor 434 is negatively fed back using the OP amplifier 439, the input resistor 437, and the feedback resistor 436. It can be sufficiently stabilized by controlling with a loop.

Therefore, the transistor 434 is clamped.
The base voltage Vkc is kept constant even if the pulsed base current flowing through the circuit changes depending on the contents of the video signal. In addition,
Base resistance of each transistor 401, 447, 421,
Reference numerals 440, 441, and 445 are damping elements for preventing parasitic oscillation of each transistor.

FIG. 8 and FIG. 9 are block diagrams showing, as an embodiment of the present invention, a display provided with an automatic white balance adjustment circuit with further improved adjustment accuracy. That is, FIG.
9 and FIG. 9 are blocks showing a display as an embodiment of the present invention when they are combined and integrated at the broken line. 8 and 9, the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals. The circuit operation of FIGS. 8 and 9 will be described below.

In FIG. 8 and FIG. 9, in the signal generating circuit 2 for automatic white balance adjustment, sample / hold pulses (generated from horizontal and vertical blanking pulses input to the input terminals 3H and 3V, respectively) Below, S / H
A pulse) is a sample / hold circuit (hereinafter referred to as S) composed of a capacitor 64 and a switch circuit 63 connected to the front stage of the comparator 16 via the gate signal line 40.
/ H circuit).

When blanking is included in the average value control using the detected cathode current value, the average value may differ from the actual value. Therefore, in order to prevent the cathode current detection value from becoming 0 during the blanking period, the above S / H
The circuit detects the cathode current detection value during the display period and holds it during the blanking period.

In FIG. 8 and FIG. 9, the gate signal line 40
FIG. 10 is a block diagram showing a specific example of the S / H pulse generation circuit output from the signal generation circuit 2 via the. Figure 1
At 0, 701 and 702 are D flip-flops,
Reference numeral 703 is a NAND circuit, 704 is a counter circuit, and 705.
Is a latch circuit, 706 is an inverter circuit, 707 and 708 are bit shift circuits, 709 is an adder, 710 and 711 are comparator circuits, 712 is an RS flip-flop, and 713 is an AND circuit.

In FIG. 10, the input negative horizontal blanking signal HBLK (denoted as 3H in FIG. 9) is input to the D flip-flop circuits 701 and 702, N.
With the differentiation circuit configured by the AND circuit 703,
The rising part is differentiated by one clock width of the clock coming from the outside. The pulse generated at the rising portion is supplied to the counter circuit 704, so that the clock is counted for one horizontal display period, and the count value at the falling edge of the horizontal blanking pulse is latched by the latch circuit 705.

That is, the count value held in the latch circuit 705 represents the cycle of the horizontal display period. The count value output from the counter circuit 704 is the comparator (1).
It becomes the A input of the circuit 710 and (2) circuit 711. Further, the latched cycle data is shifted to the lower bit by 1 bit in the bit shift (1) circuit 707 to set a value of ½ of the cycle data, and the bit shift (2) circuit 708 lowers the bit by 2 bits. It shall be shifted in the direction and one quarter of the cycle data shall be set.

The respective outputs of these bit shift circuits are added by the adder 709 to obtain the period data of 4
Get the value of 3/3. Also, the bit shift (1) circuit 70
The output of 7 is the B input of the comparator (1) circuit 710, and the output of the adder 709 is the B input of the comparator (2) circuit 711. Comparator (1) circuit 710
And (2) the circuit 711 causes the output to become high level under the condition of (A input) = (B input).

Therefore, the counter circuit 704 counts clocks over one cycle, and when the count value is one half of the cycle data, the RS flip-flop circuit 712 is set, the output becomes high level, and the count value Is 3/4 of the cycle data, the RS flip-flop circuit 712
Is reset and the output goes low. R-S
The output of the flip-flop circuit 712 and the vertical blanking signal VBLK having negative polarity (displayed as 3V in FIG. 9) are input to the AND circuit 713, and the output of the AND circuit 713 becomes an S / H pulse. ..

That is, the S / H pulse is at a high level from one half to three quarters of the horizontal display period during which the cathode current detection signal waveform is stable, and the automatic white balance control circuit is set to the sampling state and the other period. During the vertical blanking period, the level becomes low and the hold state is set. The above is the operation of the S / H pulse generation circuit. However, even when the input horizontal / vertical blanking signals are different, it is possible to generate the S / H pulse corresponding to the timing of the input signal.

FIG. 11 is a block diagram showing another embodiment of the present invention, which is an embodiment in which the time control unit 105 therein is realized by the storage unit 802 in the embodiment shown in FIG. The storage unit 802 is caused to perform a delay operation.

Referring to FIG. By storing the output of the comparison unit 106 in the storage unit 802, reading it after a necessary delay time, and sending it to the signal control unit 103, the effect of time control can be obtained. Further, by using the storage unit 802, a stable control signal can be obtained, and when the control signal is desired to be changed, preset data prepared in advance is called from the storage unit 802 and given to the signal control unit 103. You can also

Next, FIG. 12 shows another embodiment of the signal control device provided with the storage section. In the figure, 802 is a storage unit for storing correction data in advance, and 801 is a detection unit 10.
7, the correction data obtained via the comparison unit 106 and the time control unit 105 and the correction data stored in the storage unit 802 are switched as necessary, and one of the correction data is switched to the signal control unit 103. It is a switching unit to give to.

The circuit operation in FIG. 12 will be described in detail. For example, as described in the circuit operation in FIG. 1 above, the detection unit 107 causes the display screen having uneven brightness and chromaticity depending on the screen position. Light detection is performed using an optical sensor, a video camera, or the like, and the comparison unit 106, the time control unit 105, and the comparison unit 106, so that the amount of light detected is constant regardless of the screen position.
If adjustment is performed by the signal control unit 103, it is possible to eliminate unevenness in the brightness and chromaticity of the screen. The adjustment data obtained by such adjustment is stored in the storage unit 802.

On the other hand, during normal screen display, the switching unit 8
01 is inverted, the adjustment data is called from the storage unit 802 and given to the signal control unit 103, and when it is desired to change the color temperature and the like as necessary, preset data prepared in the storage unit 802 is called as the call signal control unit. The control is given to 103. When the driven object 104 employs an underscan system such as a character graphic display, the control unit 1 does not have to continue automatic adjustment.
The adjustment of No. 03 can be maintained, which can be dealt with by the above operation. The reference signal is displayed only during the adjustment, and the same operation as the non-automatic control is performed during the normal screen display.

FIGS. 13 and 14 are block diagrams showing a display provided with an automatic white balance adjusting circuit as an embodiment embodying FIG. 12 when they are connected and integrated at the broken line. 13 and 14, the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals.

Focusing on the B primary color signal system in FIGS. 13 and 14, during normal screen display, the switch circuits 73B and 74B are controlled by the control signals 77 and 78.
The correction data sent from the automatic white balance adjustment signal generation circuit 2 is selected and given to the control system via the control lines 19B and 20B. When adjusting the drive, switch circuit 7
3B selects the output of the drive adjustment LPF type S / H circuit and supplies it to the drive adjustment gain variable amplification circuit 10B via the control line 19B to perform a negative feedback action at the time of adjustment.

The switch circuit 71B sends the output of the LPF S / H circuit for drive adjustment to the signal generation circuit 2 for automatic white balance adjustment via the signal line 70B. The sent drive adjustment data is stored in the storage unit built in the signal generating circuit 2 for the automatic white balance adjustment.
By re-inverting the switch circuit 73B after the adjustment, the drive adjustment data fetched in the storage section at the time of the adjustment is used to drive the gain adjustment variable gain amplifier circuit 1 for drive adjustment through the control line 19B.
Send to 0B.

At the time of cutoff adjustment, the switch circuit 74
B selects the output of the LPF S / H circuit for cutoff adjustment, gives it to the level correction circuit 12B for cutoff adjustment via the control line 20B, and performs negative feedback during adjustment. Further, the switch circuit 71B sends the output of the cutoff adjustment LPF S / H circuit to the signal generation circuit 2 for automatic white balance adjustment via the signal line 70B.

The cutoff adjustment data is stored in the storage section built in the signal generating circuit 2 for automatic white balance adjustment. When the switch circuit 74B is re-inverted after the adjustment is completed, the cutoff adjustment data fetched in the storage section at the time of adjustment is sent to the cutoff adjustment level correction circuit 12B via the control line 20B. In the above automatic white balance adjustment operation, if the data held in the LPF type S / H circuit is used as a control signal during the adjustment and the stored data is updated by the cathode current integrated value after the adjustment, the chronological change of the picture tube 6 also occurs. Can be corrected.

The digital signal processing circuit shown in FIG.
FIG. 15 is a block diagram showing a specific example of the signal generation circuit 2 for automatic white balance adjustment shown in FIG. 14. In FIG. 15, a reference signal generation circuit 81, a timing generation circuit 82, an analog / digital converter (hereinafter referred to as an A / D converter) 83.
R, 83G, 83B, multiplexer circuit 84, control unit 85, storage circuit 87, parallel / serial conversion circuit (hereinafter referred to as P / S converter) 86, digital / analog converter (hereinafter referred to as D / A converter) 88, and a data bus, an address bus, and a control bus (the buses are collectively shown in the figure) connecting these.

In FIG. 15, the timing generation circuit 82
Generates various timing pulses including the S / H generation circuit in FIG. 10 described above from the horizontal and vertical blanking signals (3H, 3V), and the control signal lines 72, 77, 78 shown in FIG. 13 and FIG. , 13W, 13B, 5 are given. Further, the reference signal generation circuit 81 and the A / D converter 8
3R, 83G, 83B, multiplexer circuit 84, P /
The conversion timings of the S converter 86 and the D / A converter 88 are controlled.

The A / D converters 83R, 83G and 83B are
Signal lines 70R, 70G, 70B for automatic white balance adjustment
The adjustment data for the cutoff adjustment and the drive adjustment sent via the converter is converted from the analog format to the digital format at the timing generated by the timing generation circuit 82. Each adjustment data represented by a digital amount is sequentially selected by the multiplexer circuit 84 and sent to the bus. The fetched adjustment data is stored in the storage circuit 87.

The control section 85 is composed of a microcomputer and the like, and controls the timing generation circuit 82 during adjustment and non-adjustment and controls the storage circuit 87. With this control, it is possible to achieve multi-functionality such as calling adjustment data corresponding to a plurality of color temperatures. Further, in FIG. 15, the control unit 85 controls the timing generation circuit 82.
Although other blocks are controlled via the
It goes without saying that 5 can control other blocks.

The adjustment data called through the bus is converted from a parallel format to a serial format by the P / S converter 86, input to the multi-channel built-in type D / A converter 88 by serial data input, and digitalized. The format is converted to the analog format at the timing generated by the timing generation circuit 82. The adjustment data converted into an analog amount by the D / A converter 88 is sent to the signal line 7
A control voltage is generated via 9R, 79G, 79B and 80R, 80G, 80B.

The reference signal generating circuit 81 generates the reference signal for automatic white balance adjustment as described above, and the signal line 4
The waveform of the reference signal can be independently set or controlled according to need.

FIG. 16 is a block diagram showing another specific example of the automatic white balance adjustment signal generation circuit 2. In FIG. 16, 89 is a multiplexer and 83 is an A / D converter. Also in FIG. 16, the same components as those in FIG. 15 are indicated by the same reference numerals.

16, the difference from FIG. 15 is that R, G, B sent via signal lines 70R, 70G, 70B.
The adjustment data for each of the S / H circuits 90R, 90G,
It is held at 90B, and sequentially selected by the multiplexer 89 with the analog amount kept unchanged and applied to the A / D converter 83. Therefore, there is an effect that the number of expensive A / D converters can be reduced to one.

In FIG. 15 and FIG. 16, R, G, B adjustment data are sequentially selected and fetched and processed one by one, and the number of pins is small and the serial input multi-channel built-in type D / A converter is stable. With the circuit configuration using, the effect of circuit scale reduction and cost reduction can be obtained, and the operation circuit 85 having a slow operation speed can be used. By using a parallel input type D / A converter, P / S
The converter 86 can be omitted.

FIGS. 17 and 18 are block diagrams showing another embodiment of the present invention (a modified embodiment of the embodiment shown in FIGS. 4 and 5) when they are combined and integrated at the broken line. is there. In FIG. 17 and FIG. 18, the LP in FIG. 4 and FIG.
Instead of the F-type S / H circuit, an up-down counter circuit and a D / A converter are used to perform time control. Below, B
The operation will be described by focusing on the primary color signal of.

17 and 18, at the time of cutoff adjustment, the up / down counter circuit 97B increases / decreases the count value according to the increase / decrease of the comparator 16B by the clock sent via the signal line 213. The count value is sent to the D / A converter 95B, and the signal line 211
Is converted to an analog quantity by a timing pulse sent via. When the cutoff adjustment is completed, the counting operation of the up / down counter circuit 97B and the conversion of the D / A converter 95B are stopped, and the optimum adjustment level is maintained.

Similarly, drive adjustment is performed using the comparator 16B, the up / down counter circuit 98B, and the D / A converter 96B, and the optimum adjustment gain is held at the end of drive adjustment. Time control is also possible by delaying the clock of the signal lines 213 and 214 or the timing pulse of the signal lines 211 and 212. Further, with the above configuration, a storage unit for storing the adjustment data is unnecessary, and stable adjustment data can be obtained.

Next, FIG. 19 shows an embodiment of a signal control device provided with a comparison signal generation section for detecting the comparison signal in the comparison section from the input signal, instead of the means for synthesizing the reference signal with the input signal. In FIG. 19, the reference signal synthesis unit 102 in FIG. 1 is deleted and the comparison signal generation unit 141 is added.

In FIG. 19, the input signal level of each primary color signal or the ratio of the input signal levels between each primary color signal is detected,
These detection values are controlled so that the cathode current detection level of each primary color signal system or the ratio between them is made uniform (the input signal level of each primary color signal is added with DC control by brightness adjustment and amplitude control by contrast adjustment). It doesn't matter).

For example, the average value or the peak value, or the minimum value or the instantaneous value of the input primary color signal is detected by the comparison signal generating section 141. Further, the detection unit 107 detects the average value or the peak value, or the minimum value or the instantaneous value of the cathode current. The comparison unit 106 calculates the difference between the respective detected values, outputs the correction data, and delays the time control unit 105. The time-delayed correction data controls the input signal in the signal control unit 103 and is supplied to the drive target 104.

FIG. 20 shows an embodiment of a signal control device for controlling an input signal without using the means for synthesizing the reference signal and the means for generating the comparison signal described above. Figure 2
At 0, control is performed so that the cathode current detection level of each primary color signal system or the ratio therebetween is aligned at a certain timing synchronized with a synchronization signal that can determine what the state of the input signal is.

For example, in the display device which is the driving target 104,
In the non-display period excluding the burst signal period and the like, each primary color signal or composite video signal is often at the black level or the pedestal level. Alternatively, it is possible to standardize superimposing a reference signal of a certain level in the non-display period. It goes without saying that the comparison value in the comparison unit 106 at that time is preset.

In FIGS. 19 and 20, for example, when the automatic white balance control is performed, the control can be performed without synthesizing the reference signals, so that the reference signals are not displayed on the screen and the user feels uncomfortable. Don't give. This applies not only to televisions that employ overscan, but also to displays and monitors that employ an underscan system.

FIG. 21 shows an embodiment in which the display device to be driven can be adapted to multimedia. Recently, it is possible to simultaneously display and edit video data obtained from a television signal system and video data generated from a computer system on one display screen. However, in terms of color reproduction,
It is unavoidable that the white balance of one of the images is lost by displaying the video data of different standards on the same screen.

Further, when the above-mentioned image data editing result is printed by a printer, the white balance is remarkably disturbed due to the influence of the standard difference from the printing system. As a solution to the above problems, there are systems that control the video signal amplitude ratio, but the white balance is lost due to bright adjustment in the display device, and the dynamic range of each primary color signal system cannot be fully utilized. The problem remains that the display brightness is reduced.

In FIG. 21, for example, in synchronization with the input signal corresponding to the edited video data, the display device 162 is displayed through another signal path or the same signal path as the above-mentioned input signal system. Control signals are transmitted and signal control is performed. When transmitting the above-mentioned control signal from the outside of the display device 162, it is necessary to satisfy various conditions of the signal path, and it is not always possible to input the received control signal as it is to the signal control unit 103. ..

Therefore, in the control signal generator 161
The external control signal is converted into a mode that can be utilized by the signal control unit 103. When the received control signal can be utilized as it is in the signal control unit 103, the control signal generation unit 16
It goes without saying that 1 is unnecessary.

By using the present invention, it is possible to automatically eliminate the above-mentioned loss of white balance depending on image data. For example, it is possible to control the white balance setting of the display device by following the display scan of different video data on the same screen, or to perform the control automatically following the switching of the video signal source.

Further, as the control characteristics of the signal, frequency characteristics and the like can be considered in addition to the amplitude ratio and the DC level which are factors of white balance. For example, in the case of image display such as character display and computer graphics where the edge information of the image is important, it is necessary to secure a sufficient signal frequency band. On the contrary, when displaying an image whose animation or S / N is deteriorated, since the smoothness of the image quality and the low noise property are important, it is necessary to keep the signal frequency band to the minimum necessary. Furthermore, considering the brightness level of the signal,
It is also possible to control the contrast adjustment amount and the brightness adjustment amount.

Finally, FIG. 22 shows an embodiment in which the same effect as that of the embodiment shown in FIG. 21 can be obtained without inputting a control signal from the outside. In FIG. 22, a control signal added to the signal control unit 103 by separating a control signal superimposed on an input video signal, a synchronization signal, or the like, or by detecting the level, frequency characteristic, or temporal change of the signal. Is getting

For example, the control signal can be time-division multiplexed in the non-display period in the video signal and in the display period in the synchronization signal. Particularly, in the synchronizing signal, a level signal of three values or more can be used, or a signal having different frequency components such as a burst signal can be used. The advantage of the method of detecting the signal level, frequency characteristic, and temporal change is that the generation of a control signal in the signal source 101 is unnecessary.

As a specific example, a high-pass filter is provided in the separation unit 163 to detect the ratio of high frequency components contained in the input signal, and the detected value is converted into a control signal by the control signal generation unit 161 to obtain the signal. Input to the control terminal of the control unit 103. By providing the signal control unit 103 with a function of controlling the frequency band of the input signal, the S / S ratio of the signal input to the display device 162 is changed as in the embodiment shown in FIG.
The N ratio can be improved.

As an example of detecting the time change of the signal,
In order to reduce the fatigue of the eyes of the user of the display device 162 when the signal amplitude changes drastically with time, it is conceivable to control the contrast adjustment of the display device 162 in such a direction as to be suppressed.

[0100]

The following effects can be obtained by using the present invention. (1) Control can be stabilized even when a plurality of excessive delay elements are present in the automatic control system by negative feedback.

(2) The degree of freedom in designing the automatic control system is increased, and the circuit scale and power consumption can be reduced. (3) It is possible to easily realize multi-scanning and multimedia of a display device as a driving target.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing one half of a conventional automatic white balance adjustment circuit.

FIG. 3 is a circuit diagram showing the other half of a conventional automatic white balance adjustment circuit.

FIG. 4 is a circuit diagram showing one half of an embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 5 is a circuit diagram showing the other half of an embodiment in which the present invention is applied to an automatic white balance adjustment circuit.

FIG. 6 is a circuit diagram showing a half of another embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 7 is a circuit diagram showing the other half of another embodiment in which the present invention is applied to an automatic white balance adjustment circuit.

FIG. 8 is a circuit diagram showing a half of another embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 9 is a circuit diagram showing the other half of yet another embodiment in which the present invention is applied to an automatic white balance adjustment circuit.

FIG. 10 is a configuration diagram showing a specific example of an S / H pulse generation circuit for an automatic white balance adjustment circuit.

FIG. 11 is a block diagram showing another embodiment of the present invention.

FIG. 12 is a block diagram showing still another embodiment of the present invention.

FIG. 13 is a circuit diagram showing a half of still another embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 14 is a circuit diagram showing the other half of still another embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 15 is a configuration diagram showing a specific example of a signal generating circuit for automatic white balance adjustment.

FIG. 16 is a configuration diagram showing another specific example of the signal generating circuit for automatic white balance adjustment.

FIG. 17 is a circuit diagram showing a half of still another embodiment in which the present invention is applied to an automatic white balance adjusting circuit.

FIG. 18 is a circuit diagram showing the other half of yet another embodiment in which the present invention is applied to an automatic white balance adjustment circuit.

FIG. 19 is a block diagram showing still another embodiment of the present invention.

FIG. 20 is a block diagram showing still another embodiment of the present invention.

FIG. 21 is a block diagram showing still another embodiment of the present invention.

FIG. 22 is a block diagram showing still another embodiment of the present invention.

[Explanation of symbols]

101 ... Input signal source, 102 ... Reference signal synthesizing unit, 103
... signal control unit, 104 ... driven object, 105 ... time control unit, 106 ... comparison unit, 107 ... detection unit, 802 ... storage unit, 161 ... control signal generation unit, 162 ... display device, 16
3 ... Separation section

Claims (13)

[Claims] 1. Having an input terminal, an output terminal and a control terminal,
A signal to be supplied from the signal source (101) to the controlled object (104) is input from the signal source through the input terminal and is controlled according to the control signal applied to the control terminal, and then the output terminal is turned on. A signal control unit (103) that outputs to a control target via the detection unit (10) that detects the state of the signal after being controlled by the signal control unit by the signal supplied to the control target.
7), a comparator (106) for comparing the detection output of the detector with a reference value and outputting an error signal, and prior to applying the error signal from the comparator to the control terminal of the signal controller. And a time control section (105) for controlling the time characteristic and applying the time characteristic to the control terminal. 2. The signal control device according to claim 1, wherein the control target is a drive target represented by a display device or the like. 3. The signal control device according to claim 1, wherein the signal control unit (10) is connected to the signal source (101).
A process of adding a signal to be input to the input terminal of 3) to a predetermined reference signal prior to input to the input terminal, or switching to the reference signal for output. A signal control device comprising a reference signal synthesizing unit (102) for performing input to the input terminal after performing the operation. 4. The signal control device according to claim 3, wherein the control target is a drive target represented by a display device or the like. 5. The signal control device according to claim 1, wherein the time control unit is inserted in series with a sample hold circuit that takes in an error signal from the comparison unit and an input side of the sample hold circuit. , A series resistor (61) that adds transient response characteristics with a time constant suitable for stabilizing the control.
R, 61G, 61B), and a signal control device. 6. The signal control device according to claim 1, wherein the time control unit includes a memory circuit. 7. The signal control device according to claim 3, wherein the reference signal synthesizing unit is a direct current reproducing circuit represented by a bright adjusting circuit (42) in a video signal processing circuit. apparatus. 8. The signal control device according to claim 7, wherein a series capacitor (412) is added to the DC voltage holding capacitor (410) forming the DC regeneration circuit in order to improve response characteristics. And signal control device. 9. The signal control device according to claim 1, wherein the time control unit counts an error signal from a comparison unit (97R, 97G, 97B), and the output of the counter is subjected to digital / analog conversion. Digital / analog converter circuit (95R, 95G, 95
B) and a signal control device comprising: 10. The signal control device according to claim 1, wherein the signal from the signal source (101) is directly taken in, and a comparison signal as a reference value used therein is generated in the comparison unit (106). Comparison signal generator to be supplied (14
1) A signal control device characterized by being provided. 11. A signal, which has an input terminal, an output terminal, and a control terminal, and which is to be supplied from a signal source (101) to a drive target (162) represented by a display device or the like, from the signal source via the input terminal. A signal control unit (103) that outputs a signal to a drive target through an output terminal after performing control according to a control signal that is input and applied to a control terminal, and a control signal input from the outside A signal control device, comprising: a control signal generation unit (161) which converts a control signal in a mode that can be input to a control terminal of the signal control unit and supplies the control signal to the control terminal. 12. A control which has an input terminal, an output terminal, and a control output terminal, receives a signal from a signal source (101) through the input terminal, and then outputs the signal from the output terminal and is superimposed on the signal. A control signal separation unit (163) for separating a signal and outputting it from a control output terminal, and an input terminal, an output terminal, and a control input terminal, and an output signal from the control signal separation unit is input through the input terminal,
A signal control unit (103) that performs control according to a control signal applied to a control input terminal and then outputs the signal to a drive target (162) represented by a display device or the like via an output terminal.
And a control signal generator that takes in a control signal output from the control output terminal of the control signal separation unit, converts it into a control signal in a mode that can be input to the control input terminal of the signal control unit, and applies the control signal to the control input terminal. A signal control device comprising: a part (161). 13. The signal control device according to claim 1, wherein a storage circuit (802) is detachably connected between the time control unit and a control terminal of the signal control unit, and the time control unit is connected. Signal from the storage circuit is applied to the control terminal of the signal control unit to perform signal control except during the automatic control in which the control signal is applied to the control terminal of the signal control unit. Control device.