JPH05104766A - Recording head driving device - Google Patents

Abstract

PURPOSE:To perform recording well-balanced in printing density on the basis of recording data such as heat accumulation between adjacent recording heads. CONSTITUTION:The control signal of the current supply time to recording heads 7 is inputted to recording head driving gate circuits 52 corresponding to the lately or/and past recording data from adjacent latrch circuits 21 by AND gates 82 or/and OR gates.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermal head drive circuit for a thermal head used as a printing section of a facsimile, a printer or the like.

[0002]

2. Description of the Related Art FIG. 8 is a circuit diagram showing a conventional one-dot recording head driving circuit shown in a catalog (thermal head, H-C9683-E, made in February 1991, P25) manufactured by Mitsubishi Electric Corporation. The thermal head has this circuit for a predetermined number of dots. In the figure, 1 is a shift register that shifts the input current line data in accordance with a clock, and has a number of stages corresponding to the number of dots of the thermal head. Reference numeral 21 is a latch circuit for fetching and holding the data appearing at the taps of the shift register 1, 31 is a gate signal generating section for generating three gate signals GA, GB, GC, and 4a, 4b are outputs of the latch circuit 21 and gate signal GB. , GC, an inverted logical product (NAND) gate, 51 is a logical product (AND) gate that outputs a pulse signal indicating a current-carrying state, and 6 is a Darlington transistor (driving element) that drives the heating resistor 7 according to the pulse signal. ).

Next, the operation will be described. The shift register 1 takes in data which is an image signal in accordance with a clock signal and shifts it (FIG. 12 (A),
(See (B)). The latch circuit 21 sequentially takes in data according to the latch signal from the tap corresponding to the dot of the shift register 1. That is, the latch signal is 1
When input twice, the latch circuit 21 shifts the contents and fetches data from the shift register 1. As a result, the data for that dot on the previous line is Q2.
Q is the data for that dot on the line before the line
Appears at 3 terminals.

Then, the gate signal generator 31 generates a gate signal having a predetermined pattern, as shown in FIGS. 12 (D), 12 (E) and 12 (F). This gate signal and NA
A signal applied to the heating resistor 7 is determined by the ND gates 4a and 4b and the AND gate 51, and the Darlington transistor 6 drives the heating resistor 7 according to the signal. The heating resistor 7 generates heat in accordance with the amount of current flowing therethrough, and causes the thermal paper or the like located above it to develop color.

The history control of the amount of current applied to the heating resistor 7 will be described below. As shown in FIG. 9A, the temperature of the heating resistor 7 becomes 300 ° C. when the energization time is 1 ms. However, as shown in FIG. 9B, when the energization is repeated with a repetition period of 2 ms, the temperature rises to 500 ° C. That is, even if the same amount of current is applied, if the temperature at the start of energization is high,
The temperature is high after the end of energization. Therefore, under the usage condition where electricity is supplied at a fast repetition cycle,
If the energy applied to the heating resistor 7 is not controlled, the color density will be high. Therefore, it is necessary to control the amount of energy according to the temperature at the start of energization, and specifically, the energization is controlled based on whether or not recording is performed before the previous line.

In order to perform such history control, that is, how to apply energy to the dots of the current line from the recording conditions of the dots of the previous line and the line before the previous line, in other words, how In order to determine whether or not to energize, it is necessary to know the degree of temperature rise for each pattern (recording status of the dot in the current line, the previous line and the line before the previous line).

FIG. 10 shows a simplified result of simulating a temperature rise in each pattern when history control is not performed. In the figure, “H” indicates that recording (energization) was performed, and “L” indicates that recording was not performed. For example, FIG. 10B shows a case where the dot is recorded in the line before the previous line, but is not recorded in the line before the line. In addition, a value obtained by normalizing the temperature at the time when the energization is completed in the current line (this value indicates the temperature increase degree, but here, this is called the number of points) is shown by a numerical value. For example, in the case shown in FIG. 10A, the number of points is small so that a large amount of energy can be given.
In the case shown in (D), since the number of points is large, it is understood that history control should be performed so that a small amount of energy is given.

FIG. 11 shows the relationship between the number of points shown in FIG. 10 and the output data (latch data) latched by the latch circuit 21. As described above, the latch data indicates whether the dot is recorded on the line before the previous line, the previous line and the current line. Here, the number of levels is defined according to the number of “H”, and the higher the number of “H” appearing in the pattern, the higher the level. An example of an appropriate energization state according to the four types of patterns shown in FIG. 11 is shown in FIGS.
It is shown in.

In order to set an appropriate amount of current according to the number of points, the gate signal generator 31 has a gate signal generator 31 shown in FIG.
A gate signal as shown in (E) and (F) is generated. As a result, AND according to the output pattern of the latch circuit 21
The output of the circuit 51 is as shown in FIGS. 12 (G) to 12 (J), and the amount of current is set according to the number of points. That is, the pattern (L, L,
For H), the amount of current is increased, and for patterns with a large number of points, the amount of current is decreased. Normally, the pulse widths of the gate signals GB and GC are the same, and for patterns within the same level,
The total energizing time is the same.

[0010]

Since the conventional recording head driving device is constructed as described above, it is necessary to increase the number of outputs of the latch circuit 21 when strict history control is required. Therefore, when independently controlling each adjacent heating resistor, no attention is paid to the effect of heat accumulation that occurs between adjacent heating resistors, and therefore high accuracy is achieved. There was a problem such as not being able to realize a good thermal history control.

The invention of claim 1 has been made to solve the above problems, and each recording head is obtained by obtaining recording information as recording state information such as heat generation between adjacent recording heads. It is an object of the present invention to obtain a recording head driving device that can give optimum printing energy to the print head.

It is another object of the present invention to provide a recording head drive device capable of realizing more accurate print density control based on recording information of adjacent recording heads.

A third object of the present invention is to provide a recording head driving device which can realize a sufficiently high-precision print density control based on past recording information of adjacent recording heads.

[0014]

According to a first aspect of the present invention, there is provided a recording head drive device, which is a latch circuit for holding recording information of a current line of dots to be driven and respective recording information of the dots of a previous line. And a gate signal generating section for outputting a gate signal for outputting a pulse signal corresponding to the energized state according to each output pattern of the latch circuit to a gate circuit for outputting a pulse signal indicating an energized state for the recording head. By providing a control signal for controlling the energization time to the recording head to the AND gate according to the recording information from the own latch circuit and other adjacent latch circuits among the latch circuits for each dot. It is designed to be input to the circuit.

According to another aspect of the present invention, there is provided a printhead driving device, which includes a latch circuit for holding print information of a current line of a dot to be driven and print information of each dot of a previous line, and a printhead. A gate signal generator for outputting a gate signal for outputting a pulse signal corresponding to the energized state to the gate circuit for outputting a pulse signal indicating the energized state to the gate circuit, and each dot An AND gate for inputting a control signal for controlling the energization time to the recording head to the gate circuit in accordance with recording information from the own latch circuit and another adjacent latch circuit, Of the latch circuits for each dot, in accordance with the record information from the adjacent latch circuit other than the own latch circuit, to the OR gate, A control signal for controlling the different energizing time the serial energization time is obtained by so as to input to the gate circuit.

Further, the recording head drive device according to the invention of claim 3 is a latch circuit for holding the recording information of the current line of the dot to be driven and the recording information of each dot of the previous line, and the recording head. A gate signal generator for outputting a gate signal for outputting a pulse signal corresponding to the energized state to the gate circuit for outputting a pulse signal indicating the energized state to the gate circuit, and each dot A first AND gate for inputting to the gate circuit a control signal for controlling the energization time to the recording head in accordance with recording information from its own latch circuit and other adjacent latch circuits. In accordance with the past record information from the adjacent latch circuits other than the own latch circuit among the above latch circuits for each dot. A second AND gate, a control signal for controlling the different energizing time and the current time is obtained so as to input to the gate circuit.

[0017]

The AND gate according to the invention of claim 1 is
A control signal of the energization time for the recording head is input to the gate circuit for driving the recording head according to the recording information from the self-latch circuit and another adjacent latch circuit, and the energy determined by the energization time is applied. By supplying the printheads to the printheads, balanced print density control can be realized according to the states of the adjacent printheads.

The OR gate according to the invention of claim 2 is a gate for driving a recording head with a control signal of an energization time for the recording head in accordance with recording information from an adjacent latch circuit other than its own latch circuit. Inputs to the circuit and supplies the energy determined by the energization time to the corresponding print heads, enabling more accurate and balanced print density control according to the state of the adjacent print heads. ..

Further, the second aspect of the invention of claim 3
The AND gate inputs the control signal of the energization time for the recording head to the gate circuit according to the past recording information from other adjacent latch circuits other than the self-latch circuit, and outputs the energy determined by the energization time. By supplying the print density to the corresponding print head, it is possible to realize highly accurate and balanced print density control according to the states of the adjacent print heads.

[0020]

【Example】

Example 1. An embodiment of the invention of claim 1 will be described below. In FIG. 1, reference numeral 82 is an AND gate, and each of the latch circuits 21 has two input terminals adjacent to each other.
It is connected to the Q1 terminal of. Reference numeral 92 is an analog switch, which opens upon receiving the output signal of the AND gate 82.

A control signal 102 is inputted to the analog switch 92 as a predetermined pulse signal. 52 is a gate circuit as an AND gate, 7
Is a heating resistor as a recording head. In addition, the same components as those shown in FIG. 8 are denoted by the same reference numerals, and the duplicate description thereof will be omitted.

Next, the operation will be described. Latch circuit 2
Similarly to the conventional case, 1 sequentially fetches data from the shift register 1 in accordance with the externally input latch signal. As a result, the record information of the previous line is output to the Q2 terminal, and the record information of the previous line is output to the Q3 terminal. Further, the record information of the current line is output to the Q1 terminal of each latch circuit 21, but the record information of the adjacent dot, that is, the Q1 terminal of each adjacent latch circuit is input to each AND gate 82.

On the other hand, as shown in FIG. 2, at the input timing of the latch signal, the control signal 102 is transmitted to each of the analog switches 9.
When the analog switch 92 is turned on by receiving the output of the AND gate 82, the control signal is input to the gate circuit 52. In this case, the energization time of the control signal 102 is set to be slightly shorter than the gate signal GA of the gate signal generator 31 as shown in FIG.

Therefore, when the inputs of any one of the AND gates 82, that is, the output signals of the Q1 terminals of the pair of adjacent latch circuits 21 are both H ', the analog switch 92 connected to the AND gate 82. Is closed and the control signal 102 is input to the gate circuit 52. On the other hand, when one or both of the Q1 terminals of the adjacent latch circuits 21 are “L ′”, the analog switch 92 is turned off and the control signal 102 is not input to the gate circuit 52. The gate input of 52 has high impedance.

FIG. 3 shows the surface temperature when the adjacent heating resistors generate heat. Now, assuming that the adjacent heating resistors are 7a, 7b, and 7c as shown in FIG. 3A, when the heating resistors 7a, 7b, and 7c are selectively driven under a certain condition, for example, heat is generated. When the resistor 7b generates heat and the adjacent heating resistors 7a and 7c do not generate heat, the temperature is 250 ° C. as shown in FIG. 3B, whereas when the adjacent resistor generates heat, It becomes 280 ° C. as shown in FIG.

Further, when one of the heating resistors 7a or 7c generates heat, as shown in FIG.
Becomes Therefore, by supplying the energy determined by the energization time of the control signal to each of the heating resistors 7a, 7b, 7c, it is possible to correct the relative influence of the heat generated by the adjacent ones for printing, and to obtain a highly accurate thermal history. A well-balanced print density can be obtained by control.

Example 2. FIG. 4 shows an embodiment of the invention of claim 2. This uses two-system control signals 102 and 133 to control the energization time of the heating resistor, and the AND gate 82 connects each Q1 terminal of the adjacent latch circuit 21.
To the OR gate 113 by inputting each Q1 terminal of the other adjacent latch circuits 21 other than its own latch circuit 21 to the OR gate 113, and opening and closing according to the outputs of the AND gate 82 and the output of the OR gate 113. Each control signal 102,
133 is input to the AND gate 82.

Since the control signal 102 is input to the gate circuit 52 during the period when the analog switch 92 is turned on, the information of the adjacent bits of the record information of the current line is also written.
When H ′, the regular widest gate signal generator 31
Energization to the heating resistor is completed with a width shorter than the gate signal GA of.

Further, since the control signal 133 is input to the gate circuit 52 during the period when the analog switch 123 is turned on, when any of the information of the adjacent bits of the record information of the current line is L ', the gate signal GA The heating resistor 7 is energized with a shorter width. Therefore, it is possible to realize the thermal history control with higher accuracy than that of the first embodiment.

FIG. 5 is a timing chart showing the timing relationship between the control signals 102, 133 and the energizing time of the gate signals GA, GB, GC of the gate signal generator 31. These signals 102, 133, gate signal GA
Have the same rise, but the energization time is completed in the order of the control signal 102, the control signal 133, and the gate signal GA.

That is, these energization times are 280 ° C. and 265, which are the heat generation conditions of the adjacent bits as shown in FIG.
Corresponding to ℃, 250 ℃, if the heat generation is large,
The energization time is shortened, and the setting time of each signal is determined so as to match 250 ° C. here.

Therefore, when both adjacent bits to the corresponding bit of the heating resistor 7 generate heat as shown in FIG. 3D, the control signal 102 determines the energization time, When only one of the bits is generating heat as shown in FIG. 3 (C), the control signal 133 determines the energization time.

Further, each of the adjacent bits is shown in FIG.
As shown in, when the heat is not generated, the energization time is determined by the gate signal GA of the gate signal generator 31. As a result, printing control can be performed with higher accuracy than in the first embodiment.

Example 3. FIG. 6 shows an embodiment of the invention of claim 3. In addition to the record information adjacent to the current line, the record information adjacent to the previous line, that is, the record information adjacent to each Q2 terminal is used as the input information of the gate circuit 52. Here, the record information of the current line is obtained from the first AND circuit 82a and the record information of the past is obtained from the second AND circuit 82a.
I got it from b.

According to this, past adjacent recording information is also fed back to the recording information of the corresponding bit of the present line,
Energization control for the heating resistor 7 is performed. The timing of each signal 102, 134 in this case is similar to that shown in FIG. 5, and the control signal 134 is based on the control signal 133. As a result, it is possible to perform the print density control with higher accuracy than in the second embodiment.

Example 4. FIG. 7 shows a case where the analog switch 92 in FIG. 1 is changed to a normal three-state buffer 155, but any other similar switch can be used, and the same effect as in FIG. 1 can be obtained. Also, the output of the Q1 terminal of the corresponding bit on the current line is input to the AND gate 82, but this can be eliminated, and the number of gates is insufficient for the first and last bits of adjacent bits, so it is adjusted appropriately. To do. A logic circuit or the like may be used instead of the 3-state buffer 155 and the analog switch 92.

Example 5. Note that FIG. 1, FIG. 4, FIG. 6, and FIG.
Then, the circuit is configured in a three-state state and is input to the gate circuit 52 as a high-impedance input, but a pull-up resistor may be used to stabilize the logic.

Example 6. Further, in the above embodiment, the control signals 102, 133, 13 are supplied to the gate signal generator 31.
4 is output independently, but the gate signal generator 31
Alternatively, each of these control signals may be output from the gate signal generator 31. Alternatively, the gate signal from the gate signal generator 31 may be externally input.

Example 7. Further, although the thermal head drive circuit has been described in the above embodiments, it can be used, for example, for controlling the light emission of an LED head as a recording head using an LED light source, and also for recording heads such as ink jet and bubble jet. It can also be used for drive control.

Example 8. Further, in the above embodiment, the latch circuit 2 has three stages of terminals Q1, Q2 and Q3, but it may be one stage or three or more stages.

Example 9. Furthermore, in the above embodiment, the adjacent bits of the past line are referred to only for the preceding line, but it is possible to refer to the preceding and subsequent lines, and regarding the reference of the adjacent bits, the adjacent bits are not adjacent to each other. Besides, a plurality of continuous dots may be adjacent bits to the corresponding bit.

[0042]

As described above, according to the first aspect of the invention, the latch circuit for holding the record information of the current line of the dot to be driven and the record information of the dot of the previous line, and the record A gate circuit that outputs a pulse signal indicating the energized state to the head is provided with a gate signal generation unit that outputs a gate signal that outputs a pulse signal corresponding to the energized state according to each output pattern of the latch circuit. Of the latch circuits for each dot, a control signal for controlling the energization time to the recording head is supplied to the gate circuit according to the recording information from the own latch circuit and the adjacent other latch circuit. Since it is configured to input, the optimum print energy with balanced print density is provided according to the recording conditions such as heat generation between adjacent recording heads. The effect of which can be given to the recording head can be obtained.

According to the second aspect of the present invention, among the latch circuits for each dot, the OR gate is supplied with the above-mentioned energization time according to the recording information from the adjacent latch circuits other than the own latch circuit. Since the control signals for controlling different energizing times are input to the gate circuit, it is possible to obtain a print density control with higher accuracy.

Further, according to the invention of claim 3, among the latch circuits for each dot, the energization time to the recording head is controlled according to the recording information from the own latch circuit and the adjacent other latch circuit. A first AND gate for inputting a control signal to the gate circuit is provided, and according to past record information from the adjacent latch circuit other than the own latch circuit among the latch circuits for each dot. Since the second AND gate is configured to input a control signal for controlling an energization time different from the above energization time to the gate circuit, printing with sufficiently high accuracy based on more detailed recording history data. There is an effect that what can realize the concentration control is obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a recording head driving device according to an embodiment of the present invention.

FIG. 2 is a timing chart diagram showing signals of respective parts of the circuit in FIG.

FIG. 3 is an explanatory diagram showing an influence of heat generation of one bit of the recording head on an adjacent bit.

FIG. 4 is a circuit diagram showing a recording head driving device according to an embodiment of the present invention.

5 is a timing chart showing signals of respective parts of the circuit in FIG.

FIG. 6 is a circuit diagram showing a recording head drive device according to an embodiment of the invention of claim 3;

FIG. 7 is a circuit diagram of a recording head drive device shown by modifying a part of FIG.

FIG. 8 is a circuit diagram showing a conventional recording head driving device.

9 is an explanatory diagram showing a relationship between an applied pulse and a temperature of the heating resistor in FIG.

FIG. 10 is an explanatory diagram showing a simplified degree of temperature rise in each pattern output from the latch circuit in FIG.

11 is an explanatory diagram showing a relationship between latch data and points of four types of patterns in FIG.

FIG. 12 is a timing chart showing signals of respective parts of the circuit in FIG.

[Explanation of symbols]

 7 Heating Resistor (Recording Head) 21 Latch Circuit 31 Gate Signal Generator 52 Gate Circuit 82 AND Gate 82a First AND Gate 82b Second AND Gate 113 OR Gate

Claims (3)

[Claims] 1. A latch circuit for holding recording information of a current line of a dot to be driven and each recording information of that dot of a previous line, and a gate circuit for outputting a pulse signal indicating an energized state to a recording head. A gate signal generator for outputting to the gate circuit a gate signal for outputting a pulse signal corresponding to the energized state according to each output pattern of the latch circuit; and a latch circuit of the latch circuit for each dot. A recording head driving device comprising: an AND gate for inputting a control signal for controlling the energization time to the recording head to the gate circuit according to recording information from a circuit and another adjacent latch circuit. 2. A latch circuit for holding the record information of the current line of the dot to be driven and each record information of the dot of the previous line, and a gate circuit for outputting a pulse signal indicating the energization state to the recording head. A gate signal generator for outputting to the gate circuit a gate signal for outputting a pulse signal corresponding to the energized state according to each output pattern of the latch circuit; and a latch circuit of the latch circuit for each dot. Of the AND gate for inputting a control signal for controlling the energization time to the recording head to the gate circuit according to the recording information from the circuit and the adjacent latch circuit, and the latch circuit for each dot. A control signal for controlling an energization time different from the above-mentioned energization time is supplied in accordance with recorded information from other adjacent latch circuits except the latch circuit. A recording head driving device having an OR gate for inputting to a gate circuit. 3. A latch circuit for holding the record information of the current line of the dot to be driven and each record information of the dot of the previous line, and a gate circuit for outputting a pulse signal indicating the energization state to the recording head. A gate signal generator for outputting to the gate circuit a gate signal for outputting a pulse signal corresponding to the energized state according to each output pattern of the latch circuit; and a latch circuit of the latch circuit for each dot. A first control circuit for inputting a control signal for controlling the energization time to the recording head to the gate circuit according to recording information from the circuit and another latch circuit adjacent thereto;
Of the AND gate and the latch circuit for each dot, and a control signal for controlling an energization time different from the above energization time according to past record information from other adjacent latch circuits except the own latch circuit. A recording head drive device including a second AND gate input to the gate circuit.