JPH05102996A - Bit velocity detector for line concentrator - Google Patents

Abstract

PURPOSE:To detect the bit velocity of signals inputted from a terminal through a transmission medium at the line concentrator of a star-shaped LAN. CONSTITUTION:This device is composed of a change point detection part 1 to detect the change point of input data and to generate a change point detecting pulse, reset pulse generation part 2 to generate a reset pulse at every fixed time, counter part 3 to define the change point detecting pulse as a clock input CK and to define the above-mentioned reset pulse as a clear input CLR, and decode part 4 to detect the bit velocity according to the count value of the counter part 3. Therefore, the abnormal bit velocity can be detected by judging whether the number of the measured change points in the received data is in a normal range or an abnormal range within fixed time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bit rate detecting device for a concentrator in a star type LAN.

[0002]

2. Description of the Related Art Conventionally, a star type LAN in which a plurality of terminals are connected to a concentrator by a star type wiring has been widely used.
The concentrator in such a star type LAN has a function of repeating (relaying) a signal received from each terminal to another terminal. A twisted pair line is often used as the transmission medium of the star type LAN, and a Manchester code having a bit rate of 10 Mbps is often used as the transmission signal. However, a bit rate detection device for received data is provided in the concentrator in case the terminals having the same transmission medium but different bit rates are connected.

FIG. 4 shows a main structure of a conventional concentrator. In the figure, P1, P2, ..., Pn are ports of the concentrator, and are connected to terminals T1, T2, ..., Tn via transmission media L1, L2 ,. Each port P
At i (i = 1, 2, ..., N), the data received from the transmission medium Li is waveform-shaped by the port interface unit 8, demodulated by the port control unit 7, and input to the data control unit 6. .. Further, the demodulated data is PLL (P
It is also input to the bit rate detection device 5 using a case-locked loop. When the bit rate detecting device 5 detects a bit rate different from the original bit rate, the detection signal is sent to the main control section 10, and the main control section 10 processes the detection signal.

FIG. 5 shows the structure of a bit rate detecting device 5 used in a conventional concentrator. The demodulated data RxD is input to the phase comparator PC and compared with the oscillation output of the voltage controlled oscillator VCO. The output of the phase comparator PC is input to the low pass filter LPF, and its low pass output is fed to the amplifier A.
Amplified by MP, the amplified output is voltage controlled oscillator VC
As the O oscillation frequency control voltage, feedback control is performed so that the frequency of the demodulated data RxD and the oscillation frequency of the voltage controlled oscillator VCO become equal. Here, the average output voltage of the phase comparator PC increases as the difference between the frequency of the demodulated data RxD and the oscillation frequency of the voltage controlled oscillator VCO increases, and at that time, the output voltage of the amplifier AMP also increases. Therefore, the output voltage of the amplifier AMP and the reference voltage value Vref are compared by the voltage comparator CMP, and the bit rate is detected based on the comparison result.

[0005]

Since the PLL is used for the bit rate detecting device in the conventional concentrator, there is a problem that the structure becomes complicated and the cost of the device becomes expensive. Further, the method of setting the reference voltage Vref for detecting that the bit rates are different is complicated, and there is a problem that adjustment is troublesome. That is,
To set the reference voltage Vref, it is necessary to set the reference voltage Vref based on the output voltage of the amplifier AMP when the frequency that is detected as having a different bit rate is input as the demodulation data RxD. It is necessary to take all the characteristics of the device PC, the low-pass filter LPF and the amplifier AMP into consideration, and there is a problem that they cannot be easily set.

The present invention has been made in view of the above circumstances. An object of the present invention is to reduce the bit rate of a signal input from a terminal via a transmission medium in a star-type LAN concentrator. It is an object of the present invention to provide a bit rate detecting device for a concentrator that can be easily detected with a configuration.

[0007]

According to the present invention, in order to solve the above-mentioned problems, as shown in FIG. 3, a plurality of terminals T1, T2, ..., Tn forming a star type LAN are provided. In a concentrator which is connected via transmission media L1, L2, ..., Ln and repeats packet data input from one terminal to another terminal, a change point of input data is detected as shown in FIG. A change point detection unit 1 that generates a change point detection pulse in synchronization with the detection time point, a reset pulse generation unit 2 that generates a reset pulse at regular time intervals,
A counter unit 3 that uses the change point detection pulse as a clock input CK and the reset pulse as a clear input CLR.
And a decoding unit 4 for detecting a bit rate based on the count value of the counter unit 3.

The bit rate detecting device 5 having the above construction
As shown in FIG. 3, the data control unit 6 that realizes the repeat function by connecting the transmission / reception data of all ports of the concentrator.
, Or as shown in FIG. 4, provided in the port controller 7 for each port of the concentrator.

[0009]

According to the present invention, the change point detection pulse from the change point detection section 1 is counted by the counter section 3 which is cleared at every reset pulse generation interval from the reset pulse generation section 2, so that the constant time is maintained. It is possible to measure the number of change points of the received data within the range, and determine whether the measured number of change points is within a normal range or an abnormal range as the decode output of the decoding unit 4, thereby detecting an abnormal condition different from the original one. It can detect various bit rates.

[0010]

1 is a block diagram of a bit rate detecting device of the present invention, and FIG. 2 is an operation waveform diagram showing waveforms of respective parts. The demodulated data RxD and the clock are input to the change point detection unit 1, and a short pulse synchronized with the change point of the demodulated data RxD is output. In addition, the reset pulse generation unit 2 outputs a short pulse every fixed time T. Then, the short pulse from the change point detection unit 1 is input to the clock input C of the counter unit 3.
K, the short pulse from the reset pulse generating section 2 becomes the clear input CLR of the counter section 3. The counter section 3 counts the number of edge changes of the demodulated data RxD within a fixed time T. The count value of the counter section 3 is decoded by the decoding section 4, and when a bit rate different from the original bit rate is detected, a detection signal is generated as a decoded output of the count value.

Now, the demodulated data RxD is transmitted at a transmission rate v (bp
In the Manchester code of s), when the reset pulse generation interval T is set to 1 / v, the demodulated data RxD has pulses with time widths of 1 / v and 1 / 2v, as shown in FIG. When data of a normal bit rate is received, there are one or two change points within the constant time T.
Therefore, when the number of change points of the demodulated data RxD within the fixed time T is 0 or when the number of change points is 3 or more, the decoding unit 4 outputs a detection signal of an abnormal bit rate, and the change point is 1 If the number is two or more, the decoding may be performed so that the detection signal is not output from the decoding unit 4.

For example, demodulated data Rx as shown in FIG.
When D is received, since the number of change points in the constant time T is 1 or 2 in the predetermined period A, it is determined that the D is received at the normal bit rate. on the other hand,
Since the number of change points is 3 in the period T1 and the number of change points is 0 in the period T2, in these cases, it is assumed that a bit rate different from the original bit rate is received and the bit rate is abnormal. To generate the detection signal.

FIG. 3 shows an embodiment in which the bit rate detecting device 5 of the present invention is provided in the data control unit 6 which realizes the repeat function of the concentrator. Multiple ports P1, P2
, Pn are connected to terminals T1, T2, ..., Tn via transmission media L1, L2 ,. Each port P
, Pn are controlled by the port control unit 7 to communicate with the terminals T1, T2, ..., Tn. Received data from the transmission media L1, L2, ..., Ln are waveform-shaped by the port interface unit 8 and input to the port control unit 7. Also, the demodulated data from the port control unit 7 is
It is input to the reception identification unit 9, where it is identified that the port is receiving, and the reception identification signal is sent to the main control unit 10. The data control unit 6 has each port P
All transmission / reception data from 1, P2, ..., Pn are connected, and switching of transmission / reception between ports is performed so that reception data from a certain port is transmitted to all other ports. Controlled by 10. This data control unit 6
Then, the bit rate detecting device 5 is provided in the middle of the route for transmitting the demodulated data from one port to all the other ports.
When the bit rate detecting device 5 detects a bit rate different from the original bit rate, the detection signal is sent to the main control unit 10. In the main control unit 10, a certain port Pi (1 <i <
n) is receiving, the concentrator is not in a collision state (a plurality of ports are receiving at the same time, a state in which transmission and reception occur simultaneously), and when the detection signal is obtained, terminals having different bit rates are It is determined that the transmission medium Li of the port Pi is connected.

As a conventional configuration, as shown in FIG. 4, the bit rate detecting device 5 of the present invention may be provided for each port control unit 7 of each port P1, P2, ..., Pn in the concentrator. ..

[0015]

According to the present invention, in the star type LAN concentrator, the bit rate of the signal received from each terminal via the transmission medium can be easily detected with a simple structure.

[Brief description of drawings]

FIG. 1 is a block diagram of a bit rate detecting device for a concentrator according to the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the present invention.

FIG. 3 is a block diagram showing a configuration of a concentrator of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional concentrator.

FIG. 5 is a block diagram of a bit rate detecting device in a concentrator of a conventional example.

[Explanation of symbols]

 1 Change Point Detection Section 2 Reset Pulse Generation Section 3 Counter Section 4 Decoding Section

Claims (1)

[Claims] 1. A concentrator, which is connected to a plurality of terminals forming a star-type LAN via a transmission medium and repeats packet data input from one terminal to another terminal, detects a change point of the input data. And a change point detection unit that generates a change point detection pulse in synchronization with the detection time point,
A reset pulse generator that generates a reset pulse at regular time intervals, a counter that receives the change point detection pulse as a clock input and a reset pulse that is a clear input, and a decoder that detects the bit rate based on the count value of the counter. And a bit speed detecting device for a concentrator.