JPH049345B2 - - Google Patents

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Conventional Technology Problems to be Solved by the Invention Means for Solving the Problems (Fig. 1) Working Example (a) One Implementation Explanation of the configuration of an example (Figures 2 and 3) (b) Explanation of the operation of an embodiment (Figures 4 and 5) (c) Detailed explanation of internal processing (Figures 6 and 7) (d) Description of other embodiments Effects of the invention [Summary] In a system in which a plurality of controllers are provided to control a plurality of terminal devices, and when one controller fails, the other controller performs backup control. In this system, a higher-level unit issued a processing request to a plurality of controllers and recognizes the status of the plurality of controllers, so that it is possible to easily recognize which controller is communicating with the controller.

[Industrial application field]

The present invention relates to a data processing system that performs data collection processing such as a POS system, in which a plurality of controllers are provided to control a plurality of terminal devices, and when one controller fails, the other controller performs backup control. Concerning a controller state recognition method.

In a system in which a large number of terminal devices are connected by a controller, and the controller and the terminal device communicate with each other to execute desired processing, if an error occurs in the controller, the entire system goes down, so multiple controllers are used. Set up a stand,
A system is used in which when an error occurs in one controller, the other controller is backed up and the other controller continues processing.

In such a backup, an error in one controller automatically switches to the other controller, so the higher-level unit of the controller needs to recognize this.

[Conventional technology]

For example, in a POS system, as shown in FIG.
A plurality of POS terminals 13n are provided, and each POS terminal 130~
13n is connected to multiple (two in the figure) controllers 100a, 100b via the lower line LL, and the controllers 100a, 100b are connected to the upper line LL.
A system is configured by connecting to a management computer 200 such as a business computer or an office computer via the lH.

In such a POS system, the controllers 100a and 100b have a price search file that is a comparison table of product codes and prices.
A PLU file (hereinafter referred to as PLU table) and aggregation file are provided, and the POS terminal 130
~13n, when making a product transaction, enter the product code using the keyboard or scanner, and then
The price is sent to the controllers 100a and 100b using , the price is referenced from the PLU table, this is received from the downlink LL, the total price is calculated, and a receipt is issued.

Communication is carried out between the POS terminals 130 to 13n and the controllers 100a and 100b for each transaction, so that the controllers 100a and 100b can register, that is, tally sales for each POS terminal, tally sales for each product, and the like.

Since communication is performed for each transaction, multiple controllers are provided as described above, and while one controller (for example, 100a) is communicating with a POS terminal, a non-serious error such as a data error may occur. Since it takes time to process errors and cannot respond to requests from other POS terminals, the related state can be handled by the other controller (for example, 100b).
When such an error occurs, one controller 100a is brought down, and the other controller 100b performs communication processing with the POS terminal for backup, as shown in FIG.

On the other hand, one controller 100 is in a down state.
When a is restored after error processing is completed,
The other controller 100b enters the monitoring state again, and the one controller 100a communicates with the POS terminal.

In a system with such an automatic backup function, the upper management computer 20
Controller 100a for periodic aggregation etc. from 0,
It is necessary to request (instruct) the controller 100b to perform processing such as aggregation, and for this purpose, it is necessary to recognize which controller is in the process of communicating.

Conventionally, in order to be recognized by the higher level, each controller 100a, 100b has reported to the higher level management computer 200 when the state changes from communication processing to down, from monitoring to communication processing, and the like.

[Problem that the invention seeks to solve]

However, in a backup system that does not keep the terminals waiting, the states of the controllers 100a and 100b are changed even if there is a small error, so the states are changed relatively frequently, and the status is reported one by one. The host computer 200 also has a controller 100a,
100b also has a problem in that the processing for this becomes a burden.

In other words, the controller connects the upper line every time the state changes.
It is necessary to perform reporting processing to the host computer 200 via the lH, and on the other hand, the host computer 200 must interrupt processing every time the state changes and perform state recognition processing based on the report, which reduces processing efficiency. There was a problem that this occurred.

An object of the present invention is to provide a state recognition method for a data processing system that can prevent the processing efficiency of the controller and host device from decreasing by not recognizing the state of the controller every time the state changes. .

[Means for solving problems]

FIG. 1 is a diagram explaining the principle of the present invention.

In the present invention, in a data processing system having a system configuration in which a plurality of controllers connected to the plurality of terminals described above are provided, and the controller is connected to a higher-level device, processing requests from the higher-level side can be processed regardless of the state of the controller. Issue to multiple controllers. When the controller receives the processing request, the controller that is monitoring issues a status message indicating that it is monitoring, while the controller that is communicating performs the processing according to the processing request and sends the processing results and the host device. The notification is sent as a processing message.

[Effect]

The present invention is based on the knowledge that when a higher-level unit needs to recognize the status of a controller, it is when the higher-level unit issues a processing request to the controller, and that it is not necessary to always recognize the status.

That is, in the present invention, the host unit issues processing requests to all controllers, thereby recognizing the state and starting the processing. As a result, the controller that is monitoring will respond with a status message indicating that it is being monitored in response to the processing request, so it will recognize that the controller that does not respond with the status message is in the process of communicating, and this controller will The system waits for the processing results from and receives the processing message according to the processing request.

Therefore, the state can be easily recognized and processing efficiency can be prevented from decreasing.

〔Example〕

(a) Description of the configuration of an embodiment FIG. 2 is a configuration diagram of an embodiment of the present invention, showing the internal configuration of the controllers 100a and 100b.

In the figure, the same parts as shown in Fig. 8 are shown with the same symbols, and 110 is the main CPU.
and the top 200 and POS terminals 130 to 1
150 is a lower line sub-CPU that processes and executes the tasks requested by 3n.
Controls the lower line LL for the terminals 130 to 13n, 160 is the upper line sub
The CPU 170 is a CPU that controls the upper line IH for the host device 200, and the arithmetic CPU 170 is responsible for the arithmetic processing necessary for processing. Note that the controller 100b also has the same configuration.

FIG. 3 is a functional block diagram of such a controller, in which the processing of the main CPU 110 is divided into blocks.

In the figure, 101 is a summary file for each terminal, 1
02 is a PLU table that has a code, product name, price, and sales total for the product; 103 is a recovery processing unit that performs recovery processing for a failed PLU controller; 104 is a polling monitor It is a part that monitors the polling signal issued by the other side controller and checks whether the other side (PLU) controller is in a healthy state or a failure state.
Although not shown, the illustrated PLU controller 100a also includes a recovery processing section 103, a boring monitoring section 104, and the like.

As will be described later, the recovery processing unit 103 shown in FIG.
5. (ii) A backup processing function 106 that takes over table inquiry request processing, etc.; (iii) A backup processing function 106 that takes over the processing of table inquiry requests, etc.; (iii) A backup processing function 106 that handles the reception of a recovery message from the main controller side corresponding to the recovery of the main controller (the communicating controller) during the above-mentioned takeover period. PLU file load processing function 107 that notifies the main controller of the aggregated data generated during (iv) Function 1 that sends a parental rights relinquishment message in response to a restart message from the main controller
08, at least.

(b) Description of operation of one embodiment FIG. 4 is a flowchart of the operation processing of the controller, FIG. 4A is a flowchart of error processing operation for the lower line, and FIG. 4B is a flowchart of the processing operation for the upper line. . FIG. 5 is an explanatory diagram of the operation of failure (error) detection.

First, the controller 100a will be described as a main controller, and the controller 100b as a backup controller.

In the flowchart of FIG. 4A, the standby controller 100b sends commands to the main controller 100a when the boring monitoring unit 104 detects that the commands sent at regular intervals from the main controller 100a have stopped. It is determined that a failure has occurred in 100a (processing A). This turns off the backup mode flag, which will be described later.

Along with this, the link processing function 105 in the recovery processing unit 103
A command for initializing the line is sent to 30 to 13n (processing B). Correspondingly, each terminal device initializes the message processing at that point in time and performs the processing again.

The backup processing function 106 thereafter executes PLU table inquiry request processing from each terminal device, notifies the contents of the PLU table 102 to each terminal device that made the request, and performs aggregation processing for sold products. Execute the same as the main controller 100a (processing C). However, processing such as file updating is effective only for updating the PLU table 102, and accesses to other files are rejected as an operational error (processing C).

In this way, the spare controller 10
When the boring monitoring unit 104 detects that the main side controller 100a has recovered and sent a recovery message while the controller 0b is operating (processing D), the controller 100b will continue to operate during the handover until then. The contents of the PLU table 102 containing the data aggregated in the main controller 1
00a (processing E). By this,
In the main controller 100a,
The contents of the PLU table 102 within itself will be updated.

Next, the boring monitoring unit 104 monitors whether the main controller 100a issues a restart message (processing F).

After receiving the restart message, the controller 100b turns on the backup mode flag, sends a parental rights relinquishment message, and controller 1
00b is stopped, and the controller 100b returns to the line monitoring mode (processing G).

In the case of the present invention, the boring monitoring section 104
monitors the boring signal from the main controller 100a.

FIG. 5 therefore shows an explanatory diagram for explaining the principle. FIG. 5A shows a state in which the main controller 100a is in a healthy state, and FIG. 5B shows a state in which the main controller 100a is in a faulty state.

The main controller 100a performs boring with a predetermined gap for the backup controller 100b, as well as for the terminal devices 130 to 13n. In the case shown in FIGS. 5A and 5B, the controller 10 on the spare side
The boring signal for 0b is “NSP#0”
It is shown as. In the boring monitoring unit 104 shown in FIG. 3, the online flag is turned "off" at the end of the boring signal, and then turned "on" immediately after. On the other hand, the monitoring timer is started at the same time as the "on".
Therefore, as long as the boring signal is detected at a predetermined interval as shown in FIG. 5A, it can be determined that the controller 100a is healthy. However, if the boring signal is absent for about 5 seconds as shown in FIG. 5B, the controller 10
0a is determined to be a failure.

In addition to the above, the boring monitoring unit 104 has a recovery message receiving function and a restart message receiving function as shown in FIG. do.

Next, the processing from the upper line will be explained with reference to FIG. 4B.

The upper line sub CPU 160 determines whether there is a processing request from the upper line 200, and if there is a processing request, the main CPU 110 sends the lower line sub
Refer to the reserve mode flag in the CPU 150.

If the standby mode flag is on, the main controller 100a is in operation and its own standby controller 100b is monitoring, so it sends a message indicating the standby state to the upper line sub.
20 higher than upper line lH via CPU160
0 and return to step.

On the other hand, if the reserve mode flag is off,
Since the main controller 100a is in failure (down) and the standby controller 100b is in line service, it executes the requested process. For example, if the requested processing is aggregation, the main CPU 110 instructs the calculation CPU 170 to perform an aggregation operation on the aggregated data in the PLU table 102.

Then, the aggregated results are sent to the higher-level device 200 via the higher-level line sub CPU 160, and further to the higher-level line.
Send via lH and return to step.

Similarly, in the main controller 100a, in response to a processing request from the upper level 200, if it is not down (that is, the backup mode flag is not on), the main controller 100a similarly performs the aggregation processing corresponding to the processing request (in this case, The aggregation process in the aggregation file 101 is also possible according to instructions) and is sent to the top 200 in the same way as in the step, but if it is down (if the backup mode flag is on),
Top 200 backup (down in this case) messages
Send in the same way as the first step.

In this way, the controllers 100a and 100 respond to processing requests (requests) from the upper level 200.
The state of 0b can be recognized, and the processing according to the processing request is also executed.

For this reason, the host side 200, controller 10
Both 0a and 100b can recognize the status when necessary on the host side 200 without having to report or recognize the status in response to status switching.

(c) Detailed explanation of internal processing Figure 6 is a functional block diagram of each CPU in the controller shown in Figures 2 and 3;
The figure is a software configuration diagram in FIG. 6.

In FIG. 6, the lower line sub CPU 150 is
Upstream and downstream DMA for main CPU 110
(direct memory access) functional unit 151,
152, a command to the main CPU 110, a status interface section 153, a timer section 154, and a message control section 155.
The message control unit 155 exchanges messages via the main CPU 110 and the DMA units 151 and 15.
2. Command from the interface section 153,
It is used to exchange status and data.

The main CPU 110 is the lower line sub CPU 1
Uplink and downlink DMA sections 121 and 12 for 50
3 and the interface section 123, and the downlink and uplink DMA sections 1 for the upper line sub CPU 160.
24, 125 and interface section 126
and control tasks 111 and 112 for the lower line and the upper line.

Further, as shown in FIGS. 7A and 7B, the main CPU 110 includes received message analysis tasks 113 and 114 from the lower and upper lines, a module branching task 115, a floppy processing task 116, and modules (0 to n) 117. , these tasks are performed in a predetermined order (in this example, the numbers 11 and 11 assigned to each part) are performed by a monitor unit (not shown).
1 to 116)), the execution right is granted. In addition, processing data (including transmitted and received messages) between each task is transferred through queues 118 to 120 provided between each task.
127-129.

Furthermore, as shown in FIG.
2,133.

On the other hand, the upper line sub CPU 160
Upstream/downstream DMA section 16 for CPU 110
4,165, an interface section 166, a timer section 167, and a message control section 168,
Message control unit 1 via the upper 200 and upper line lH
68 exchanges messages, and main CPU1
10, DMA sections 164, 165, and interface section 166 exchange commands, status, and data.

The calculation CPU is the main CPU, as shown in Figure 7B.
A processing request receiving unit 179 for the CPU 110;
Operation information sending unit 171 and DMA unit 172,1
73, a requested task analysis/branching section 174, and tasks (0 to n) 175.

If the controller shown in FIG. 6 is the above-mentioned standby controller 100b, its operation will be as follows.

First, by turning on the power to the controller, the main
The CPU 110 determines whether or not it should serve as a standby controller. This is the lower line
This is done by checking whether or not messages such as messages have already been exchanged on the LL. Then, if a message is exchanged on the line LL, the lower line control task 111 of the main CPU 110 sets a flag (not shown) indicating a backup mode in the message control unit 155 of the sub CPU 150.

By this preliminary mode instruction, the message control unit 15
Step 5 sets the timer section 154 and turns on the line lL.
Monitor the above messages. That is, the timer section 154 is reset every time a message is received on the line LL.

In the above example, the main controller 10
This monitors the interval between borings issued from 0a to the reserve side. On the other hand, in this example, the controller side and
This monitors the interval between messages sent from the POS terminal. Therefore, if no message is received from the line LL within a predetermined period of time (for example, 4 seconds),
The time-up signal from the timer section 154 is
It will be sent to the main CPU 110 via the status interfaces 153 and 123.

Note that the message received by the message control unit 155 is sent to the main CPU 110 via the DMA control units 151 and 121. Then, through the message analysis task 113 on the main CPU 110 side, normal processing for the message is performed.
This processing is executed by modules 117 organized into processing units (for example, PLU processing, aggregation processing, etc.) via branching tasks 115.

If a response such as a processed result is required, a response message is assembled by the module 117 and sent to the lower line control task 111 and
Through the DMA control units 122 and 152, the sub
It is sent to the CPU 150 side. Sub CPU150
When the message control unit 155 receives the response message (transmission message) sent from the main CPU 110 side, it refers to the backup mode flag described above. If the backup mode flag is on (valid), the received response message is discarded.

That is, in the spare side controller 100b, as well as in the main side controller 100a,
Performs PLU processing, aggregation processing, and file update processing. The configuration is such that only transmission of transmitted and received messages to line 199 is prohibited.

Therefore, it is possible to always have a file (not shown) with the same contents as the PLU file 102 of the main controller 100a on the backup side.

On the other hand, the message received by the message control unit 168 from the upper layer 200 via the upper line lH is
Main CPU 1 via control units 165 and 125
10 side, and the upper line control task 112 and message analysis task 114 of the main CPU 110
Message processing is then performed. This processing is executed by module 117 via branch task 115. As described above, if the received message is the above-mentioned processing request, the message control unit 15 of the lower line CPU 150 is executed by the module 117.
5, and if the standby mode flag is on, the standby state message is assembled as described above, and sent to the sub CPU via the upper line control task 112 and the DMA control units 124 and 164.
160, and is further transmitted from the message control unit 168 to the higher level 200 via the higher level line lH.

Conversely, if the backup mode flag is off, the request process is executed. For example, in the case of aggregation processing, the calculation CPU 170 is requested to perform aggregation in a file as shown in FIG. 7B, and the data to be aggregated is transferred and subjected to arithmetic processing. This tally result is received via the queue 127, a processing message including the processing results is similarly assembled, and the upper line control task 112 and
Sub CPU 1 via DMA control units 124 and 164
60, and is further transmitted from the message control unit 168 to the higher level 200 via the higher level line lH.

(d) Description of other embodiments In the above embodiments, a POS system has been described, but the present invention can also be applied to other data processing systems.

Similarly, fault monitoring is detected by the interval of boring or the interval of messages addressed to the self.
Other methods may also be used.

Although the present invention has been described above with reference to examples, the present invention can be modified in various ways according to the gist of the present invention.
These are not excluded from the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, the higher level issues a processing request when it is necessary to understand the state of the controller, and thereby the state of the controller can be recognized, thereby reducing the processing required for the higher level to recognize the state. In addition to having the effect of improving processing efficiency, this also has the effect of being able to recognize the state only when it is necessary.

In addition, since the controller does not need to report the status every time the status changes, the load required for this is reduced and processing efficiency is improved.

Furthermore, the means for this purpose is simple and can be easily realized, which is an excellent practical effect.

[Brief explanation of drawings]

Fig. 1 is a diagram explaining the principle of the present invention, Fig. 2 is a configuration diagram of an embodiment of the invention, Fig. 3 is a functional block diagram of an embodiment of the invention, and Fig. 4 is an operational process of an embodiment of the invention. Flowchart, FIG. 5 is an explanatory diagram of failure detection operation according to an embodiment of the present invention, FIG. 6 is an internal configuration diagram of the controller configured in FIG. 2, and FIGS. 7A and B are software configuration diagrams configured in FIG. 2. , Figure 8 is a system configuration diagram, Figure 9
The figure is an explanatory diagram of the prior art. In the figure, 100a, 100b...controller,
130 to 13n...POS terminal, 200...Upper device.

Claims (1)

[Claims] 1. A plurality of controllers connected to a plurality of terminal devices for communicating with the terminal devices, and a host device connected to the plurality of controllers, one of the plurality of controllers. While the controller is communicating with the terminal device, the other controller monitors the operation of the one controller, and if the one controller fails, the other controller communicates with the terminal device on behalf of the one controller. In the processing system, when the higher-level device issues a processing request to the controller, the controller issues the processing request to the plurality of controllers, and the controller performing the monitoring sends the monitoring request to the higher-level device in response to the processing request. 1. A state recognition method for a data processing system, characterized in that the host device is notified of the state of a plurality of controllers, and causes the host device to recognize the state of a plurality of controllers.