JPH0487643U - - Google Patents

Info

Publication number
JPH0487643U
JPH0487643U JP1990130707U JP13070790U JPH0487643U JP H0487643 U JPH0487643 U JP H0487643U JP 1990130707 U JP1990130707 U JP 1990130707U JP 13070790 U JP13070790 U JP 13070790U JP H0487643 U JPH0487643 U JP H0487643U
Authority
JP
Japan
Prior art keywords
semiconductor chip
substrate
semiconductor device
semiconductor
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990130707U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990130707U priority Critical patent/JPH0487643U/ja
Publication of JPH0487643U publication Critical patent/JPH0487643U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP1990130707U 1990-11-30 1990-11-30 Pending JPH0487643U (US07714131-20100511-C00038.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990130707U JPH0487643U (US07714131-20100511-C00038.png) 1990-11-30 1990-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990130707U JPH0487643U (US07714131-20100511-C00038.png) 1990-11-30 1990-11-30

Publications (1)

Publication Number Publication Date
JPH0487643U true JPH0487643U (US07714131-20100511-C00038.png) 1992-07-30

Family

ID=31878024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990130707U Pending JPH0487643U (US07714131-20100511-C00038.png) 1990-11-30 1990-11-30

Country Status (1)

Country Link
JP (1) JPH0487643U (US07714131-20100511-C00038.png)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09214071A (ja) * 1996-01-31 1997-08-15 Hitachi Ltd 家庭用電気機器の制御基板
KR100545881B1 (ko) * 1998-03-24 2006-01-25 세이코 엡슨 가부시키가이샤 반도체 칩의 실장 구조체, 액정장치 및 전자기기

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09214071A (ja) * 1996-01-31 1997-08-15 Hitachi Ltd 家庭用電気機器の制御基板
KR100545881B1 (ko) * 1998-03-24 2006-01-25 세이코 엡슨 가부시키가이샤 반도체 칩의 실장 구조체, 액정장치 및 전자기기

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