JPH0487361A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To radically reduce the number of times of wire bonding by connecting an address bus, data bus, etc., between a microcomputer and its peripheral circuit elements and by connecting the microcomputer, its peripheral circuit elements, and predetermined conductive passages. CONSTITUTION:On both sides of a multilayer substrate 40, conductive passages 44 such as address bus and data bus are formed. Part of the predetermined conductive passages 44 is extendedly formed in the peripheral part of the multilayer substrate 40, thereby forming a pad 48 to be connected by bonding to a pad formed on an insulating metal substrate 12. Part of other predetermined conductive passages 44 is extendedly formed in the periphery of a hole 42. Pad 50 that is to be connected by bonding to electrodes for the first and second gate arrays 24 and 30, microcomputer 26, and memory 28 is formed. Pad 48 and its wire bonding process can be omitted by forming solder bumps at predetermined positions on the back of the multilayer substrate 40 and by carrying out bump connection to the corresponding pad formed on the insulating metallic substrate 12.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit device, and more particularly to a wiring connection structure for a hybrid integrated circuit device equipped with a memory and a microcomputer.

(b) Conventional technology A conventional hybrid integrated circuit device will be explained with reference to FIG.

FIG. 4 shows a plan view of a hybrid integrated circuit device, which includes an insulated metal substrate (70), a conductive path (72),
Relay pad (74), external lead pad (76), bonding wire (78), first gate array (80), microcomputer (82), memory (8)
4), a plurality of integrated circuit elements such as a second gate array (86), other peripheral integrated circuits (88), and a chip resistor (
90) etc.

The insulated metal substrate (70) is mainly an insulated aluminum substrate, and a wiring pattern is formed in a predetermined shape by photo-etching copper foil attached to the insulated metal substrate (70), and an integrated circuit, which will be described later, is formed. Pads for fixing elements, pads for connecting their electrodes, conductive paths (72) such as relay pads (74), pads for external leads (76), and the like are formed.

At predetermined positions of the conductive path (72), there are first and second gate arrays (80) (86), a microcomputer (82), a memory (84), and a peripheral integrated circuit (86).
The chip-shaped elements forming 8) are fixed with Ag paste, and electronic components such as chip capacitors and chip resistive elements are fixed with solder in consideration of connection strength and contact resistance.

Such large-scale hybrid integrated circuit devices are used in a wide variety of electrical equipment, and in recent years have been used as printer controllers.

To briefly explain the case where a general printer controller is realized as a hybrid integrated circuit device, for example, the first gate array (80) inputs Centronics specification parallel data, sensor input, printer front panel switch signals, etc. microcomputer (8
2), and the second gate array (86) functions as a human input interface to the microcomputer (86).
It functions as an output interface that outputs a character font to the print head based on the command 2) and also outputs control signals such as carriage return or feedforward signals. In addition, a microcomputer (82
) uses, for example, an 80-bin microcomputer with a 16-bit human output and a 20-bit address space, and the memory (84) has, for example, 256 bits,
28 bins of memory are used.

The hybrid integrated circuit device having the above structure can meet the demand for miniaturization required for printer controllers, and also solves the problem of heat dissipation from the device since it uses an insulated metal substrate.

(c) Problems to be Solved by the Invention However, the wiring pattern of a large-scale digital circuit that has a 16-bit data bus and a 20-bit address space has become extremely complex. Conductive paths such as
They had to be interconnected using a technique called jumping wire connections.

By using such jumping wire connection technology,
Although connections can be made between relatively distant conductive paths, hybrid integrated circuit devices equipped with microcomputers, memories, etc. that require an extremely large number of data buses and address buses, as shown in Figure 4, require an extremely large number of data buses and address buses. Jumping wire was needed.

As a result, the increase in the number of pads for fixing the jumping wires reduced the effective board mounting area, and there were limits to miniaturization of the device, making it difficult to realize large-capacity, ultra-small hybrid integrated circuit devices. .

(D) Further means for solving the problems The present invention has been made in view of the above problems, and is a multilayer board on which wiring patterns such as address buses and data buses are formed around elements such as memory and microcomputers. By arranging them insulated and connecting address buses, data buses, etc. between the microcomputer and its peripheral circuit elements, and connecting the microcomputer and its peripheral circuit elements to predetermined conductive paths through this multilayer board, This significantly reduces the number of wire bonds and provides a highly reliable, high-density, and compact hybrid integrated circuit device.

(e) Since the address bus, data bus, etc. are connected via conductive paths formed on the functional multilayer board, long-span connections are possible, and connections between the microcomputer and its peripheral circuit elements, as well as the microcomputer Further, in connection between peripheral circuit elements and a predetermined conductive path, conventional jumping wire connections can be made unnecessary.

(F) Embodiment Hereinafter, an embodiment in which the present invention is applied to a hybrid integrated circuit device for a printer controller will be described with reference to FIGS. 1 to 3.

FIG. 1 is a plan view of the embodiment, and the hybrid integrated circuit device has an insulating metal substrate (12) (however, the insulating resin layer formed on the metal substrate is visible in the plan view). , when explaining the cross-sectional structure below, an insulated metal substrate (
12) (the reference number 12) is also used for the insulating resin layer), a conductive path (14) formed in a predetermined pattern on this insulating metal substrate (12), an external lead pad (18), and a first gate array. (24), microcomputer (26),
A memory (28), a second gate array (30), other peripheral integrated circuits (32), a chip resistor (34), a multilayer substrate (40) characteristic of the present invention, etc. are shown. Note that a conductive path (14) is also formed on the insulated metal substrate (12) below the multilayer substrate (40).

The insulated metal substrate (12) is made of aluminum, the surface of which is alumite-treated by anodizing, and its main surface is coated with an adhesive insulating resin such as epoxy resin or polyimide resin.

The conductive paths (14) and external lead pads (18) are formed into a predetermined pattern by photo-etching copper foil that has been previously attached to the insulated metal substrate (12), and is particularly suitable for the bus (18).
Some of the conductive paths (14) separated by the conductive paths (14) shown as 16) are connected by jumping with aluminum wires (22). Further, a conductive path (14) at ground potential is connected to the substrate metal (20).

Chip elements are used for the first and second gate arrays (24) (30), the microcomputer (26), the memory (28), and other peripheral integrated circuits (32), and they are connected to predetermined conductive paths (14). ) is fixed with Ag paste. Further, the chip resistor (34) and the chip capacitor are soldered and fixed to a predetermined conductive path (14).

Note that the functions of the integrated circuit elements have been explained in the conventional example section, so a description thereof will be omitted.

Next, referring to FIG. 2, a multilayer substrate (4
0) will be explained.

The multilayer substrate (40) is made of resin such as glass epoxy, paper epoxy, paper phenol, polyimide, etc. with a thickness of 0.6 mm to 1.0 mm, and as shown in the figure, the first and second gate arrays (24) ( 30), a hole (42) and a notch (42) are formed to expose the microcomputer (26) and memory (28) chips. As will become clear from the following explanation, this hole (42
) are formed to arrange bonding pads in multiple layers around an integrated circuit element such as a microcomputer (26), and are limited to holes as long as they have a shape that substantially achieves the purpose. It's not something you can do.

In addition, conductive paths (44) such as address buses and data buses are formed on both sides of the multilayer substrate (40) by a well-known method, as shown in part, and through holes (46) are formed at appropriate positions. ) are connected by.

A part of the predetermined conductive path (44) is formed to extend on the peripheral edge of the multilayer substrate (4o), forming a pad (48) that is bonded to a pad formed on the insulated metal substrate (12). A part of the other predetermined conductive path (44) is formed by a hole (42).
) are formed extending around the first and second gate arrays (24) (30), and the microcomputer (26).
A pad (50) is formed to be connected by bonding to the electrode of the memory (28). Said pad (48)
And its wire bonding process is a multilayer board (40
) can be omitted by forming a solder bump at a predetermined position on the back surface of the insulating metal substrate (12) and connecting the bump to a corresponding pad formed on the insulated metal substrate (12).

The present invention will be explained in more detail with reference to FIG.

This figure is a cross-sectional view taken along the line I-1 in FIG. 1 partially shown as a side view for ease of understanding, and the hybrid integrated circuit device of the present invention includes a metal substrate (10), an insulating resin layer (12), A conductive path (14) and an external lead pad (18) formed on this insulating resin layer (12), and first and second gates fixed on the conductive path (14) via an Ag paste layer (15). Array (24) (30), microcomputer (26)
, a main board consisting of a memory (28), a multilayer board (40) formed with a hole (42) (shown in side view) for the integrated circuit chip, and this multilayer board (40) as a main board. It is shown with an insulating adhesive resin layer (60) that is insulatingly bonded to.

The insulating adhesive resin layer (60) is formed by coating an epoxy resin, by coating a solder resist, or by coating the layer with a thickness of 0.
It is formed from an adhesive resin-impregnated sheet that is made by impregnating Japanese paper of about 5 mm with an adhesive resin, such as epoxy resin, and cutting it into approximately the same shape as the multilayer substrate (40). In particular, the adhesive resin-impregnated sheet has no adhesive properties at room temperature, so it is easy to handle, and when heated to about 125°C, the impregnated resin melts and is further thermoset to bond the multilayer board (40) and the main board. Compared to the case of applying resin or resist, not only can better insulation be obtained, but also the adjustment and application processes can be omitted, which simplifies the process of adhering the multilayer substrate (40). has.

After forming the insulating adhesive resin layer (60), the multilayer substrate (40) is disposed on the main substrate by engaging guide posts (not shown) formed on the main substrate and bonded under predetermined temperature conditions. Then, Ag paste N (15) is formed by a stamping method in a predetermined area exposed by the hole (42) of the multilayer substrate (40), and the Ag paste layer (15)
first and second gate arrays <24) (30) on top;
Integrated circuit elements such as a microcomputer (26) and a memory (28) are arranged.

Therefore, when the main substrate is heated to melt the Ag paste layer (15) and fix the integrated circuit element on the conductive path (14), the first and second gate arrays are formed as shown in FIG. (24) (30), Microcomputer (2
6) Around the memory (28), pads to be connected to the electrodes of these integrated circuit elements are arranged in two layers, and the conductive paths (14) on the insulated metal substrate (12) or the multilayer substrate (40) are arranged at the shortest distance. ) on any of the conductive paths (44).

Reference number (36) is the bonding wire that connects the electrode of the integrated circuit element and the conductive path (]4), and reference number (36) is the bonding wire that connects the electrode of the integrated circuit element and the para I' (50) of the multilayer substrate (40). number (52), and the para l' (48) of the multilayer board (40) and the conductive path (14).
The bonding wire connecting the is indicated by reference number (54).

As described above, in the present invention, where address buses, data buses, etc. are connected via conductive paths formed on a multilayer substrate, the conductive paths (14) on the main substrate can be connected at a maximum of two locations. This can be done by wire bonding.

Further, the conductive path (44) of the multilayer board (40) is connected to any conductive path (44) on the main board by wire bonding at one location.
), and the number of relay pads can be significantly reduced. Furthermore, this allows the layout of the microcomputer and its peripheral circuit elements to be standardized and simplified as shown in the figure.

Here, an example of the process for realizing the hybrid integrated circuit device of the present invention will be briefly described below.

Solder printing → chip attachment (chip resistor) 2) Solder melting (210°C) 2) Cleaning 2) Adhesive resin impregnated sheet and multilayer board placement Multilayer board adhesion (125°C)
Medium Ag paste application Rumor Die bonding (integrated circuit chip) -> Ag cure (155°C))
Wire bonding agent Resin Co.) (125°C)
(b) with external leads) casing The present invention has been described above based on one embodiment, but the scope of the present invention is applicable to microcomputers and their peripheral circuit elements for which, for example, the material and layout of the insulating adhesive resin layer should be standardized. It is clear to those skilled in the art that various changes can be made in the types, etc., and the present invention is not limited to the embodiments.

(1) Effects of the Invention As described above, according to the present invention, (1) The number of wire bonding is reduced, so the process is simplified. This also improves the reliability of the hybrid integrated circuit device.

(2) Long-span connections are possible, and relay bands are reduced, which improves packaging density.

(3) Since the predetermined electrodes of the microcomputer and its peripheral circuit elements are connected by the shortest distance, there is no problem caused by wiring capacitance.

(4) Since the layout of the microcomputer and its peripheral circuit elements can be made smaller and standardized, pattern design of the hybrid integrated circuit device becomes easier.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a plan view of a multilayer board characteristic of the present invention, FIG. 3 is a sectional view taken along line 1-1 in FIG. 1, and FIG. 4 is a conventional Example top view. (12)...Insulated metal substrate, (18)...- Pad/bonding wire for external leads, element, (34)-- Chip resistor, (42)-- Hole. (14) (44) - Conductive path 1 , (22) (36) (52) (54) (24) - (
32)...Integrated circuit (40)...Multilayer board,

Claims (4)

[Claims] (1) A conductive path is formed in a predetermined shape, and an insulated metal substrate is fixedly mounted with at least a memory and a microcomputer in a predetermined position of the conductive path, and wiring patterns such as a common address bus and data bus, as well as bonding to the peripheral edges thereof. - At least includes a multilayer substrate on which a pad is formed, and an edge adhesive resin layer for insulating and fixing the multilayer substrate on an insulated metal substrate, and a bonding pad formed on a peripheral edge of the multilayer substrate and on the insulated metal substrate. The common address line, data line, etc. formed on the multilayer substrate are connected to a portion of the conductive path formed on the insulated metal substrate by wire bonding with the bonding pad formed on the multilayer substrate. Features of hybrid integrated circuit device. (2) The multilayer substrate is glass epoxy, paper epoxy, P
2. The hybrid integrated circuit device according to claim 1, wherein the hybrid integrated circuit device is formed of resin such as CB or polyimide. (3) The hybrid integrated circuit device according to claim 1, wherein an epoxy resin or a solder resist is used for the insulating adhesive resin layer. (4) The hybrid integrated circuit device according to claim 1, wherein chip elements are used for the memory and the microcomputer.