JPH0487352A - Production of semiconductor element - Google Patents

Abstract

PURPOSE:To maintain a low contact resistance of a semiconductor element by executing both the placing of B or BF2 ion and the evaporation of polycrystal silicon at a time by means of the IVD. CONSTITUTION:Polycrystal silicon 24 is treated for of B or BF2 ion placing and for evaporation of polycrystal silicon by means of the IVD at a time to form a polycrystal silicon layer with a thickness of 0.6-1.2mum. In this process a speed of developing the polycrystal silicon 24 is set at greater than 20Angstrom /min, the condition of placing B or BF2 ion at an acceleration of 5kev-3kev, and an amount of dose at 1.0X10<13> ions/cm<2>-1.0X10<20> ions/cm<2>. Next, the formed polycrystal 24 is entirely eliminated by etching, except that the polycrystal silicon 24 is partly left unremoved in a contact hole 26 as high as H or more concretely around 0.2-0.9mum high. After that, the P.T.A method is used to heat the semiconductor device in an atmospheric temperature range of 1000-1500 deg.C for about 5-40sec. Finally, wiring 25 of metal layer is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device that can prevent an increase in wiring resistance of polycrystalline silicon within a contact hole.

(Prior Art) Japanese Patent Laid-Open No. 64-42818 discloses a method of manufacturing a semiconductor device for improving the contact portion of internal wiring of an integrated circuit.
It is disclosed in the publication No.

In the case of this publication, after an N-type or P-type diffusion layer is formed in a semiconductor device, B, P
A contact hole is provided in an interlayer insulating film containing a low melting point silicate glass containing at least I x 10-"cra of each element, and a conductive layer is formed at the bottom of the contact hole and inside the interlayer insulating film in the same way as the diffusion layer above the contact hole. ion implantation is performed, and the activation heat treatment flattens the surface of the interlayer insulating film, creating a taper at the upper edge of the inner periphery of the contact hole, thereby improving the step coverage of the contact wiring. It was designed to do so.

Further, FIG. 2 is a process cross-sectional view showing another conventional method of manufacturing a semiconductor device. First, as shown in FIG. 2(a), a thermal oxide film 22 of 0.02 to 0.0
Form approximately 5 μm.

Next, a boron-phosphorous doped silicon oxide film 23 is deposited on this thermal oxide film 22 by normal pressure vapor growth method or reduced pressure vapor growth method.
0.4 to 0.8 JIrn is formed.

Thereafter, a heat treatment is performed for about 10 to 40 minutes in an atmosphere of nitrogen and oxygen or a mixed gas of nitrogen and oxygen at about 850 to 1000"C, and the boron/phosphorous doped silicon oxide film 23 is heated.
Let the glass flow. Thereafter, contact holes 26 are selectively formed using photolithography and etching methods.

Next, as shown in FIG. 2(b), polycrystalline silicon 24
Forms about 0.6 to 1.2.

Next, as shown in FIG. 2(c), the polycrystalline silicon 2
4 is completely removed using an etching method.

Also, at this time, the polycrystalline silicon 24 is exposed to the contact hole 26.
Specifically, 0.2 to 0.9 short culm should remain within the height H1.

After that, ion implantation of BF (boron fluoride) is performed on the entire surface or selectively to form BFz with a profile in the polycrystalline silicon 24 in the contact hole 26 at 80°C.
Furnace Anne
Al) method is used to perform heat treatment for about 10 to 30 minutes to diffuse into polycrystalline silicon.

Also, after that, P-T-A (Rapid The
1000-15 using the rmal anneal) method.
A heat treatment is performed in an atmosphere of 00° C. for about 5 to 40 seconds to activate the polycrystalline silicon 24 in the contact hole 26 and reduce the wiring resistance.

Finally, as shown in Figure 2 (dl), the wiring 2 of the metal layer
form 5.

(Problem to be solved by the invention) However, in the method for manufacturing a semiconductor element described above,
BP, (boron fluoride) ion implantation, followed by heat treatment at 800 to 950°C using F, A method.
By performing this for about 0 to 30 minutes, phosphorus is diffused from the boron-phosphorous doped silicon oxide film 23 into the polycrystalline silicon 24 in the contact hole 26, and the resistance of the polycrystalline silicon 24 in the contact hole 26 increases. There was a problem.

This invention provides a semiconductor device that solves the rJI problem that the prior art had, in that the wiring resistance of polycrystalline silicon in the contact hole increases due to heat treatment using the F and A methods. A manufacturing method is provided.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention uses an IVD method (Jon and
This method introduces a process in which B or BFz ion implantation and polycrystalline silicon vapor deposition are performed simultaneously by iron and vapor deposition.

(Function) According to the present invention, since the above-described steps are introduced in the method for manufacturing a semiconductor element, the 800-degree manufacturing method using the F and A methods can be used.
B or BF is uniformly present in the polycrystalline silicon of the contact hole without performing heat treatment at 0 to 950°C, which prevents out-diffusion into the polycrystalline silicon from the boron/phosphorous doped silicon oxide film. The above-mentioned problem can be eliminated by preventing the above-described problems.

(Example) Hereinafter, an example of the method for manufacturing a semiconductor device of the present invention will be described based on the drawings. Figures 1(a) to 11f
fl(d) is a process sectional view of one embodiment, and in FIGS. 1(a) to 1(d), the same parts as in FIGS. I will explain it with the following.

First, as shown in FIG. 1(a), a thermal oxide film 22 with a thickness of about 0.02 to 0.05 pm is formed on a silicon substrate 21, and boron/phosphorous doped is applied thereon by normal pressure vapor phase growth or low pressure vapor phase growth. A silicon oxide film 23 is formed to a thickness of approximately 0.4 to 0.8.

After that, the boron/lindove silicon oxide film 23 is glass-flowed by heat treatment for about 10 to 40 minutes in an atmosphere of nitrogen and oxygen or a mixed gas of nitrogen and oxygen at about 850 to 1000 degrees Celsius to smooth the surface shape. .

Then, using photolithography and etching methods, the selection) R
A contact hole 26 is then formed.

Next, as shown in FIG. 1 Φ), B or BFz ion implantation and vapor deposition of the polycrystalline silicon 24 are performed simultaneously on the polycrystalline silicon 24 using the IVD method.
Form about 2n.

The growth rate of polycrystalline silicon 24 at this time was 20 people/m.
i n or more, B or BP, ion implantation conditions: acceleration 5 kev to 3 keν, dose 1.0×1
0”1oz/c4~1.OX 10”1oz
/ c-.

Next, as shown in step 111iJ(c), the formed polycrystalline silicon 24 is entirely removed using an etching method. At this time, the polycrystalline silicon 24 is made to remain in the contact hole 26 at a height H1, specifically about 0.2 to 0.9.

Then, using the R, T-A method, 1000 to 1500°
Heat treatment is performed in an atmosphere of C for about 5 to 40 seconds. Finally, as shown in FIG. 1(d), a metal layer wiring 25 is formed.

(Effect of the invention) As explained above in detail, according to this invention, IV
By simultaneously performing B or BFz ion implantation using the D method and vapor deposition of polycrystalline silicon, the polycrystalline silicon in the contact hole can be deposited without heat treatment at 800 to 950'C using the F and A methods. to B or BP
, can be made to exist uniformly, phosphorous does not diffuse into polycrystalline silicon from the boron-phosphorous doped silicon oxide film, and contact resistance can be kept low. In addition, the contact flow process is eliminated, which improves reliability. A semiconductor element with excellent convertibility can be obtained.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are process cross-sectional views of an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIGS. It is a process cross-sectional view of a method.

Claims (1)

[Claims] (a) A step of forming a boron-phosphorus doped silicon oxide film via a thermal oxide film formed on a silicon substrate; (b) The thermal oxide film and the boron-phosphorus doped silicon selectively forming a contact hole in the oxide film using selective photolithography and etching; (c) forming a contact hole on the boron-phosphorous doped silicon oxide film;
A step of simultaneously implanting B or BF_2 ions and vapor depositing polycrystalline silicon by a VD method to form polycrystalline silicon in which B or BF_2 is uniformly distributed, and then performing heat treatment; (d) the above polycrystalline silicon; A method for manufacturing a semiconductor device, comprising: (e) removing the entire surface of polycrystalline silicon using an etching method, leaving polycrystalline silicon only in the contact hole; and (e) forming a metal layer wiring.