JPH048700Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a blanking pulse processing circuit that is input to an integrated circuit including a blanking circuit and a video signal processing circuit.

(Prior Art) Conventionally, a blanking pulse having a constant pulse width is input to an integrated circuit including a blanking circuit and a video signal processing circuit. This blanking pulse is adapted to act as a blanking pulse within the integrated circuit as well as a pedestal clamp pulse.

(Problem to be solved by the invention) However, since this type of integrated circuit has good frequency characteristics, harmonics are generated in the falling part of the pulse corresponding to the end of blanking of the video signal output from this integrated circuit. occurs. Furthermore, since this harmonic is amplified by the video amplification circuit, the harmonic energy increases and affects other circuits within the television receiver. In particular, it interferes with the antenna system circuit and causes so-called arching due to blanking, where a vertical black or white line is seen on the left side of the screen.

(Means for Solving the Problems) In order to solve the above problems, the blanking pulse processing circuit of the present invention is a circuit that is externally attached to an integrated circuit that includes a blanking circuit and a video signal processing circuit. and includes second blanking pulse generating means. As this second blanking pulse generating means, for example, a differentiating circuit is used. The second blanking pulse is the first blanking pulse that blanks the video signal output from the video signal processing circuit.
The pulse is narrower than the pulse width of the blanking pulse and is input to the integrated circuit for blanking and pedestal clamping. Further, a first blanking pulse is added to the video signal output from the integrated circuit to perform predetermined blanking.

(Operation) The second blanking pulse having a narrow pulse width is generated by the second blanking pulse generating means based on the first blanking pulse.

This second blanking pulse is input into an integrated circuit that outputs a video signal, and acts as a blanking pulse and a pedestal clamp.
At this time, the blanking pulse processed within the integrated circuit contains many harmonics. The video signal output from this integrated circuit is further blanked by a first blanking pulse having a wider pulse width than the second blanking pulse. As a result, harmonic components are removed and a wide regular blanking pulse is added to the video signal.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 illustrates a circuit configuration in which a pulse processing circuit 1 for blanking according to the present invention is externally attached to an integrated circuit 2, and FIG. 2 shows a pulse processing circuit 1 for blanking according to the present invention.
The input/output signal waveforms S ₁ to _{S 4} are shown in FIG.

The integrated circuit 2 includes a blanking circuit (not shown) and a video signal processing circuit (not shown) that outputs a video signal.
It is a single-chip IC with integrated
Only the (Y, B-Y) output terminals 4a, 4b, 4c and the video signal (Y signal) output terminal 5 are shown, and other terminals are omitted.

The blanking pulse processing circuit 1 has a pulse width T _1
The positive polarity first blanking pulse S ₁ [FIG. _2A ] having , a pulse width at an arbitrarily set reference level V ₀ (for example, a level of 1/2 of the peak value)] is converted into a second blanking pulse S ₂ [FIG. 2B] and sent to the pulse input terminal 3. input. The second blanking pulse S ₂ input to the pulse input terminal 3 performs blanking within the integrated circuit 2 and performs pedestal clamping for DC reproduction of the video signal.

The differentiating circuit 6 includes resistors R ₁ , R ₂ and a capacitor.
_{A diode D 1 is} further provided in parallel with the resistor R ₂ . this diode
_D1 is set at a constant level by removing the ringing component that occurs at the falling edge of the first blanking pulse _S1 .
Slice into V ₁ [Figure 2B].

The first blanking pulse S ₁ is a diode D ₂ ,
A video signal S ₃ is outputted from the video signal output terminal 5 via a resistor R ₃ via a resistor R ₄ [Figure 2 C]
and is input to the base side of the blanking transistor _Q1 .

FIG. 2C shows the waveform of the video signal _S3 output from the video signal output terminal 5, and the pulse width _T2 portion 7a synchronized with the rising edge of this waveform is a blanked portion within the integrated circuit 2. The middle edge 7b of this waveform
The pulse portion formed at 1 indicates the synchronization signal.

On the other hand, the color difference signal output terminals 4a, 4b, 4c
color difference signals are outputted from the respective transistors, and these color difference signals are input to the base sides of the corresponding drive transistors Q ₂ to _{Q 4} via resistors R ₅ . And this drive transistor Q ₂ ~
The signal amplified by Q ₄ is input from each collector side to the cathode of CRT 8 via resistor R ₆ . A volume VR ₁ for white balance adjustment is provided on the emitter side of each of the transistors Q ₂ to Q ₄ , and a volume VR ₂ for drive adjustment is provided on the emitter side of the transistors Q ₃ and Q ₄ .

R ₇ to R ₁₂ and capacitors C ₂ to _{C 4} are resistors and capacitors for bias adjustment.

Further, the emitter side of the blanking transistor Q ₁ is provided with a drive capacitor C ₅ and is connected to the emitter sides of the drive transistors Q ₂ to _{Q 4} to operate the video amplification circuit. ing.

When the first blanking pulse S ₁ is input to the blanking pulse processing circuit 1, a second blanking pulse S ₂ with a narrow pulse width is generated by the differentiating circuit 6 and is applied to the integrated circuit 2. It is input to the pulse input terminal 3 of. Then, blanking and DC reproduction are performed within this integrated circuit 2, and the video signal _S3 is output from the output terminal 5. This video signal _S3 contains harmonic components when processed within the integrated circuit 2, but the video signal _S3 contains a first blanking pulse having a wider pulse width than the second blanking pulse _S2 . By applying the blanking pulse _S1 , harmonic components are removed and predetermined blanking is performed.

Note that the transistor _Q1 only needs to have a frequency characteristic that amplifies the video frequency band, so a transistor with a low cutoff frequency that does not generate harmonics may be used.

(Effects of the invention) As described above, according to the invention, the second blanking pulse with a narrow pulse width is input to the integrated circuit to perform a predetermined operation, and the video signal output from the integrated circuit is Since blanking is further performed by adding the first blanking pulse with a wide pulse width, the harmonics generated in the falling part at the end of blanking are removed, so arching caused by these harmonics is eliminated. can be prevented.

Further, the second blanking pulse can effectively perform blanking and direct current generation within the integrated circuit.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the blanking pulse processing circuit according to the present invention, Fig. 2 A, B, C, D
is a waveform diagram showing input/output signal waveforms of the same pulse processing circuit. 1...Pulse processing circuit for blanking, 2...Integrated circuit, 6...Differentiating circuit.

Claims (1)

[Claims for Utility Model Registration] A circuit externally attached to an integrated circuit comprising a blanking circuit and a video signal processing circuit for outputting a video signal, the circuit performing blanking for the video signal. In synchronization with the rising edge of the first blanking pulse,
A second blanking pulse generating means is provided for generating a second blanking pulse narrower than the pulse width of the first blanking pulse, and the second blanking pulse is applied to the integrated circuit as a blanking pulse and a pedestal clamp pulse. A blanking pulse processing circuit, characterized in that the first blanking pulse is inputted and added to the output of the integrated circuit.