JPH0486322U - - Google Patents
Info
- Publication number
- JPH0486322U JPH0486322U JP13029390U JP13029390U JPH0486322U JP H0486322 U JPH0486322 U JP H0486322U JP 13029390 U JP13029390 U JP 13029390U JP 13029390 U JP13029390 U JP 13029390U JP H0486322 U JPH0486322 U JP H0486322U
- Authority
- JP
- Japan
- Prior art keywords
- gain
- signal
- control signal
- variable
- determining
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案による自動利得制御回路の１実
施例のブロツク図、第２図は同実施例の動作説明
図、第３図は従来の自動利得制御回路のブロツク
図、第４図は第３図の自動利得制御回路の動作説
明図である。
４２，４４……可変減衰器（利得可変手段）、
５０……検波部（レベル検出手段）、５４……Ａ
／Ｄ変換器、５６……決定部、｛５８，６０……
ラツチ、６２，６４……減算器、６６……係数発
生器、６８，７０……Ｄ／Ａ変換器｝……制御信
号生成手段。
FIG. 1 is a block diagram of an embodiment of an automatic gain control circuit according to the present invention, FIG. 2 is an explanatory diagram of the operation of the same embodiment, FIG. 3 is a block diagram of a conventional automatic gain control circuit, and FIG. FIG. 4 is an explanatory diagram of the operation of the automatic gain control circuit shown in FIG. 3; 42, 44... variable attenuator (variable gain means),
50...detection section (level detection means), 54...A
/D converter, 56...determining section, {58, 60...
latch, 62, 64... subtracter, 66... coefficient generator, 68, 70... D/A converter}... control signal generating means.
Claims (1)
基づいて変更する第１の利得可変手段と、この第
１の利得可変手段の出力信号が入力されこれに対
する利得を制御信号に基づいて変更する第２の利
得可変手段と、この第２の利得可変手段の出力信
号のレベルを検出する検出手段と、この検出手段
のレベル検出信号をデイジタルレベル信号に変換
するＡ／Ｄ変換手段と、上記デイジタルレベル信
号と予め定めたしきい値とを比較し第１及び第２
の利得可変手段のいずれの利得を変化させるかを
決定する決定手段と、この決定手段によつて決定
された第１または第２の利得可変手段に対する上
記制御信号を上記デイジタルレベル信号に基づい
て生成する制御信号生成手段とを、具備する自動
利得制御回路。 (2) 請求項１記載の自動利得制御回路において
、上記制御信号を入力し、これに対応する減衰量
を表示する表示手段を設けたことを特徴とする自
動利得制御回路。[Claims for Utility Model Registration] (1) A first variable gain means for changing the gain of an input signal based on a control signal; A second variable gain means that changes the gain based on the control signal, a detection means that detects the level of the output signal of the second variable gain means, and an A/D converter that converts the level detection signal of the detection means into a digital level signal. The D conversion means compares the digital level signal with a predetermined threshold value and converts the first and second signals.
determining means for determining which gain of the gain variable means is to be changed; and generating the control signal for the first or second gain variable means determined by the determining means based on the digital level signal. An automatic gain control circuit comprising control signal generation means for generating a control signal. (2) The automatic gain control circuit according to claim 1, further comprising display means for inputting the control signal and displaying the amount of attenuation corresponding thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13029390U JPH0735448Y2 (en) | 1990-11-30 | 1990-11-30 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13029390U JPH0735448Y2 (en) | 1990-11-30 | 1990-11-30 | Automatic gain control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0486322U true JPH0486322U (en) | 1992-07-27 |
| JPH0735448Y2 JPH0735448Y2 (en) | 1995-08-09 |
Family
ID=31877647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13029390U Expired - Lifetime JPH0735448Y2 (en) | 1990-11-30 | 1990-11-30 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0735448Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020057957A (en) * | 2018-10-03 | 2020-04-09 | 日本電波工業株式会社 | Amplifier, down converter, and receiver |
-
1990
- 1990-11-30 JP JP13029390U patent/JPH0735448Y2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020057957A (en) * | 2018-10-03 | 2020-04-09 | 日本電波工業株式会社 | Amplifier, down converter, and receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0735448Y2 (en) | 1995-08-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |