JPH0485500U - - Google Patents

Info

Publication number
JPH0485500U
JPH0485500U JP13009790U JP13009790U JPH0485500U JP H0485500 U JPH0485500 U JP H0485500U JP 13009790 U JP13009790 U JP 13009790U JP 13009790 U JP13009790 U JP 13009790U JP H0485500 U JPH0485500 U JP H0485500U
Authority
JP
Japan
Prior art keywords
field control
sound field
dsp
control device
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13009790U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13009790U priority Critical patent/JPH0485500U/ja
Publication of JPH0485500U publication Critical patent/JPH0485500U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る音場制御装置の実施例を
説明するためのブロツク図、第2図はDSPの構
成を説明するためのブロツク図、第3図はイコラ
イザを説明するための概略回路図、第4図は従来
の音場制御装置を説明するためのブロツク図であ
る。 10……音場制御装置、12……音場制御用D
SP、13……イコライザ、14……デイレイメ
モリ、15……マイクロコンピユータ。
FIG. 1 is a block diagram for explaining an embodiment of the sound field control device according to the present invention, FIG. 2 is a block diagram for explaining the configuration of a DSP, and FIG. 3 is a schematic circuit for explaining an equalizer. 4 are block diagrams for explaining a conventional sound field control device. 10...Sound field control device, 12...D for sound field control
SP, 13...Equalizer, 14...Delay memory, 15...Microcomputer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 音場制御用DSP(デジタル・シグナル・プロ
セツサ)、該音場制御用DSPに接続されたデイ
レイメモリ及びマイクロコンピユータ等を備えた
音場制御装置において、チヤネル毎にデジタル演
算処理を施すイコライザが前記音場制御用DSP
、前記マイクロコンピユータ及び前記デイレイメ
モリにそれぞれ直接的に接続されていることを特
徴とする音場制御装置。
In a sound field control device equipped with a DSP (digital signal processor) for sound field control, a delay memory connected to the DSP for sound field control, a microcomputer, etc., an equalizer that performs digital calculation processing for each channel is used to DSP for field control
, a sound field control device, wherein the sound field control device is directly connected to the microcomputer and the delay memory.
JP13009790U 1990-11-30 1990-11-30 Pending JPH0485500U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13009790U JPH0485500U (en) 1990-11-30 1990-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13009790U JPH0485500U (en) 1990-11-30 1990-11-30

Publications (1)

Publication Number Publication Date
JPH0485500U true JPH0485500U (en) 1992-07-24

Family

ID=31877466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13009790U Pending JPH0485500U (en) 1990-11-30 1990-11-30

Country Status (1)

Country Link
JP (1) JPH0485500U (en)

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